EPM9400LC84-20 vs EPM9320LC84-10 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9400LC84-20 disebabkan oleh Altera dan EPM9320LC84-10 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM9400LC84-20 EPM9320LC84-10
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND NRND
Family MAX 9000 MAX 9000 EPLD
Device Type CPLD (Complex Programmable Logic Device) —
Architecture Multiple Array Matrix (MAX), 3rd generation, EEPROM-based —
Macrocells 400 320
Usable Gates 8,000 (6,000 to 12,000 typical range) 6000 (typical)
Flip-Flops 580 —
Maximum User I/O 55 —
Pin-to-Pin Propagation Delay 20 ns (speed grade -20) —
Maximum Counter Frequency 144 MHz —
Supply Voltage (VCCINT) 5 V —
I/O Voltage (VCCIO) 3.3 V or 5 V (configurable) —
In-System Programming Yes (IEEE 1149.1 JTAG) —
Kemasan 84-pin PLCC (Plastic Leaded Chip Carrier) 84-pin PLCC (JEDEC MO-047)
Process Technology CMOS EEPROM 0.7 µm CMOS EEPROM/UV-EPROM
Suhu Operasi Commercial (0C to +70C) - assumed from -20 speed grade 0C to +70C (commercial) [DATA_NEEDED: exact grade suffix]
Jenis Pemasangan Surface Mount (PLCC socket or SMT land pattern) Surface Mount (PLCC socket also common)
Status RoHS [DATA_NEEDED: RoHS status] ROHS3 Compliant (per fpgalink listing)
Device — EPM9320
Logic Array Blocks (LABs) — 16
Maximum User I/O Pins — 168 (varies by package)
Pin-to-Pin Logic Delay (tPD) — 10 ns
Maximum Frequency (fCNT) — [DATA_NEEDED: fCNT in MHz]
Supply Voltage (VCC) — 5.0 V (typical, see datasheet)
Programming Interface — JTAG (IEEE 1149.1) boundary-scan, Altera ByteBlaster compatible
Configuration — Non-volatile EEPROM (instant-on, no boot PROM)
Tingkat sensitiviti Air Nama (MSL) — MSL-3, 168 hours (per fpgalink listing)
Manufacturer Lead Time — 1-7 days (per fpgalink listing)

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