EPM9560GC280-15N vs EPM9320GC280-15 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9560GC280-15N disebabkan oleh Intel dan EPM9320GC280-15 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM9560GC280-15N EPM9320GC280-15
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Device Family MAX 9000 —
Product Type EE PLD / CPLD —
Macrocell Count 560 —
Usable Gates 12,000 (typical) 6,000
Propagation Delay (tPD) 16.6 ns —
Frekuensi Klock Maksimum 117.6 MHz —
Supply Voltage (VCCINT/VCCIO) 5.0 V —
Maximum Supply Voltage 5.25 V —
Logic Technology CMOS EEPROM —
In-System Programmability Yes (5.0-V ISP via JTAG) —
Boundary-Scan (JTAG) IEEE Std. 1149.1 compliant —
Kemasan CPGA-280 (Ceramic Pin Grid Array, 280 pins) 280-pin Ceramic Pin Grid Array (CPGA-280)
Package Code PGA / CPGA280 —
Terminal Form PIN/PEG —
Operating Temperature Grade Commercial —
Architecture Multiple Array MatriX (MAX) 3rd generation CMOS EEPROM-based, Multiple Array MatriX (MAX)
Family — MAX 9000 (EPM9320)
Device Type — CPLD - Complex Programmable Logic Device
Macrocells — 320
Logic Array Blocks (LABs) — 20 (16 macrocells per LAB)
Pin-to-Pin Propagation Delay — 15 ns
Maximum Internal Frequency — 117.6 MHz
Maximum User I/O Pins — 164
Supply Voltage (VCC) — 4.75 V to 5.25 V
I/O Voltage Levels — 3.3 V or 5 V (configurable)
Programmability — 5.0-V in-system programmable (ISP) via IEEE 1149.1 JTAG
Jenis Pemasangan — Through-hole (PGA socket)
Suhu Operasi — 0 C to +70 C (commercial)
Aras MSL — 3 (168 hours)
Status RoHS — ROHS3 compliant (per fpgalink listing)
Technology Node — CMOS EEPROM, third-generation MAX

Laporan Datasheet & Sumber

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