EPM9560GC280-15N vs EPM9560GI280-20 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9560GC280-15N disebabkan oleh Intel dan EPM9560GI280-20 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM9560GC280-15N EPM9560GI280-20
Merek Intel Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND NRND
Device Family MAX 9000 MAX 9000
Product Type EE PLD / CPLD —
Macrocell Count 560 —
Usable Gates 12,000 (typical) 12,000
Propagation Delay (tPD) 16.6 ns —
Frekuensi Klock Maksimum 117.6 MHz —
Supply Voltage (VCCINT/VCCIO) 5.0 V —
Maximum Supply Voltage 5.25 V —
Logic Technology CMOS EEPROM —
In-System Programmability Yes (5.0-V ISP via JTAG) Yes (IEEE Std. 1149.1 JTAG)
Boundary-Scan (JTAG) IEEE Std. 1149.1 compliant —
Kemasan CPGA-280 (Ceramic Pin Grid Array, 280 pins) 280-pin PGA (PIN/PEG, square)
Package Code PGA / CPGA280 PGA
Terminal Form PIN/PEG PIN/PEG (through-hole PGA)
Operating Temperature Grade Commercial —
Architecture Multiple Array MatriX (MAX) 3rd generation CMOS EEPROM-based Multiple Array MatriX (MAX)
Technology Node — 5.0 V CMOS EEPROM
Macrocells — 560
Logic Array Blocks (LABs) — 28 (16 macrocells each)
Maximum User I/O Pins — 216
Flip-Flops — 772
Pin-to-Pin Delay (Speed Grade) — 20 ns
Supply Voltage (VCC) — 5.0 V
Programming Technology — EEPROM (non-volatile)
Temperature Grade — Industrial
I/O Pin DC Input Range — -0.5 V to VCC + 0.5 V
Dedicated-Input Pin DC Input Range — -0.3 V to VCC + 0.3 V
I/O Transient Envelope (no-load, <20 ns) — -2.0 V undershoot to 7.0 V overshoot
VCC Ramp Requirement — Monotonic rise
Development Tool — Altera MAX+PLUS II
Supported HDLs — VHDL, Verilog HDL, AHDL
Status RoHS — [DATA_NEEDED: RoHS status for GI PGA package]

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