Intel

EP2S15F672C3 - Stratix II FPGA 15K LE, 672-FBGA | Intel / Altera

MPN: EP2S15F672C3 ✗ Akhir Hayat

1.2 V Vdss 672-ball FC-FBGA Package C3 (third commercial speed bin) Speed 419,328 Memory

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EP2S15F672C3 Ringkasan

The Intel (formerly Altera) EP2S15F672C3 is a member of the Stratix II family of high-performance FPGAs, integrating 15,600 logic elements, 419,328 bits of embedded RAM, and 156 hardware DSP blocks in a 672-ball FineLine BGA package. The device is fabricated on a 90 nm CMOS process and operates from a 1.2 V core supply, while supporting a maximum user I/O count of 366 across 12 I/O banks.

A field-programmable gate array (FPGA) is a reconfigurable integrated circuit whose logic resources, routing, and I/O cells can be programmed by the end user to implement custom digital functions, glue logic, DSP pipelines, or even complete processor subsystems. Stratix II devices sit in the hierarchy of programmable logic devices (PLD), and are designed for high-throughput parallel processing, high-speed serial connectivity, and large embedded memory footprints.

Key features of the EP2S15F672C3 include 156 18-bit x 18-bit dedicated multipliers, twelve global clock networks, up to twelve phase-locked loops (PLLs), and 366 maximum user I/O pins supporting multiple I/O standards including LVDS, LVTTL, LVCMOS, SSTL, and HSTL. The device also integrates high-speed transceivers in higher-density Stratix II variants, though the EP2S15 in the 672-pin package focuses on parallel I/O density. Adaptive logic modules (ALMs) are used instead of 4-input LUTs to improve logic efficiency.

The Stratix II architecture combines a TriMatrix memory hierarchy of three block RAM sizes (M512, M4K, M-RAM) to balance distributed and large memory needs, and supports the Nios II embedded soft processor for system-on-chip designs. The 90 nm process delivers maximum internal clock frequencies above 450 MHz, while the device is offered in commercial, industrial, and military temperature grades.

Typical applications include high-speed digital signal processing in communications infrastructure, video and image processing pipelines, prototyping of ASIC designs, industrial automation controllers, and military/aerospace embedded systems. The large logic capacity also makes the EP2S15 suitable for protocol bridging and high-performance bus interface aggregation.

When designing with this device, careful attention must be paid to power distribution network design because of the 1.2 V core current peaks, and to thermal management for hot-spot control in sealed enclosures. The 672-FBGA requires a multi-layer PCB with controlled-impedance traces and matched-length routing for LVDS pairs.

This page consolidates distributor pricing, drop-in same-package alternatives from the Stratix II family, and practical design notes that complement the manufacturer datasheet.

Pilihan pengganti yang segera untuk EP2S15F672C3 — sama paket, pin-pin kompatibel. Bahagian paket yang berbeza memerlukan kerja ulang PCB diasingkan.

Varietas dalam siri ini

Model serupa yang kompatibel dengan pengganti yang segera EP2S15F672C3 (sama faktor bentuk dan kaki) — berbeza dalam Package, Speed Grade, Operating Temperature, Configuration Method, RoHS Status.

EP2S15F672C3N

Intel

Package: 672-ball FBGA (FineLine BGA)

Speed Grade: -3 (commercial)

Operating Temperature: 0C to +85C (commercial)