DSPIC33FJ128MC804-I/PT - 16-bit DSC, 128KB Flash, 44-TQFP | Microchip
MPN: DSPIC33FJ128MC804-I/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $6.95 | $6.95 |
| 10 | $6.3 | $63.00 |
| 100 | $5.45 | $545.00 |
| 500 | $4.8 | $2,400.00 |
| 1,000 | $4.25 | $4,250.00 |
DSPIC33FJ128MC804-I/PT Overview
A Digital Signal Controller (DSC) is a hybrid MCU/DSP class of microcontroller that combines a deterministic 16-bit microcontroller core with DSP-grade datapath elements (single-cycle 16x16 MAC, dual 40-bit accumulators, barrel shifter). DSCs sit in the hierarchy between general-purpose MCUs and standalone DSPs, and are most often used where a closed-loop control law must execute every PWM cycle. The dsPIC33F family in particular targets motor control, power conversion, and high-density sensor fusion.
Key feature highlights of this part include up to nine 16-bit PWM outputs with dedicated Fault inputs, a 10-bit ADC at up to 1.1 Msps with as many as 13 input channels, two analog comparators, and a 16-bit/32-bit peripheral pin-select (PPS) remap engine for flexible I/O mapping. The part also exposes two UART, two SPI, and one I2C serial interface, plus a Parallel Master Port (PMP) for external bus expansion. On-chip oscillators and a 5-timer module (Timer1-5) are included; no external crystal is strictly required for full-speed operation.
Architecturally, the part uses a modified Harvard bus with separate program and data paths, plus a DMA controller (8 channels) that offloads peripheral-data movement so the CPU is free to run control loops. The motor-control PWM (MCPWM) block supports complementary outputs with programmable dead-time, center-aligned or edge-aligned modes, and ADC triggering - a hardware-level combination that few general-purpose MCUs can match.
Typical applications include brushless DC (BLDC) and permanent-magnet synchronous motor (PMSM) sensorless FOC drives, solar micro-inverters and PFC stages, industrial PLCs, and digital power supplies. A common use is a 3-phase sensorless FOC running at 20 kHz PWM with the dsPIC doing Clarke/Park transforms and an SMO observer on top of the MCPWM and ADC.
Design tip: when migrating from the dsPIC30F or PIC24 families, peripheral register maps and PPS I/O assignments differ - validate code on the new silicon. For multi-channel motor control, allocate DMA channels to ADC reads before the CPU touches them to keep ISR time below 5 us.
This page combines datasheet specifications, distributor pricing tiers, and curated drop-in alternatives sourced from Microchip's dsPIC33F family - information synthesized for engineers evaluating this DSC for production designs.
Drop-in alternatives for DSPIC33FJ128MC804-I/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33FJ128MC804-I/PT (same form factor and footprint) — differing in Operating Temperature, Package, Core Architecture, Timers, ADC.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33FJ128MC804-E/PT
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33FJ128MC804-H/PT
✅ Drop-In✓ In Stock
$6.85 / Unit
View Datasheet →DSPIC33FJ128GP804-I/PT
✅ Drop-In✓ In Stock
$4.46 / Unit
View Datasheet →DSPIC33FJ128MC204-I/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$2.2 / Unit
View Datasheet →DSPIC33FJ128MC708A-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33FJ128MC710-I/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$6.9 / Unit
View Datasheet →DSPIC33FJ128MC804-I/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | 16-bit dsPIC33F Modified Harvard |
| Program Memory (Flash) | 128 KB |
| Data RAM | 16 KB |
| Operating Frequency | 40 MIPS (max) |
| Package | 44-pin TQFP (PT) 10x10 mm |
| PWM Channels | Up to 9 (16-bit) with dedicated Fault inputs |
| ADC | 10-bit, up to 1.1 Msps, up to 13 channels |
| Analog Comparators | 2 |
| DMA Channels | 8 |
| UART | 2 |
| SPI | 2 |
| I2C | 1 |
| Parallel Master Port (PMP) | Yes |
| Timers | 5 (16-bit) |
| Peripheral Pin Select (PPS) | Yes (16-bit/32-bit I/O remap) |
| Operating Temperature | -40C to +85C (Industrial -I grade) |
| Supply Voltage | 3.0 V to 3.6 V |
| Mounting Type | Surface Mount |
| MSL Level | 3 (per JEDEC J-STD-020) |
| RoHS Status | Compliant |
DSPIC33FJ128MC804-I/PT Pin Configuration
| Pin 1 | RP15/PWM3H/PMD3 — Remappable I/O / PWM output / PMP data line |
| Pin 2 | RP14/PWM3L/PMD2 — Remappable I/O / PWM complementary output / PMP data line |
| Pin 3 | RP13/PWM2H/PMD1 — Remappable I/O / PWM output / PMP data line |
| Pin 4 | RP12/PWM2L/PMD0 — Remappable I/O / PWM complementary output / PMP data line |
| Pin 5 | RP11/PWM1H/PMWR — Remappable I/O / PWM output / PMP write strobe |
| Pin 6 | RP10/PWM1L/PMRD — Remappable I/O / PWM complementary output / PMP read strobe |
| Pin 7 | RP9/PWM4H — Remappable I/O / PWM output |
| Pin 8 | RP8/PWM4L — Remappable I/O / PWM complementary output |
| Pin 9 | VSS — Ground reference |
| Pin 10 | OSCI/CLKI/RC12 — Crystal oscillator input / external clock |
| Pin 11 | OSCO/CLKO/RC15 — Crystal oscillator output |
| Pin 12 | RP7/RC13 — Remappable I/O |
| Pin 13 | RP6/RC14 — Remappable I/O |
| Pin 14 | AVDD — Analog supply voltage (3.0-3.6V) |
| Pin 15 | AVSS — Analog ground reference |
| Pin 16 | AN0/VREF+/CVREF+/RA0 — ADC input / voltage reference + |
| Pin 17 | AN1/VREF-/CVREF-/RA1 — ADC input / voltage reference - |
| Pin 18 | AN2/RA2 — ADC input |
| Pin 19 | AN3/RA3 — ADC input |
| Pin 20 | AN4/RA4 — ADC input |
| Pin 21 | AN5/RA5 — ADC input |
| Pin 22 | AN6/RA6 — ADC input |
| Pin 23 | AN7/RA7 — ADC input |
| Pin 24 | AN8/RB0 — ADC input / remappable I/O |
| Pin 25 | AN9/RB1 — ADC input / remappable I/O |
| Pin 26 | AN10/RB2 — ADC input / remappable I/O |
| Pin 27 | AN11/RB3 — ADC input / remappable I/O |
| Pin 28 | AN12/RB4 — ADC input / remappable I/O |
| Pin 29 | VSS — Ground reference |
| Pin 30 | VDD — Digital supply voltage (3.0-3.6V) |
| Pin 31 | RP5/RB5 — Remappable I/O |
| Pin 32 | RP4/RB6 — Remappable I/O |
| Pin 33 | RP3/RB7 — Remappable I/O |
| Pin 34 | RP2/RB8 — Remappable I/O |
| Pin 35 | RP1/RB9 — Remappable I/O |
| Pin 36 | RP0/RB10 — Remappable I/O |
| Pin 37 | FLT32/RP18 — PWM Fault input 32 / remappable I/O |
| Pin 38 | FLT31/RP17 — PWM Fault input 31 / remappable I/O |
| Pin 39 | PWM5H/RP16 — PWM output / remappable I/O |
| Pin 40 | PWM5L/RP19 — PWM complementary output / remappable I/O |
| Pin 41 | PWM6H/RP20 — PWM output / remappable I/O |
| Pin 42 | PWM6L/RP21 — PWM complementary output / remappable I/O |
| Pin 43 | PWM7H/RP22 — PWM output / remappable I/O |
| Pin 44 | PWM7L/RP23 — PWM complementary output / remappable I/O |
Typical Applications
DSPIC33FJ128MC804-I/PT is suitable for 7 applications: 3-Phase BLDC/PMSM Sensorless FOC Motor Control, Digital Solar Micro-Inverter / PFC Stage, Industrial PLC and Process Control, Switch-Mode Power Supply (SMPS) Digital Control, Sensorless Fan / Pump Speed Controller, Automotive Body Electronics (Non-Safety), Audio Amplifier / DSP Pre-Processing.
3-Phase BLDC/PMSM Sensorless FOC Motor Control
The DSPIC33FJ128MC804-I/PT is purpose-built for sensorless field-oriented control of 3-phase BLDC and PMSM motors. Its 9-channel MCPWM block provides complementary 16-bit PWM outputs with programmable dead-time and ADC-trigger synchronization, eliminating CPU overhead for switching event timing. The 40 MIPS DSP engine executes Clarke/Park transforms and sliding-mode observer (SMO) position estimators in under 5 us per PWM cycle. The 10-bit 1.1 Msps ADC with 13 channels samples three phase currents plus DC-bus voltage simultaneously, while the 8-channel DMA streams conversions directly into SRAM without CPU intervention. Engineers should configure DMA channels for ADC-before-ISR data movement to keep the inner current loop under 5 us.
Recommended
Digital Solar Micro-Inverter / PFC Stage
The DSPIC33FJ128MC804-I/PT drives single-phase or interleaved solar micro-inverters and power-factor-correction (PFC) boost stages at switching frequencies up to 100 kHz. The MCPWM block generates boost PFC switch gate signals with current-mode control timing, while the on-chip analog comparators provide hardware-cycle-by-cycle overcurrent protection. The 16-bit DSP datapath runs MPPT algorithms (Perturb-and-Observe or Incremental Conductance) and RMS current calculations in real time. The integrated 10-bit ADC samples input voltage, inductor current, and output voltage simultaneously. For grid-tie applications, the UART or SPI peripheral can drive an external grid-monitor IC for anti-islanding detection.
Recommended
Industrial PLC and Process Control
The DSPIC33FJ128MC804-I/PT serves as the control processor in compact industrial PLC modules, managing PID loops for temperature, pressure, and flow with deterministic interrupt latency. The 5-timer module supports multiple time bases for PID update rates from 1 kHz down to 1 Hz. The PMP peripheral interfaces with external LCD or expansion I/O modules, while UART/SPI/I2C connect to industrial sensor buses (Modbus RTU over UART, SPI sensors). The 128 KB Flash accommodates complex ladder-logic interpreters or IEC 61131-3 runtime, and 16 KB SRAM handles data tables and stack. Industrial -40C to +85C operating range is met by the -I temperature grade.
Recommended
Switch-Mode Power Supply (SMPS) Digital Control
The DSPIC33FJ128MC804-I/PT implements digital control loops for isolated and non-isolated SMPS topologies including buck, boost, half-bridge, and full-bridge converters. The high-speed ADC samples output voltage and current at up to 1.1 Msps, enabling digital peak-current-mode control at switching frequencies up to 500 kHz. The PWM block drives primary-side MOSFETs with programmable dead-time, while hardware Fault inputs provide nanosecond-scale overcurrent shutdown. The DSP engine executes voltage-mode and current-mode compensators (Type-II/Type-III) using floating-point math emulated in fixed-point, with cycle times well under 10 us.
Recommended
Sensorless Fan / Pump Speed Controller
The DSPIC33FJ128MC804-I/PT drives BLDC fan and pump motors in HVAC and appliance applications using back-EMF sensing for commutation without Hall sensors. The MCPWM block commutates the 3-phase bridge based on firmware-decoded zero-crossing events from the analog comparators, eliminating the cost of Hall-effect sensors. The 40 MIPS CPU runs back-EMF integration and speed-PI loops in firmware. The integrated 10-bit ADC monitors supply voltage for brownout detection and provides soft-start ramp profiling. The 16 KB SRAM is ample for storing speed profiles, fault logs, and lookup tables for BEMF-to-speed conversion.
Recommended
Automotive Body Electronics (Non-Safety)
The DSPIC33FJ128MC804-I/PT powers non-safety automotive body modules such as HVAC flap actuators, headlight leveling motors, and power-window anti-pinch controllers. The MCPWM generates precise stepper or DC-motor drive waveforms with hardware-Fault shutdown, while the ADC monitors position-feedback potentiometers or current-sense shunts. The 5 timers support multiple time bases for motor ramps and anti-pinch detection algorithms. For harsh under-hood environments, the -H (high-temperature) variant operates at -40C to +150C. UART connects to the vehicle CAN/LIN gateway via an external transceiver.
Recommended
Audio Amplifier / DSP Pre-Processing
The DSPIC33FJ128MC804-I/PT serves as a digital pre-processor for Class-D audio amplifiers, providing EQ, dynamic-range compression, and speaker-protection algorithms in real time. The DSP engine's 16x16 MAC and 40-bit accumulator are well-suited to IIR/FIR biquad filters at 48 kHz sample rates. The 10-bit ADC handles line-input audio digitization, while the MCPWM generates the Class-D switching carrier with hardware dead-time. UART/SPI interfaces connect to a host controller for streaming audio over I2S or USB. The 128 KB Flash supports multi-band compressor presets and user-customizable EQ profiles stored in non-volatile memory.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33FJ128MC804-I/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33FJ128MC804-E/PT | DSPIC33FJ128MC804-H/PT | DSPIC33FJ128GP804-I/PT | DSPIC33FJ128MC204-I/PT | DSPIC33FJ128MC708A-I/PT |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | TQFP-44 (PT) 10x10 mm | TQFP-44 (PT) 10x10 mm - same | TQFP-44 (PT) 10x10 mm - same | TQFP-44 (PT) 10x10 mm - same | TQFP-44 (PT) 10x10 mm - same | TQFP-44 (PT) 10x10 mm - same |
| Program Memory (Flash) | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB |
| Data RAM | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB |
| CPU Speed | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS |
| PWM Channels | 9 (16-bit, MCPWM) | 9 (16-bit, MCPWM) | 9 (16-bit, MCPWM) | 9 (general-purpose PWM, no MCPWM) | 6 (16-bit, MCPWM) | 8 (16-bit, MCPWM) |
| ADC | 10-bit, 1.1 Msps, 13 ch | 10-bit, 1.1 Msps, 13 ch | 10-bit, 1.1 Msps, 13 ch | 10-bit, 1.1 Msps, 13 ch | 10-bit, 1.1 Msps, 13 ch | 10-bit, 1.1 Msps, 13 ch |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +125C (Extended) | -40C to +150C (High-temp) | -40C to +85C (Industrial) | -40C to +85C (Industrial) | -40C to +85C (Industrial) |
Key Differentiators
- Dedicated Motor Control PWM (MCPWM) with hardware Fault inputs and ADC-trigger (vs DSPIC33FJ128GP804-I/PT)
- Industrial -I temperature grade vs Extended -E temperature grade (vs DSPIC33FJ128MC804-E/PT)
- Pin-compatible with -E and -H temperature grades for design reuse (vs DSPIC33FJ128MC804-H/PT)
Design Notes
Place a 10 uF bulk capacitor and 0.1 uF decoupling ceramic as close as possible to the VDD pin (pin 30), with separate AVDD filtering (pin 14). The dsPIC33F's on-chip voltage regulator requires both VDD and AVDD bypassed; AVDD noise above 50 mVpk-pk degrades ADC ENOB. Estimated: at 40 MIPS CPU with all peripherals active, the part draws approximately 70 mA - design the 3.3 V rail for at least 100 mA headroom. Use a ferrite bead between digital and analog supply planes for noise isolation.
Estimated: at full 40 MIPS with all peripherals active, junction temperature rise above ambient is approximately 8-10 C/W (theta_JA of 44-pin TQFP is approximately 50 C/W on a 4-layer JEDEC test PCB). For continuous operation at +85C ambient, the junction should remain below +125C, leaving 40 C of margin - generally adequate without active cooling. For -H grade variants in +125C ambient, validate with a thermal probe on a sample board. Avoid placing the IC adjacent to high-current power stages.
The 44-pin TQFP (PT) has 0.8 mm pitch - use 0.4 mm-wide traces and via-in-pad for ground returns on the exposed pad. Route PWM outputs as differential pairs (PWMxH/PWMxL) with matched length to within 1 mm to preserve dead-time symmetry; mismatched traces skew effective dead-time and can cause shoot-through. Keep analog traces (AN0-AN12) away from PWM switching nodes by at least 3 trace-widths. Place the decoupling capacitor loop area under 5 mm^2 to minimize inductance.
Do not leave unused PWM outputs floating - tie them to ground through 10 kOhm resistors to prevent noise injection. When migrating code from dsPIC30F, the Peripheral Pin Select (PPS) registers must be unlocked via the IOLOCK sequence - firmware that runs on dsPIC30F will not configure PPS on the dsPIC33F and will appear to hang. Also note that the dsPIC33F ADC requires the AD1PCFGL register to configure analog/digital mode on shared ANx pins; leaving it at reset disables the ADC entirely. Always read the errata sheet before finalizing the design.
Compliance Information
RoHS and REACH compliant per Microchip product page. Standard -I/PT variant is NOT AEC-Q100 qualified - choose -H/PT variant for automotive high-temperature applications. Lead-free and halogen-free per Microchip material declaration.