DSPIC33FJ128GP804-I/PT - 16-bit DSC 40 MIPS 128KB Flash | Microchip
MPN: DSPIC33FJ128GP804-I/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $6.92 | $6.92 |
| 10 | $6.23 | $62.30 |
| 100 | $5.54 | $554.00 |
| 500 | $4.98 | $2,490.00 |
| 1,000 | $4.46 | $4,460.00 |
DSPIC33FJ128GP804-I/PT Overview
A digital signal controller combines the control peripherals and ease of use of a microcontroller with the computational throughput of a digital signal processor. Within the power-management and embedded-control hierarchy, the DSC sits between a general-purpose MCU and a dedicated DSP: it executes a modified Harvard 16-bit architecture with DSP-enhanced instructions (MAC, DSP multiply), making it a strong fit for closed-loop control loops that also need math-intensive signal processing.
Key features include 8 DMA channels that move data between peripherals and RAM without CPU intervention, Peripheral Pin Select (PPS) that remaps digital peripherals to almost any pin, and 7 timers plus 3 external interrupt sources. The GP (general purpose) variant integrates advanced analog and audio-grade peripherals such as a 10/12-bit ADC and multiple serial interfaces (3 serial I/O ports) suitable for UART, SPI and I2C connectivity.
Architecturally, the dsPIC33F core supports seamless migration to and from PIC24HJ and dsPIC30F families; Microchip documents that dsPIC33FJ devices are pin compatible with the PIC24HJ family, which protects software and PCB investments. Operating voltage is nominally 3.0V to 3.6V with internal regulators supporting the 40 MIPS top frequency.
Typical applications include digital power supplies and switch-mode converters, motor control and BLDC drives, audio processing and effects, and industrial sensing and instrumentation where DMA-backed ADC streaming is required.
A key design consideration: at 40 MIPS the device must be operated within its documented voltage and temperature envelope, and the 44-TQFP thermal pad area on the PCB should be well connected to ground planes for heat spreading.
This page synthesizes distributor availability data, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in alternatives for DSPIC33FJ128GP804-I/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33FJ128GP804-I/PT (same form factor and footprint) — differing in Core Architecture, Operating Temperature, Package, Timers, Supply Voltage.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33FJ128GP804-E/PT
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33FJ64GP804-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33FJ128MC804-I/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$4.25 / Unit
View Datasheet →DSPIC33FJ64MC804-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
PIC24HJ128GP504-I/PT
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33FJ128GP804-I/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | 16-bit dsPIC33F modified Harvard, RISC |
| Maximum CPU Frequency | 40 MHz (40 MIPS) |
| Program Memory Size | 128 KB Flash |
| RAM Size | 16 KB SRAM |
| Data Bus Width | 16 bit |
| DMA Channels | 8 |
| Timers | 7 |
| External Interrupts | 3 |
| Serial I/O Ports | 3 |
| Peripheral Pin Select (PPS) | Yes |
| Operating Temperature | -40C to +85C (I grade) |
| Package | 44-TQFP (10x10 mm), 0.8 mm pitch |
| Mounting Type | Surface Mount |
| EU RoHS | Compliant |
| ECCN (US) | 3A991a.2 |
| HTS Code | 8542.31.00.20 |
| Automotive Qualification | No (No PPAP) |
| Instruction Set | RISC with DSP-enhanced instructions |
DSPIC33FJ128GP804-I/PT 44-tqfp (10x10 mm), 0.8 mm pitch Pin Configuration Guide
Pin configuration for DSPIC33FJ128GP804-I/PT (44-tqfp (10x10 mm), 0.8 mm pitch package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for DSPIC33FJ128GP804-I/PT.
Refer to the datasheet for full pin configuration.
Typical Applications
DSPIC33FJ128GP804-I/PT is suitable for 6 applications: Digital Power Supplies, Motor Control and Drives, Audio Processing and Effects, Industrial Sensing and Instrumentation, Embedded Control and IoT Nodes, Test and Measurement Equipment.
Digital Power Supplies
The DSPIC33FJ128GP804-I/PT fits digital switch-mode power supply control because its 40 MIPS dsPIC33F core executes proportional-integral control loops with DSP-enhanced multiply-accumulate instructions at deterministic rates, while 8 DMA channels stream ADC conversion results into RAM without CPU overhead. The GP variant's advanced analog front end samples voltage and current feedback for peak-current or voltage-mode control. Placed as the sole supervisory controller, it runs the compensation loop in the interrupt service routine and handles housekeeping, telemetry and communication on the main loop. The quantified benefit is deterministic loop timing: DSP MAC throughput at 40 MIPS supports switching-frequency-proportional control bandwidth that a general-purpose MCU at the same clock often cannot sustain.
Recommended
Motor Control and Drives
For BLDC, PMSM and ACIM control, the DSPIC33FJ128GP804-I/PT provides the 40 MIPS core needed for field-oriented control mathematics and the DMA throughput to keep ADC current-sense sampling synchronized to PWM events. When dedicated motor-control PWM hardware is mandatory, the pin-compatible DSPIC33FJ128MC804-I/PT in the same 44-TQFP footprint is the family-native choice, allowing a PCB designed for the GP804 to accept the MC804 without rework. Peripheral Pin Select lets UART diagnostics and encoder inputs be routed to convenient physical pins during board bring-up. The practical benefit is one validated footprint covering both general-purpose and motor-control firmware variants, reducing qualification effort across product families that share a control board.
Recommended
Audio Processing and Effects
The GP (general purpose) dsPIC33FJ family is positioned by Microchip for audio applications, and the DSPIC33FJ128GP804-I/PT suits audio effects, mixing and codec-adjacent processing: its DSP MAC instructions execute FIR/IIR filters efficiently at 40 MIPS, 16 KB SRAM buffers multiple audio frames, and DMA channels service serial audio and control interfaces without CPU intervention. Three serial I/O ports connect codecs, EEPROM and a host controller simultaneously. Because the core runs from a 3.0V-3.6V supply, it interfaces cleanly with 3.3V audio codecs. The trade-off versus a dedicated audio DSP is lower raw MAC throughput, but the integrated control peripherals and single-chip footprint typically win at low channel counts and in embedded products with UI and communications requirements.
Recommended
Industrial Sensing and Instrumentation
In industrial data acquisition, the DSPIC33FJ128GP804-I/PT combines the GP family's advanced analog with DMA-backed sample streaming, letting the ADC feed conversion results directly to RAM while the 40 MIPS core performs digital filtering, linearization and compensation math. The -40C to +85C industrial rating and RoHS-compliant 44-TQFP package suit factory-floor enclosures, and Peripheral Pin Select allows UART, SPI and I2C links to PLC backbones or displays to be mapped where the PCB routing requires. With 128 KB Flash there is headroom for calibration tables, communication stacks and diagnostic logging. The measurable benefit is deterministic sampling: DMA eliminates interrupt-latency jitter in the sample stream, improving measurement repeatability in multichannel acquisition systems.
Recommended
Embedded Control and IoT Nodes
As a general embedded controller, the DSPIC33FJ128GP804-I/PT offers 128 KB Flash and 16 KB SRAM - enough for a communication stack, state machine and local signal processing - with 7 timers, 3 external interrupts and 3 serial I/O ports covering typical node peripherals. Peripheral Pin Select is the standout feature for IoT and industrial node designs: digital peripherals remap to almost any pin, which shortens PCB revisions and lets one firmware image support multiple board variants. DMA channels offload UART and SPI traffic so the core stays in low-power idle between events, per Microchip's low-power mode design intent. For battery-powered nodes the 3.0V-3.6V supply and sleep/idle modes keep average current low while retaining responsive wake-up via external interrupts.
Recommended
Test and Measurement Equipment
Bench and portable test instruments benefit from the DSPIC33FJ128GP804-I/PT as a real-time acquisition and control processor: DMA-serviced ADC channels capture waveforms while the DSP-enhanced core computes RMS, FFT or threshold logic, and the 40 MIPS budget leaves room for trigger decisioning within one sample period. Three serial I/O ports separate instrument control (USB-UART or SPI to a host), display interface and calibration memory on independent buses, avoiding contention. The 44-pin TQFP with Peripheral Pin Select adapts the same controller across instrument variants by remapping pins rather than respinning hardware. Prototyping is accelerated by Microchip's Explorer 16/32 Development Board, which supports dsPIC33F devices through Plug-In Modules for rapid firmware iteration before board-level commitment.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33FJ128GP804-I/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33FJ128GP804-E/PT | DSPIC33FJ64GP804-I/PT | DSPIC33FJ128MC804-I/PT | PIC24HJ128GP504-I/PT |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 44-TQFP (10x10 mm) | 44-TQFP (10x10 mm) - same | 44-TQFP (10x10 mm) - same | 44-TQFP (10x10 mm) - same | 44-TQFP (10x10 mm) - same |
| Program Memory (Flash) | 128 KB | 128 KB | 64 KB | 128 KB | 128 KB |
| Core / Max Throughput | dsPIC33F, 40 MIPS, DSP MAC | dsPIC33F, 40 MIPS, DSP MAC | dsPIC33F, 40 MIPS, DSP MAC | dsPIC33F, 40 MIPS, DSP MAC | PIC24HJ, 40 MIPS, no DSP MAC |
| Operating Temperature | -40C to +85C (I) | Extended (E) grade - higher than +85C | -40C to +85C (I) | -40C to +85C (I) | -40C to +85C (I) |
| Peripheral Emphasis | General purpose (GP) analog/serial | General purpose (GP) | General purpose (GP) | Motor control (MC) PWM peripherals | General purpose MCU peripherals |
Key Differentiators
- Full 128 KB Flash in the smallest GP804-family code density (vs DSPIC33FJ64GP804-I/PT)
- Extended temperature option on the same die (vs DSPIC33FJ128GP804-E/PT)
- DSP-enhanced core vs PIC24HJ pin-compatible MCU (vs PIC24HJ128GP504-I/PT)
- General-purpose analog mix vs motor-control peripherals (vs DSPIC33FJ128MC804-I/PT)
Design Notes
The dsPIC33FJ family operates from a nominal 3.0V to 3.6V supply; confirm the exact operating voltage range for the 40 MIPS speed grade in the manufacturer datasheet before finalizing the rail design (this page's spec list marks it [DATA_NEEDED]). Decouple VDD/VDDCORE per the datasheet power-up requirements with low-ESR ceramic capacitors placed within a few millimeters of the pins, and verify that the internal regulator sequencing does not require external delay components for your supply ramp rate.
Use a 10x10 mm 44-TQFP land pattern with 0.8 mm pitch per IPC-aware footprint generation, and flood unused area under the package with ground. Peripheral Pin Select (PPS) is the key layout lever: because most digital peripherals remap to any PPS-capable pin, you can optimize routing first and assign pin functions in firmware afterwards, which often removes the need for a board respin. Reserve programming/test access to the In-Circuit Serial Programming pins even when PPS reassigns neighboring functions.
Three pitfalls recur on dsPIC33FJ designs. First, the -I/PT grade stops at +85C - if the enclosure can exceed this, specify the -E/PT extended-temperature part, which is pin-identical. Second, DSP MAC performance depends on correct RAM addressing modes; unoptimized C loops can cost multiple cycles per tap versus the hardware MAC path. Third, the device is not automotive qualified (Arrow lists Automotive: No, PPAP: No), so it must not be released into automotive programs without a qualified part number substitution.
Keep the ADC analog reference clean when sampling via DMA at high rates: separate the analog supply/ground from digital switching with a ferrite or star connection, and route feedback traces away from the crystal and fast digital buses. Use the DMA in ping-pong (double-buffer) mode so the core never stalls the converter while processing the previous buffer - this is the pattern shown in Microchip's digital power and audio reference designs for the dsPIC33F family.
Compliance Information
EU RoHS Compliant per Arrow product listing; HTS 8542.31.00.20; ECCN 3A991a.2; Automotive: No; PPAP: No. REACH, halogen-free and conflict-minerals status not stated in the provided data.
