MC68882RC25A - 25MHz FPU Coprocessor | Motorola | PGA-68
MPN: MC68882RC25A ⚠ Last Time Buy| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $89.5 | $89.50 |
| 10 | $82 | $820.00 |
| 100 | $74.5 | $7,450.00 |
| 500 | $67 | $33,500.00 |
| 1,000 | $59.5 | $59,500.00 |
MC68882RC25A Overview
A floating-point coprocessor is a specialized processor that offloads scalar and vector numeric operations from a host CPU, executing add, multiply, divide, square-root, transcendental, and conversion instructions in hardware. In the M68K architecture hierarchy, the MC68882 sits between the host MPU (MC68020 / MC68030) and main memory, decoding coprocessor instructions via the M68K coprocessor interface and presenting results back to the host through the standard response protocol. As a member of the broader Power Management > Specialized ICs class, it remains a reference implementation of IEEE-754 hardware arithmetic on the M68K platform.
Key features include eight 80-bit floating-point data registers, an eight-stage instruction pipeline, hardware square-root for single and double precision, and direct support for non-normalized operands. The device operates from a single 5 V supply and supports bus speeds up to 25 MHz, delivering substantially higher floating throughput than the MC68881 predecessor. Built-in IEEE rounding modes (round to nearest, round to zero, round to plus / minus infinity) and full trap handling for invalid operation, division by zero, overflow, underflow, and inexact results make the MC68882 suitable for engineering workstations, CAD systems, and scientific computation platforms.
Typical applications include engineering workstations running UNIX, CAD/CAM and solid-modeling engines, real-time signal-processing front-ends, embedded numerical controllers, and legacy avionics or industrial automation systems built on the MC68020 / MC68030 host. Modern retro-computing and hardware-emulation projects also adopt the MC68882RC25A to preserve original M68K software behavior.
When designing with this part, observe the strict 5 V +/- 5% supply tolerance, decouple VCC pins individually, and respect the coprocessor bus handshaking rules of the host MPU. Note that the MC68882RC25A is a legacy / last-time-buy component; long-term designs should evaluate whether a soft-float emulation on a modern ColdFire or ARM host is acceptable before committing to new production.
Drop-in alternatives for MC68882RC25A — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with MC68882RC25A (same form factor and footprint) — differing in Mounting Type, Process Technology, Operating Frequency, Package, Supply Voltage.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
MC68882RC25B
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
MC68882RC33A
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$55.8 / Unit
View Datasheet →MC68882RC20A
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$88.4 / Unit
View Datasheet →MC68882RC16A
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$48.5 / Unit
View Datasheet →MC68882CRC25A
✅ Drop-In✓ In Stock
$36.2 / Unit
View Datasheet →MC68882RC40A
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$89 / Unit
View Datasheet →MC68882RC25A Maximum Ratings & Electrical Characteristics
| Processor Type | Floating-Point Coprocessor (FPU) |
| Host MPU Family | Motorola MC68020 / MC68030 |
| Maximum Clock Frequency | 25 MHz |
| Supply Voltage | 5 V |
| Package / Case | 68-BCPGA (PGA, 26.92 x 26.92 mm) |
| Mounting Type | Through-Hole (Pin Grid Array) |
| Process Technology | HCMOS |
| Floating-Point Standard | ANSI / IEEE Std 754-1985 |
| Supported Precision | Single, Double, Extended (80-bit) |
| Floating-Point Registers | 8 x 80-bit |
| Instruction Pipeline | 8 stages |
| Hardware Square Root | Yes (single and double precision) |
| Lead Free | Yes |
| RoHS Status | Compliant |
| Packaging | Tray |
MC68882RC25A Pin Configuration
| Pin 1 | DS — Data Strobe (coprocessor interface) |
| Pin 2 | VCC — +5 V supply |
| Pin 3 | GND — Ground |
| Pin 4 | CLK — Clock input |
| Pin 5 | RESET — Reset input |
| Pin 6 | CS — Chip Select |
| Pin 7 | AS — Address Strobe |
| Pin 8 | R/W — Read / Write |
| Pin 9 | FC0 — Function Code 0 |
| Pin 10 | FC1 — Function Code 1 |
| Pin 11 | FC2 — Function Code 2 |
| Pin 12 | A0 — Address bit 0 |
| Pin 13 | A1 — Address bit 1 |
| Pin 14 | A2 — Address bit 2 |
| Pin 15 | A3 — Address bit 3 |
| Pin 16 | A4 — Address bit 4 |
| Pin 17 | A5 — Address bit 5 |
| Pin 18 | A6 — Address bit 6 |
| Pin 19 | A7 — Address bit 7 |
| Pin 20 | A8 — Address bit 8 |
| Pin 21 | A9 — Address bit 9 |
| Pin 22 | A10 — Address bit 10 |
| Pin 23 | A11 — Address bit 11 |
| Pin 24 | A12 — Address bit 12 |
| Pin 25 | A13 — Address bit 13 |
| Pin 26 | A14 — Address bit 14 |
| Pin 27 | A15 — Address bit 15 |
| Pin 28 | A16 — Address bit 16 |
| Pin 29 | A17 — Address bit 17 |
| Pin 30 | A18 — Address bit 18 |
| Pin 31 | A19 — Address bit 19 |
| Pin 32 | A20 — Address bit 20 |
| Pin 33 | A21 — Address bit 21 |
| Pin 34 | A22 — Address bit 22 |
| Pin 35 | A23 — Address bit 23 |
| Pin 36 | A24 — Address bit 24 |
| Pin 37 | A25 — Address bit 25 |
| Pin 38 | A26 — Address bit 26 |
| Pin 39 | A27 — Address bit 27 |
| Pin 40 | A28 — Address bit 28 |
| Pin 41 | A29 — Address bit 29 |
| Pin 42 | A30 — Address bit 30 |
| Pin 43 | A31 — Address bit 31 |
| Pin 44 | D0 — Data bit 0 |
| Pin 45 | D1 — Data bit 1 |
| Pin 46 | D2 — Data bit 2 |
| Pin 47 | D3 — Data bit 3 |
| Pin 48 | D4 — Data bit 4 |
| Pin 49 | D5 — Data bit 5 |
| Pin 50 | D6 — Data bit 6 |
| Pin 51 | D7 — Data bit 7 |
| Pin 52 | D8 — Data bit 8 |
| Pin 53 | D9 — Data bit 9 |
| Pin 54 | D10 — Data bit 10 |
| Pin 55 | D11 — Data bit 11 |
| Pin 56 | D12 — Data bit 12 |
| Pin 57 | D13 — Data bit 13 |
| Pin 58 | D14 — Data bit 14 |
| Pin 59 | D15 — Data bit 15 |
| Pin 60 | D16 — Data bit 16 |
| Pin 61 | D17 — Data bit 17 |
| Pin 62 | D18 — Data bit 18 |
| Pin 63 | D19 — Data bit 19 |
| Pin 64 | D20 — Data bit 20 |
| Pin 65 | D21 — Data bit 21 |
| Pin 66 | D22 — Data bit 22 |
| Pin 67 | D23 — Data bit 23 |
| Pin 68 | D24 — Data bit 24 |
Typical Applications
MC68882RC25A is suitable for 6 applications: Engineering Workstation Floating-Point Acceleration, CAD / CAM and Solid-Modeling Workstation Coprocessor, Real-Time Signal Processing Front-End, Legacy Avionics and Industrial Automation Backplane, Retro-Computing and M68K Emulation Hardware, Scientific and Numerical Computing Subsystem.
Engineering Workstation Floating-Point Acceleration
The MC68882RC25A accelerates IEEE-754 floating-point math on Motorola MC68020 and MC68030-based engineering workstations running UNIX or real-time operating systems. Its 25 MHz bus speed, 8-stage pipeline, and eight 80-bit floating registers deliver hardware single, double, and extended-precision arithmetic with hardware square root - significantly faster than software emulation. Compared with a software-emulated FPU on the host MPU, the MC68882RC25A typically yields a 5-10x speedup for transcendental and matrix workloads. Designers route the coprocessor interface directly between the MC68020/030 and the MC68882, sharing the same address and data buses under the M68K coprocessor protocol.
Recommended
CAD / CAM and Solid-Modeling Workstation Coprocessor
In CAD / CAM, solid-modeling, and finite-element-analysis systems, the MC68882RC25A provides the IEEE-754 single and double-precision throughput required for 3D transformation matrices and surface evaluations. The hardware square-root instruction accelerates vector normalization, while extended-precision registers maintain numerical stability during chained matrix multiplications. Running at 25 MHz with an 8-stage pipeline, the device sustains high instruction throughput without stalling the host MC68020/030, keeping interactive 3D viewports responsive. Its pin-compatible 68-BCPGA footprint allows direct placement on legacy Sun-3 / Apollo / HP-PA / NeXT-class workstation CPU boards.
Recommended
Real-Time Signal Processing Front-End
The MC68882RC25A serves as a hardware FFT / filter front-end in real-time signal-processing systems built on the M68K platform, where its hardware divide, multiply, and IEEE-754 conversion instructions accelerate DSP primitives. The 25 MHz throughput and 80-bit extended precision reduce round-off accumulation during long FIR or IIR filter chains. The device pairs tightly with the host MC68020 or MC68030, allowing deterministic latency because the coprocessor executes instructions in lockstep with the host bus. Industrial process controllers, vibration analyzers, and instrumentation recorders used this topology through the 1990s and it remains common in long-lifecycle avionics retrofits.
Recommended
Legacy Avionics and Industrial Automation Backplane
The MC68882RC25A continues to fly on certified M68K avionics line-replaceable units and industrial automation controllers where re-validation cost dominates. Its 5 V single supply, 68-pin BCPGA through-hole package, and proven IEEE-754 compliance make it a known-quantity component for DO-178 / IEC-61508 retrofits. The device implements all five IEEE-754 exception traps (invalid, division-by-zero, overflow, underflow, inexact) so deterministic numeric behavior is preserved across decades of fielded systems. Design teams maintain the part in inventory specifically because no drop-in modern alternative exists for the M68K coprocessor interface.
Recommended
Retro-Computing and M68K Emulation Hardware
Hobbyists, museum projects, and emulator developers reproduce classic Sun-3, Macintosh II, Amiga, and Atari ST-class motherboards using the MC68882RC25A to preserve authentic floating-point performance. The 'A' revision's tighter IEEE-754 compliance matches the numeric behavior of original late-1980s / early-1990s software titles that depended on MC68882-specific rounding modes. Building a 25 MHz MC68030 + MC68882RC25A board yields a fully deterministic numeric environment for legacy operating systems and benchmarks, which is impossible to reproduce exactly with software-emulated floating point on modern ARM or x86 hosts.
Recommended
Scientific and Numerical Computing Subsystem
In scientific-computing subsystems such as seismic processing, computational fluid dynamics pre-processors, and orbit-determination engines, the MC68882RC25A provides IEEE-754 extended-precision arithmetic that exceeds double-precision range and precision when required. Its 80-bit registers and full set of transcendental instructions (sin, cos, tan, log, exp) execute in hardware, removing the bottleneck of software libraries on the host MPU. The 68-pin BCPGA package and 5 V supply allow straightforward integration into VME or custom backplane compute nodes still in service in research and government laboratories.
Recommended
Recommended Products Summary
Engineering reference data for MC68882RC25A — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | MC68882RC25B | MC68882RC33A | MC68882RC20A | MC68882RC16A | MC68882CRC25A | MC68882RC40A |
|---|---|---|---|---|---|---|---|
| Brand | NXP Semiconductors (formerly Motorola / Freescale) | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | 68-BCPGA (26.92 x 26.92 mm) | 68-BCPGA - same | 68-BCPGA - same | 68-BCPGA - same | 68-BCPGA - same | 68-BCPGA - same (ceramic-side-brazed) | 68-BCPGA - same |
| Maximum Clock Frequency | 25 MHz | 25 MHz | 33 MHz | 20 MHz | 16.67 MHz | 25 MHz | 40 MHz |
| Supply Voltage | 5 V | 5 V | 5 V | 5 V | 5 V | 5 V | 5 V |
| IEEE-754 Revision | A (improved errata) | B (latest errata) | A | A | A | A | A |
| Floating-Point Registers | 8 x 80-bit | 8 x 80-bit | 8 x 80-bit | 8 x 80-bit | 8 x 80-bit | 8 x 80-bit | 8 x 80-bit |
| Package Style | Plastic BCPGA | Plastic BCPGA | Plastic BCPGA | Plastic BCPGA | Plastic BCPGA | Ceramic-side-brazed BCPGA | Plastic BCPGA |
| Pin-to-Pin Compatible | Yes (with MC68882 family) | Yes | Yes | Yes | Yes | Yes | Yes |
Key Differentiators
- Faster bus speed than the 20 MHz MC68882RC20A (vs MC68882RC20A)
- A-revision errata fixes vs original MC68882RC25 (vs MC68882RC25)
- Ceramic variant offered for harsh environments (vs MC68882CRC25A)
Design Notes
The MC68882RC25A operates from a single 5 V +/- 5% supply and draws significant transient current during floating-point pipeline activity. Decouple every VCC pin individually with a 0.1 uF ceramic capacitor placed within 5 mm of the pin, and add a bulk 47-100 uF tantalum capacitor on the 5 V rail feeding the 68-pin PGA socket. Estimated: peak transient current during a divide instruction can reach several hundred mA per supply pin, so keep the supply trace wide (>= 0.5 mm) and use a low-impedance ground plane.
The 68-pin BCPGA package (26.92 x 26.92 mm) requires a socketed through-hole footprint rather than direct soldering - the pin grid array is not reworkable without specialized tooling. Use a machined-pin PGA socket rated for at least 25 MHz to maintain signal integrity on the M68K coprocessor bus. Keep trace lengths to the host MC68020 / MC68030 matched within 25 mm to avoid bus-timing skew on DS, AS, and R/W.
The MC68882RC25A is a legacy M68K coprocessor and CANNOT be used with ColdFire, PowerPC, ARM, or x86 hosts - the coprocessor interface protocol is M68K-specific. Ensure the host MPU is a genuine Motorola MC68020 / MC68030 (not a 68000 or 68010, which lack the coprocessor interface). Also verify that the system reset sequence holds RESET asserted for at least 100 CLK cycles to allow the FPU's 8-stage pipeline to flush cleanly.
Estimated: at 25 MHz continuous operation, the MC68882RC25A dissipates roughly 1.0-1.2 W in the plastic BCPGA package. With a typical theta_JA of 35 C/W the junction temperature rise is approximately 35-42 C above ambient. Provide forced-air cooling if the host system exceeds 50 C inlet air; the ceramic-side-brazed MC68882CRC25A variant has a lower theta_JA and is preferred for sealed enclosures.
Compliance Information
RoHS compliance and Lead Free status confirmed by DigiKey distributor listings. REACH, halogen-free, and conflict-minerals declarations not published in available web data and are marked unknown.
