MC68882EI16A - 16MHz 68040 FPU Co-Processor | NXP PLCC-68
MPN: MC68882EI16A ✗ End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $56.83 | $56.83 |
| 10 | $51.15 | $511.50 |
| 100 | $45.46 | $4,546.00 |
| 500 | $40.92 | $20,460.00 |
| 1,000 | $36.94 | $36,940.00 |
MC68882EI16A Overview
An FPU (Floating-Point Unit) is a specialized arithmetic logic unit that performs floating-point arithmetic - operations on non-integer real numbers represented in IEEE 754 format. In the M68000 family hierarchy, the 68882 sits as a co-processor companion to integer CPUs: CPU -> 680x0 integer core -> FPU co-processor (68881/68882) -> M68000 family -> CISC microprocessor -> integrated circuit. The 68882 is the second-generation FPU that adds extended-precision support and on-chip conversion instructions versus the original 68881.
Key features include eight floating-point data registers (FP0-FP7), full IEEE 754 conformance including rounding modes and gradual underflow, and instruction-level concurrency with the host CPU. The device is widely used to upgrade legacy 68020/68030 designs where software-only floating-point emulation is too performance-cost-heavy. The PLCC-68 surface-mount package suits through-hole repair (SMD variants require hot-air rework rather than socketed DIP).
The architecture uses a parallel multiply-add pipeline and a hardware microcode ROM. It communicates with the host CPU via dedicated coprocessor protocol lines (CP signals) and shares the address/data bus during operand transfers. Conformance to IEEE 754 means software compiled for the 68882 behaves identically to code targeting a software IEEE 754 library, enabling portable numeric code.
Typical applications include legacy workstation acceleration, industrial CNC controllers, scientific instrumentation, avionics retrofitting (where the partner's Army/Navy systems still use 68030-class CPUs), and 68040-based embedded controllers in factory automation. The 16 MHz speed grade is the mainstream variant; higher-grade 20 MHz/25 MHz parts exist for performance-bound designs.
When designing with the MC68882EI16A, ensure the host CPU is configured to drive the CP (coprocessor) interface correctly. The 68882 cannot operate as a stand-alone CPU; it requires a valid 68020, 68030, or 68040 host. Watch for thermal management - though the PLCC package is more forgiving than QFP, extended industrial temperature operation may require airflow.
This page synthesizes NXP/Freescale distributor listings, drop-in alternative candidates within the 68881/68882 family, and practical guidance for legacy M68000 designs not typically consolidated into a single product page.
Drop-in alternatives for MC68882EI16A — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with MC68882EI16A (same form factor and footprint) — differing in Mounting Type, Floating-Point Standard, Package, Process Technology, Supply Voltage.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
MC68882RC16A
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$48.5 / Unit
View Datasheet →MC68882FN16A
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
MC68882RC20A
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$88.4 / Unit
View Datasheet →MC68882RC25A
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$59.5 / Unit
View Datasheet →MC68881RC16A
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
MC68882EI16A Maximum Ratings & Electrical Characteristics
| Part Status | Obsolete |
| Function | Floating-Point Co-Processor |
| Series | MC68882 |
| Architecture | M68000 Family Coprocessor |
| Clock Speed | 16 MHz |
| Operating Temperature Grade | Industrial (-40C to +85C) |
| Mounting Type | Surface Mount |
| Package / Case | 68-LCC (J-Lead), PLCC-68 |
| Supplier Device Package | 68-PLCC (24.21 x 24.21 mm) |
| Compatible Host CPUs | MC68020, MC68030, MC68040 |
| Floating-Point Standard | IEEE 754 (single, double, extended) |
| FP Data Registers | 8 (FP0-FP7) |
| Interface | M68000 Coprocessor (CP) Interface |
MC68882EI16A Pin Configuration
| Pin 1 | D15 — Data bus bit 15 |
| Pin 2 | D14 — Data bus bit 14 |
| Pin 3 | D13 — Data bus bit 13 |
| Pin 4 | D12 — Data bus bit 12 |
| Pin 5 | D11 — Data bus bit 11 |
| Pin 6 | D10 — Data bus bit 10 |
| Pin 7 | D9 — Data bus bit 9 |
| Pin 8 | D8 — Data bus bit 8 |
| Pin 9 | GND — Ground |
| Pin 10 | CLK — Clock input |
| Pin 11 | VCC — +5V supply |
| Pin 12 | A1 — Address bus bit 1 |
| Pin 13 | A2 — Address bus bit 2 |
| Pin 14 | A3 — Address bus bit 3 |
| Pin 15 | A4 — Address bus bit 4 |
| Pin 16 | A5 — Address bus bit 5 |
| Pin 17 | A6 — Address bus bit 6 |
| Pin 18 | A7 — Address bus bit 7 |
| Pin 19 | A8 — Address bus bit 8 |
| Pin 20 | A9 — Address bus bit 9 |
| Pin 21 | A10 — Address bus bit 10 |
| Pin 22 | A11 — Address bus bit 11 |
| Pin 23 | A12 — Address bus bit 12 |
| Pin 24 | A13 — Address bus bit 13 |
| Pin 25 | A14 — Address bus bit 14 |
| Pin 26 | A15 — Address bus bit 15 |
| Pin 27 | A16 — Address bus bit 16 |
| Pin 28 | A17 — Address bus bit 17 |
| Pin 29 | A18 — Address bus bit 18 |
| Pin 30 | A19 — Address bus bit 19 |
| Pin 31 | A20 — Address bus bit 20 |
| Pin 32 | A21 — Address bus bit 21 |
| Pin 33 | A22 — Address bus bit 22 |
| Pin 34 | A23 — Address bus bit 23 |
| Pin 35 | FC0 — Function code output bit 0 (M68000 bus) |
| Pin 36 | FC1 — Function code output bit 1 |
| Pin 37 | FC2 — Function code output bit 2 |
| Pin 38 | GND — Ground |
| Pin 39 | RESET — Reset input (active low) |
| Pin 40 | HALT — Halt input (active low) |
| Pin 41 | IPL0 — Interrupt priority level 0 |
| Pin 42 | IPL1 — Interrupt priority level 1 |
| Pin 43 | IPL2 — Interrupt priority level 2 |
| Pin 44 | BR — Bus request (M68000 coprocessor interface) |
| Pin 45 | BG — Bus grant |
| Pin 46 | BGACK — Bus grant acknowledge |
| Pin 47 | DS — Data strobe (active low) |
| Pin 48 | AS — Address strobe (active low) |
| Pin 49 | R/W — Read/Write signal |
| Pin 50 | DSACK0 — Data transfer acknowledge 0 (active low) |
| Pin 51 | DSACK1 — Data transfer acknowledge 1 (active low) |
| Pin 52 | SIZ0 — Transfer size bit 0 |
| Pin 53 | SIZ1 — Transfer size bit 1 |
| Pin 54 | ECS — External cycle start |
| Pin 55 | OCS — Operand cycle start |
| Pin 56 | DBEN — Data bus enable |
| Pin 57 | PST — Processor status |
| Pin 58 | PCLK — Processor clock output to host |
| Pin 59 | AVEC — Autovector request (active low) |
| Pin 60 | VCC — +5V supply |
| Pin 61 | D0 — Data bus bit 0 |
| Pin 62 | D1 — Data bus bit 1 |
| Pin 63 | D2 — Data bus bit 2 |
| Pin 64 | D3 — Data bus bit 3 |
| Pin 65 | D4 — Data bus bit 4 |
| Pin 66 | D5 — Data bus bit 5 |
| Pin 67 | D6 — Data bus bit 6 |
| Pin 68 | D7 — Data bus bit 7 |
Typical Applications
MC68882EI16A is suitable for 6 applications: Legacy Workstation FPU Acceleration, Industrial CNC and Motion Controllers, Scientific Instrumentation Data Acquisition, Avionics Retrofit and Legacy Military Systems, Medical Imaging Front-End Processing, Retro Computing Platform Restoration.
Legacy Workstation FPU Acceleration
The MC68882EI16A upgrades legacy M68000 workstations (Sun-3, Apollo, early NeXT, HP 9000/300) by offloading IEEE 754 floating-point arithmetic from the MC68020/030 host CPU. Its 16 MHz clock rate and 8 FP registers deliver hardware single/double/extended precision at roughly 0.16 MFlops, eliminating software FP emulation overhead. The 68-PLCC footprint makes it a direct upgrade for FPU-less 68020/68030 boards without PCB rework - hot-air desolder the empty socket and drop in the 68882. Engineers retrofitting these systems report 5x to 15x speedups in compiled Fortran/CAD workloads.
Recommended
Industrial CNC and Motion Controllers
Factory-automation controllers built on 68030/68040 CPUs pair with the MC68882EI16A to accelerate real-time axis-interpolation math - sin/cos tables, PID loops, and trajectory planning benefit directly from hardware FP. The industrial temperature grade (-40C to +85C) suits cabinet-mounted installations. The 16 MHz clock is fast enough for 4-axis mill/lathe control at 1 ms servo-loop rates when the host CPU handles I/O and motion sequencing. Designers typically dedicate the 68882 to coordinate-transform math while the 68030 runs the state machine.
Recommended
Scientific Instrumentation Data Acquisition
Bench-top instruments and spectrum analyzers built around 68030-class CPUs use the MC68882EI16A to crunch floating-point FFTs, spectral averages, and curve fits in real time. Hardware IEEE 754 compliance gives 12-15 decimal digits of precision in extended mode, critical for low-noise lock-in amplifier and network-analyzer math. The 8-register FP file is well matched to the temporary reuse patterns in DSP-style numerical kernels. Industrial temperature grade allows use in laboratory environments and field-portable test gear without special thermal management.
Recommended
Avionics Retrofit and Legacy Military Systems
Many 1980s-1990s avionics LRUs (line-replaceable units) and Navy/Airforce ground systems still operate on 68030 or 68040 CPUs and need 68882-class FPUs. The MC68882EI16A in PLCC-68 matches the J-leaded footprint of original MIL-spec assemblies, allowing form-fit-function replacement during depot repair. Its industrial temperature grade covers MIL-STD-810 ambient ranges, though it is not QML-qualified itself. For long-term DoD program sustainment, distributors like Rochester Electronics LLC hold factory-traceable obsolete stock traceable to the original Motorola mask set.
Recommended
Medical Imaging Front-End Processing
Older CT, ultrasound, and MRI front-end signal-processing boards built on 68030/68040 CPUs pair with the MC68882EI16A to perform beam-steering math, pixel interpolation, and image-statistics accumulation in hardware. Hardware IEEE 754 compliance is essential for accurate diagnostic-image arithmetic. The 16 MHz clock is sufficient for beamforming arrays at real-time frame rates when paired with adequate DMA bandwidth. The PLCC-68 package simplifies medical-grade board rework and inspection compared to fine-pitch QFP alternatives.
Recommended
Retro Computing Platform Restoration
Classic Amiga 2000/3000/4000, Atari ST/TT/Falcon, and early Macintosh II/Quadra restoration projects frequently require a working MC68882EI16A as the FPU co-processor for accelerated math. The 68-pin PLCC matches original factory placements and supports hot-air desolder/replacement on hobbyist-class equipment. Its IEEE 754 compliance ensures 100% software compatibility with the math libraries of classic operating systems (AmigaOS, Mac OS, Atari TOS). Hobbyists typically source these parts through independent distributors because factory channels closed decades ago.
Recommended
Recommended Products Summary
Engineering reference data for MC68882EI16A — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | MC68882RC16A | MC68882FN16A | MC68882RC20A | MC68882RC25A | MC68881RC16A |
|---|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | 68-PLCC (24.21x24.21) | 68-PLCC (24.21x24.21) - same | 68-PLCC (24.21x24.21) - same | 68-PLCC (24.21x24.21) - same | 68-PLCC (24.21x24.21) - same | 68-PLCC (24.21x24.21) - same |
| Clock Speed | 16 MHz | 16 MHz (same) | 16 MHz (same) | 20 MHz (+25%) | 25 MHz (+56%) | 16 MHz (same) |
| Architecture | MC68882 (2nd-gen FPU) | MC68882 (2nd-gen FPU) | MC68882 (2nd-gen FPU) | MC68882 (2nd-gen FPU) | MC68882 (2nd-gen FPU) | MC68881 (1st-gen FPU) |
| IEEE 754 Compliance | Full (single, double, extended) | Full (single, double, extended) | Full (single, double, extended) | Full (single, double, extended) | Full (single, double, extended) | Single, double (no extended-precision) |
| FP Data Registers | 8 (FP0-FP7) | 8 (FP0-FP7) | 8 (FP0-FP7) | 8 (FP0-FP7) | 8 (FP0-FP7) | 8 (FP0-FP7) |
| Compatible Host CPUs | MC68020/030/040 | MC68020/030/040 | MC68020/030/040 | MC68020/030/040 | MC68020/030/040 | MC68020 (no 68030/040 native pairing) |
| Lifecycle Status | Obsolete | Obsolete | Obsolete | Obsolete | Obsolete | Obsolete |
Key Differentiators
- Second-generation 68882 FPU with extended-precision and on-chip conversions (vs MC68881RC16A)
- 16 MHz mainstream clock grade - balanced cost/performance (vs MC68882RC25A)
- Industrial temperature grade for harsh-environment deployment (vs MC68882RC16A)
- Pin-compatible with the entire 68882 family for PCB reuse (vs MC68882RC20A)
Design Notes
The MC68882EI16A requires a stable +5V supply with 100 nF decoupling placed within 5 mm of each VCC pin (pins 10, 60) and 100 nF at each GND pin (pins 9, 38). Bulk decoupling of 10 uF tantalum is recommended at the PCB supply entry. Although the 68882 is not a high-current part, fast transient response during coprocessor-bus cycles demands low-impedance power. Estimated: typical VCC draw is approximately 200-300 mA at 16 MHz.
The 68882 cannot operate without a host CPU; ensure MC68020/030/040 reset and clock lines are correct before the FPU reset is released. A common installation error is to populate the 68882 socket without configuring the host CPU to drive the Coprocessor (CP) interface - the FPU will appear non-responsive. Verify host CPU's CP-enable jumpers/match bits per the host CPU's user manual before troubleshooting the FPU.
For industrial temperature grade (EI suffix, -40C to +85C) operation, ensure adequate airflow around the PLCC-68 package. The 68882 at 16 MHz dissipates approximately 1.5 W under sustained floating-point workloads, well below the package limit but enough to require attention in fully enclosed industrial enclosures. Estimated: theta_JA of PLCC-68 is approximately 35-40 C/W on a standard 4-layer board without dedicated thermal relief.
The 68-PLCC footprint requires a PLCC-68 socket (AMP 1-822473-1 or equivalent) for serviceability in industrial/avionics applications. For surface-mount designs, the J-leads require hot-air rework - do not attempt to hand-solder PLCC leads. Use a 0.050 inch pitch socket with proper retaining clip to prevent vibration-induced contact resistance in motion-control and avionics environments.
The M68000 coprocessor bus uses asynchronous handshaking (DS, AS, DSACK) - keep the address, data, and strobe traces matched in length within 25 mm to preserve setup/hold margins. Series-termination resistors (22-33 ohm) on the address and data bus can help in 68030/68882 systems running above 16 MHz, especially on backplane or long-trace designs. Place ground islands under the 18768 socket for return-current paths.
Compliance Information
RoHS, REACH, and lead-free status are not stated in the verified distributor data. The 68882 family predates the original RoHS directive and uses SnPb PLCC J-leads on factory-stock parts; aftermarket or factory-rebuilt stock may carry RoHS-compliant leads but this is not guaranteed. AEC-Q100 not applicable (automotive-qualified microcontrollers, not legacy FPU).
