PCA9539PW/Q900,118 - 16-Bit I2C GPIO Expander | NXP
MPN: PCA9539PW/Q900,118 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $1.62 | $1.62 |
| 10 | $1.46 | $14.60 |
| 100 | $1.24 | $124.00 |
| 500 | $1.02 | $510.00 |
| 1,000 | $0.86 | $860.00 |
PCA9539PW/Q900,118 Overview
An I/O expander is an interface IC that adds general-purpose input/output pins to a microcontroller or host processor through a serial bus such as I2C or SMBus. In the system hierarchy, it sits between the host MCU and peripheral circuitry - a power-management and interface component that relieves pin-constrained controllers of the burden of driving buttons, LEDs, switches, and sensors directly.
Key features include 16 quasi-bidirectional GPIOs with 5 V tolerant I/Os, a polarity inversion register, an active-LOW open-drain interrupt output, and an external RESET pin that restores the default state without a bus power cycle. The /Q900 variant is qualified to AEC-Q100 for automotive applications and operates from 3.0 V to 5.5 V, versus 2.3 V to 5.5 V for the standard PCA9539PW.
Architecturally, the PCA9539 is a CMOS slave device with four register pairs (input, output, polarity inversion, configuration) addressed via two hardware address pins A0 and A1, allowing four devices on one bus for up to 64 I/Os. Configuration registers set each pin as input (high-impedance) or output. The interrupt function flags any input state change for fast host polling, avoiding continuous bus reads.
Typical applications include automotive body electronics (door modules, lighting control), keypad and switch scanning, LED drive expansion, server backplane monitoring, and industrial PLC I/O cards where MCU pin count is scarce.
Design consideration: unused inputs should not be left floating; tie them to a defined level via the internal or external pull-up, and keep the I2C pull-up resistance sized for the 400 kHz bus load capacitance.
This page synthesizes distributor pricing, drop-in alternatives from TI, Nexperia, and NXP standard-grade lines, plus design notes not found in the manufacturer datasheet.
Drop-in alternatives for PCA9539PW/Q900,118 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PCA9539PW,118
✅ Drop-In📋 Reference alternative (not in catalog)
PCA9539RPW,118
✅ Drop-In📋 Reference alternative (not in catalog)
PCA9539D,118
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
TCA9539PWR
✅ Drop-In📋 Reference alternative (not in catalog)
PCA9539PW
✅ Drop-In✓ In Stock
Contact for price
View Datasheet →PCA9535CPW,112
✅ Drop-In📋 Reference alternative (not in catalog)
PCA9539PW/Q900,118 Specifications
| Number of I/O Bits | 16 |
| Interface | I2C, SMBus |
| Maximum Bus Frequency | 400 kHz |
| Supply Voltage Range | 3.0 V to 5.5 V (Q900 variant) |
| I/O Tolerance | 5 V tolerant I/Os |
| Interrupt Output | Yes, active LOW, open drain |
| Reset Pin | Yes, active LOW external RESET |
| Polarity Inversion Register | Yes |
| Hardware Address Pins | A0, A1 (4 slave addresses) |
| Register Pairs | Input, Output, Polarity Inversion, Configuration |
| Technology | CMOS |
| Qualification | AEC-Q100 (Q900 automotive grade) |
| Package | TSSOP-24 (SOT361-1) |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
PCA9539PW/Q900,118 Pin Configuration
| Pin 1 | A0 — Address input 0 |
| Pin 2 | A1 — Address input 1 |
| Pin 3 | P00 — Port 0 input/output 0 |
| Pin 4 | P01 — Port 0 input/output 1 |
| Pin 5 | P02 — Port 0 input/output 2 |
| Pin 6 | P03 — Port 0 input/output 3 |
| Pin 7 | P04 — Port 0 input/output 4 |
| Pin 8 | P05 — Port 0 input/output 5 |
| Pin 9 | P06 — Port 0 input/output 6 |
| Pin 10 | P07 — Port 0 input/output 7 |
| Pin 11 | P10 — Port 1 input/output 0 |
| Pin 12 | P11 — Port 1 input/output 1 |
| Pin 13 | P12 — Port 1 input/output 2 |
| Pin 14 | P13 — Port 1 input/output 3 |
| Pin 15 | P14 — Port 1 input/output 4 |
| Pin 16 | P15 — Port 1 input/output 5 |
| Pin 17 | P16 — Port 1 input/output 6 |
| Pin 18 | P17 — Port 1 input/output 7 |
| Pin 19 | INT — Interrupt output, active LOW, open drain |
| Pin 20 | RESET — Active LOW reset input, restores default state |
| Pin 21 | VSS — Ground |
| Pin 22 | SCL — Serial clock line |
| Pin 23 | SDA — Serial data line |
| Pin 24 | VDD — Supply voltage, 3.0 V to 5.5 V (Q900) |
Typical Applications
PCA9539PW/Q900,118 is suitable for 6 applications: Automotive Body Electronics, Keypad and Switch Scanning, LED Drive and Status Indication, Server Backplane and Rack Monitoring, Industrial PLC I/O Expansion, Battery-Powered and Handheld Devices.
Automotive Body Electronics
The AEC-Q100 qualification of the PCA9539PW/Q900,118 makes it a natural fit for door modules, seat control, mirror adjustment, and lighting control units. Its 16 quasi-bidirectional GPIOs replace dedicated MCU pins for switch reading and relay/LED drive, while the active-LOW interrupt flags switch state changes without continuous bus polling. Placed on the vehicle's I2C bus at 400 kHz, it tolerates 5 V transients on its I/Os, and the RESET pin allows a watchdog or MCU to restore default states after a bus fault without power-cycling the module - important for functional-safety-oriented designs.
Recommended
Keypad and Switch Scanning
The PCA9539PW/Q900,118 expands a pin-limited MCU into a matrix keypad or discrete-switch interface: Port 0 drives scan lines as outputs while Port 1 reads return lines as inputs. The polarity inversion register lets the firmware read an active-LOW matrix without software XOR logic. Whenever any return line changes, the open-drain INT output (pin 19) asserts, waking the MCU from idle instead of timed polling - reducing bus traffic to a single 3-byte read per event. At 400 kHz I2C, a full 16-pin read takes on the order of 100 microseconds, fast enough for debounced human-interface scanning.
Recommended
LED Drive and Status Indication
Sixteen outputs of the PCA9539PW/Q900,118 drive status LEDs, backlight enables, or fault indicators through appropriate series resistors. The configuration register switches any pin between input and output dynamically, so one port can double as both LED drive and button read in time-multiplexed schemes. Because outputs are registered, the host updates all 16 indicators with a single 3-byte I2C write, and the state persists without host intervention. In 5 V systems the pins sink standard LED currents per datasheet ratings; for higher-current strings, pair with external transistors or LED drivers.
Recommended
Server Backplane and Rack Monitoring
In servers and storage shelves, the PCA9539PW/Q900,118 aggregates presence-detect signals, hot-swap handle switches, fan-fail flags, and board revision straps onto a shared 3.3 V or 5 V SMBus. The 5 V tolerant I/Os accept legacy 5 V telemetry lines even when the expander runs at 3.3 V. The RESET pin allows a shelf-management MCU or CPLD to recover the expander to a known state after SMBus hangs - a common field failure mode - without cycling the backplane power. Four addressable devices yield 64 monitored points per bus segment, sufficient for mid-plane shelf designs.
Recommended
Industrial PLC I/O Expansion
Factory automation I/O cards use the PCA9539PW/Q900,118 to digitize limit switches, selector switches, and relay feedback while also driving panel lamps and relay coils (via driver transistors). The open-drain interrupt provides event-driven scanning of discrete inputs, and the polarity inversion register normalizes mixed sourcing/sinking field wiring in software. Its industrial temperature capability and wide availability from NXP, TI, and Nexperia simplify long-term sourcing for multi-year production programs. Bus isolation with an I2C buffer allows the expander to sit on a remote card connected through long cable runs.
Recommended
Battery-Powered and Handheld Devices
Portable instruments and handheld terminals use the PCA9539PW/Q900,118 to manage buttons, LEDs, and low-rate sensor enables while keeping the main MCU in deep sleep. The expander's low CMOS standby consumption preserves battery life, and the interrupt output wakes the MCU only on genuine user input, eliminating periodic GPIO polling over I2C. Running at 3.3 V with 5 V tolerant inputs lets one rail strategy serve both new and legacy peripherals. Typical designs place a 10 kOhm pull-up on INT to the MCU wake pin and use the RESET line tied to the system supervisor for clean power-up defaults.
Recommended
Recommended Products Summary
Engineering reference data for PCA9539PW/Q900,118 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PCA9539PW,118 | TCA9539PWR | PCA9535CPW,112 |
|---|---|---|---|---|
| Package | TSSOP-24 (SOT361-1) | TSSOP-24 - same | TSSOP-24 - same | TSSOP-24 - same |
| Brand | NXP Semiconductors | NXP Semiconductors | Texas Instruments | NXP Semiconductors |
| Number of GPIOs | 16 | 16 | 16 | 16 |
| Supply Voltage Range | 3.0 V to 5.5 V | 2.3 V to 5.5 V | 1.65 V to 5.5 V | 2.3 V to 5.5 V |
| Reset Pin | Yes (active LOW) | Yes (active LOW) | Yes (active LOW) | No |
| Interrupt Output | Yes, active LOW open drain | Yes | Yes | Yes |
| Automotive Qualification | AEC-Q100 (/Q900) | No (standard grade) | No (use TCA9539-Q1) | No |
| Max Bus Frequency | 400 kHz | 400 kHz | 400 kHz | 400 kHz |
Key Differentiators
- Automotive AEC-Q100 qualification (vs PCA9539PW,118)
- External RESET pin (vs PCA9535CPW,112)
- Wider low-voltage operation available in family (vs PCA9539PW/Q900,118 itself)
Design Notes
Place 100 nF ceramic decoupling directly across VDD (pin 24) and VSS (pin 21) with a short return path. I2C pull-up resistors on SDA/SCL should be sized for total bus capacitance: 4.7 kOhm at 3.3 V with under 200 pF is typical for 400 kHz Fast-mode. The INT output is open drain and needs its own pull-up to the host logic rail; do not share a pull-up with SDA since INT is not a data line.
On the /Q900 variant, do not power below 3.0 V even though the standard PCA9539PW runs to 2.3 V - the automotive grade specifies 3.0 V minimum. Address pins A0/A1 must be tied to a defined level (VDD or VSS), never left floating, or the slave address is indeterminate. The RESET pin is active LOW with internal default state after release; a floating RESET during slow power ramps can leave registers in an unknown state - drive it from a supervisor or RC network.
Estimated: at 3.3 V supply the PCA9539 CMOS core consumes only microamp-level static current, so I/O loading dominates the power budget - each output sourcing an LED at 5-10 mA adds roughly 16-33 mW per pin. Total dissipation in a 16-LED application stays well under the TSSOP-24 thermal capability (theta_JA around 100-120 C/W for SOT361-1 on standard 4-layer boards), so no heatsinking is needed; verify against the datasheet thermal table for high-ambient automotive cabins.
Keep I2C rise times within the Fast-mode specification by matching pull-up resistance to bus loading; long backplane traces can add hundreds of pF and stall a 400 kHz bus. Segment the bus with an I2C buffer/switch when the expander sits on a pluggable card. Because interrupt-driven designs read inputs immediately after INT asserts, ensure the host I2C driver releases SDA cleanly - a stuck read can re-assert INT behavior inconsistently until the input registers are read.
Compliance Information
AEC-Q100 qualification per Mouser AEC-Q100 filter on the /Q900 part. RoHS compliant per NXP product page listing. REACH and halogen-free status not stated in provided data.
