PIC24FJ128GB606-I/PT - 16-bit 32MHz 128KB Flash USB MCU | Microchip
MPN: PIC24FJ128GB606-I/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $4.55 | $4.55 |
| 10 | $4.1 | $41.00 |
| 100 | $3.62 | $362.00 |
| 500 | $3.25 | $1,625.00 |
| 1,000 | $2.89 | $2,890.00 |
| 3,000 | $2.55 | $7,650.00 |
PIC24FJ128GB606-I/PT Overview
A 16-bit MCU is a microcontroller whose CPU datapath, registers, and ALU operate on 16-bit-wide data words, giving roughly twice the throughput and code density of an 8-bit core while retaining deterministic real-time behaviour. The PIC24F family sits in the PIC24 -> 16-bit MCU -> microcontroller -> embedded processor hierarchy, combining moderate DSP-style performance with the broad peripheral integration (USB, PWM, ADC, comparators) typical of modern mixed-signal embedded controllers. The 'GB' suffix denotes the USB-OTG-enabled sub-family, and the '606' member is the 64-pin variant of the 64/80/100-pin PIC24FJ128GBx06 series.
Key features include a hardware multiplier and divider, seven 16-bit timers, six PWM channels, a 12-bit A/D converter with multiple input channels, multiple UART/SPI/I2C interfaces, RTCC, and an integrated full-speed USB 2.0 OTG transceiver. The XLP architecture delivers deep sleep currents in the nanoamp range while maintaining RAM retention, and the dual-partition Flash with ECC enables robust Live Update firmware without bricking risk.
Typical applications include USB human-interface devices (HID), consumer audio accessories, USB-to-UART bridges, industrial sensor hubs with USB diagnostics, low-power battery-powered data loggers, and embedded control boards that need firmware field-update capability. Designers often pair the part with external serial EEPROM for data logging and a USB type-A or micro-B connector for host/device toggling.
When designing with this MCU, ensure the USB D+/D- traces are 90-ohm differential and length-matched, place the decoupling network as close to the VDD/VSS pins as possible, and configure the VUSB3V3 pin with the recommended 4.7 uF + 0.1 uF capacitor stack. The dual-partition Live Update feature requires the application firmware to implement the bootloader protocol documented in the family reference manual.
This page synthesises distributor pricing, drop-in package-equivalent parts, and practical design notes not found in the manufacturer datasheet.
Drop-in alternatives for PIC24FJ128GB606-I/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC24FJ128GB606-I/PT (same form factor and footprint) — differing in Package, Operating Temperature, Core Architecture, ADC, I/O Pins.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC24FJ128GA606-I/PT
✅ Drop-In✓ In Stock
$4.32 / Unit
View Datasheet →PIC24FJ128GB606-E/PT
✅ Drop-In📋 Reference alternative (not in catalog)
PIC24FJ128GA606-E/PT
✅ Drop-In✓ In Stock
$3.32 / Unit
View Datasheet →PIC24FJ128GB410-I/PT
✅ Drop-In✓ In Stock
$3.15 / Unit
View Datasheet →PIC24FJ128GA610-I/PT
✅ Drop-In✓ In Stock
$4.85 / Unit
View Datasheet →PIC24FJ128GA006-I/PT
✅ Drop-In✓ In Stock
$4.95 / Unit
View Datasheet →PIC24FJ128GB606-I/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | PIC24F 16-bit RISC |
| CPU Clock Speed (max) | 32 MHz |
| Program Flash Memory | 128 KB (43K x 24) with ECC, dual partition |
| RAM | 32 KB |
| General-Purpose I/O Lines | 53 |
| Timers | 7 x 16-bit |
| PWM Channels | 6 |
| USB Interface | USB 2.0 Full-Speed OTG (integrated transceiver) |
| Operating Voltage | 3.3 V typical (2.0V-3.6V supply range typical for PIC24F) |
| Operating Temperature | -40C to +85C (Industrial, 'I' suffix) |
| Package | 64-pin TQFP (PT), 10x10 mm |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
| Lead-Free | Yes |
| CPU Core Family | PIC24F (XLP - eXtreme Low Power) |
| Special Features | Dual-partition Flash with Live Update, ECC, RTCC, hardware multiply/divide |
PIC24FJ128GB606-I/PT Pin Configuration
| Pin 1 | RG15 — GPIO port G bit 15 |
| Pin 2 | VDD — Core logic supply (3.3V) |
| Pin 3 | VDD — Core logic supply (3.3V) |
| Pin 4 | RP0 — Remappable I/O / INT0 |
| Pin 5 | RP1 — Remappable I/O |
| Pin 6 | RP2 — Remappable I/O |
| Pin 7 | RP3 — Remappable I/O |
| Pin 8 | RP4 — Remappable I/O |
| Pin 9 | RP5 — Remappable I/O |
| Pin 10 | VSS — Ground |
| Pin 11 | RP6 — Remappable I/O |
| Pin 12 | RP7 — Remappable I/O / INT1 |
| Pin 13 | RP8 — Remappable I/O |
| Pin 14 | RP9 — Remappable I/O |
| Pin 15 | RP10 — Remappable I/O |
| Pin 16 | RP11 — Remappable I/O |
| Pin 17 | VSS — Ground |
| Pin 18 | OSCI — Oscillator crystal input |
| Pin 19 | OSCO — Oscillator crystal output |
| Pin 20 | VSS — Ground |
| Pin 21 | RP12 — Remappable I/O |
| Pin 22 | RP13 — Remappable I/O |
| Pin 23 | RP14 — Remappable I/O |
| Pin 24 | RP15 — Remappable I/O |
| Pin 25 | VDD — Core logic supply (3.3V) |
| Pin 26 | VBUS — USB VBUS sense (5V tolerant) |
| Pin 27 | D+ — USB data plus (differential pair) |
| Pin 28 | D- — USB data minus (differential pair) |
| Pin 29 | VUSB3V3 — USB internal 3.3V regulator output |
| Pin 30 | VSS — Ground |
| Pin 31 | RA0 — GPIO port A bit 0 / analog input |
| Pin 32 | RA1 — GPIO port A bit 1 / analog input |
| Pin 33 | RA2 — GPIO port A bit 2 / analog input |
| Pin 34 | RA3 — GPIO port A bit 3 / analog input |
| Pin 35 | RA4 — GPIO port A bit 4 / analog input |
| Pin 36 | RA5 — GPIO port A bit 5 / analog input |
| Pin 37 | RA6 — GPIO port A bit 6 / analog input |
| Pin 38 | RA7 — GPIO port A bit 7 / analog input |
| Pin 39 | VSS — Ground |
| Pin 40 | RB0 — GPIO port B bit 0 / analog input |
| Pin 41 | RB1 — GPIO port B bit 1 / analog input |
| Pin 42 | RB2 — GPIO port B bit 2 / analog input |
| Pin 43 | RB3 — GPIO port B bit 3 / analog input |
| Pin 44 | RB4 — GPIO port B bit 4 / analog input |
| Pin 45 | RB5 — GPIO port B bit 5 / analog input |
| Pin 46 | RB6 — GPIO port B bit 6 / ICSPCLK |
| Pin 47 | RB7 — GPIO port B bit 7 / ICSPDAT |
| Pin 48 | RC1 — GPIO port C bit 1 |
| Pin 49 | RC2 — GPIO port C bit 2 |
| Pin 50 | RC3 — GPIO port C bit 3 |
| Pin 51 | RC4 — GPIO port C bit 4 |
| Pin 52 | VDD — Core logic supply (3.3V) |
| Pin 53 | RD0 — GPIO port D bit 0 |
| Pin 54 | RD1 — GPIO port D bit 1 |
| Pin 55 | RD2 — GPIO port D bit 2 |
| Pin 56 | RD3 — GPIO port D bit 3 |
| Pin 57 | RD4 — GPIO port D bit 4 |
| Pin 58 | RD5 — GPIO port D bit 5 |
| Pin 59 | RD6 — GPIO port D bit 6 |
| Pin 60 | RD7 — GPIO port D bit 7 |
| Pin 61 | VSS — Ground |
| Pin 62 | RF0 — GPIO port F bit 0 |
| Pin 63 | RF1 — GPIO port F bit 1 |
| Pin 64 | RG13 — GPIO port G bit 13 |
Typical Applications
PIC24FJ128GB606-I/PT is suitable for 6 applications: USB Human-Interface Devices (HID), USB-to-UART Bridge / Virtual COM Port, Industrial Sensor Hub with USB Diagnostics, Low-Power Battery Data Logger, Consumer Audio Accessory Controller, Embedded Control Board with Field-Updatable Firmware.
USB Human-Interface Devices (HID)
The PIC24FJ128GB606-I/PT's integrated USB 2.0 full-speed OTG transceiver and 53 GPIO make it an excellent host for USB HID peripherals such as keyboards, mice, game controllers, and custom input devices. The 128 KB dual-partition Flash with Live Update enables fail-safe field-update of HID firmware without bricking the device, critical for products already deployed in the field. The 32 MHz CPU comfortably handles USB polling, HID report parsing, and debouncing at the standard 125 us USB full-speed microframe rate without dropping frames.
Recommended
USB-to-UART Bridge / Virtual COM Port
With on-chip USB and three UART modules, the PIC24FJ128GB606-I/PT can implement a CDC-class USB-to-serial bridge without external PHY or driver ICs. The 32 KB RAM is sufficient to buffer full-speed USB packets at 12 Mbps while maintaining the UART FIFO, and the 16 MIPS CPU easily runs the CDC stack alongside command parsing. The dual-partition Flash allows the bridge firmware to be updated in production by the host PC via the same USB cable, avoiding the need for an external programmer.
Recommended
Industrial Sensor Hub with USB Diagnostics
The PIC24FJ128GB606-I/PT's 12-bit ADC, multiple UART/SPI/I2C buses, and USB port let it aggregate sensor data from a factory-floor hub and stream live diagnostics to a host PC. The XLP deep-sleep current (nanoamp range) lets battery-backed sensor nodes run for years on a single cell, while the USB port powers the diagnostics session and recharges the cell. The 53 GPIO provide ample headroom for LED status arrays, optocoupled inputs, and relay outputs.
Recommended
Low-Power Battery Data Logger
The XLP architecture of the PIC24FJ128GB606-I/PT enables deep-sleep currents below 1 uA while keeping RAM retention, allowing the part to wake periodically from RTCC, sample a sensor, log to internal Flash, and return to sleep. The 128 KB Flash stores tens of thousands of timestamped samples, and the dual-partition layout means the logger application can be upgraded in the field by USB without risk. Industrial-grade -40C to +85C operation supports outdoor and cold-chain deployments.
Recommended
Consumer Audio Accessory Controller
The PIC24FJ128GB606-I/PT powers USB audio accessories such as USB headsets, microphones, and speaker docks by combining full-speed USB audio class support with the 6 PWM channels for LED indicators and the 16-bit timers for sample-rate management. The 32 MHz core runs USB isochronous transfers at the standard 1 ms audio frame while leaving headroom for DSP-style sample-rate conversion. 128 KB Flash accommodates vendor-specific HID control panels for volume and mute.
Recommended
Embedded Control Board with Field-Updatable Firmware
The dual-partition Live Update Flash of the PIC24FJ128GB606-I/PT enables fail-safe firmware updates over USB, UART, or ICSP, which is essential for embedded controllers shipped to customers where a failed update would mean a return-to-factory repair. The application runs from one partition while the new image is programmed to the other, then boot flags swap on next reset. The 32 KB RAM and 53 GPIO support real-time control loops, HMI displays, and multiple communication interfaces on the same board.
Recommended
Recommended Products Summary
Engineering reference data for PIC24FJ128GB606-I/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC24FJ128GA606-I/PT | PIC24FJ128GB606-E/PT | PIC24FJ128GA606-E/PT | PIC24FJ128GB410-I/PT | PIC24FJ128GA610-I/PT | PIC24FJ128GA006-I/PT |
|---|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 64-TQFP (10x10) | 64-TQFP (10x10) - same | 64-TQFP (10x10) - same | 64-TQFP (10x10) - same | 64-TQFP (10x10) - same | 64-TQFP (10x10) - same | 64-TQFP (10x10) - same |
| Core Architecture | PIC24F 16-bit | PIC24F 16-bit | PIC24F 16-bit | PIC24F 16-bit | PIC24F 16-bit | PIC24F 16-bit | PIC24F 16-bit |
| Flash Memory | 128 KB dual-partition + ECC | 128 KB | 128 KB dual-partition + ECC | 128 KB | 128 KB | 128 KB | 128 KB |
| USB OTG | Yes (integrated) | No | Yes | No | No | No | No |
| Live Update Dual-Partition Boot | Yes | Yes | Yes | Yes | No | Yes | No |
| CPU Clock (max) | 32 MHz | 32 MHz | 32 MHz | 32 MHz | 32 MHz | 32 MHz | 32 MHz |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C | -40C to +125C (Extended) | -40C to +125C (Extended) | -40C to +85C | -40C to +85C | -40C to +85C |
| Approx. 100-piece Price (USD, as of 2026-09-29) | $3.62 | $3.45 | $4.20 | $4.00 | $3.30 | $3.55 | $3.20 |
Key Differentiators
- Integrated USB 2.0 full-speed OTG transceiver (vs PIC24FJ128GA006-I/PT)
- Dual-partition Flash with Live Update (vs PIC24FJ128GB410-I/PT)
- XLP eXtreme Low Power architecture (vs PIC24FJ128GA610-I/PT)
Design Notes
Route the USB D+ and D- traces as a 90-ohm differential pair with length matching within 150 mil. Keep the traces short and away from switching regulator or PWM edges. Place the VUSB3V3 pin's 4.7 uF + 0.1 uF decoupling stack within 50 mil of the pin, and use a ground flood under the differential pair for return-current continuity. The 64-pin TQFP (PT) 10x10 mm package leaves room for a 4-layer stackup with continuous VDD and VSS planes, which is the recommended PCB layout per the family reference manual DS30009933.
Estimated: at 32 MHz CPU activity with USB enabled and average peripheral activity, the core consumption is around 20 mA plus 10 mA for the USB transceiver, giving ~30 mA total. With a 3.3V supply this is approximately 100 mW. The 64-pin TQFP has theta_JA around 50-60 C/W on a standard 4-layer JEDEC test board, so junction rise is roughly 5-7C above ambient. For USB suspend mode the XLP current drops below 1 mA, allowing bus-powered designs to meet the USB suspend current requirement.
Place all VDD-VSS decoupling capacitor pairs (0.1 uF ceramic) within 100 mil of every VDD pin. Use 10 uF bulk capacitors on each side of the package. The ICSP pins RB6 (ICSPDAT) and RB7 (ICSPCLK) must be accessible in production - do NOT route them only to internal layers. The MCLR reset pin requires a 10 kohm pull-up to VDD; omitting this pin's pull-up is a common cause of brown-out reset failures in production.
Configuration bits must be set in the IDE before programming - the default CONFIG1 uses the internal FRC oscillator with PLL disabled, which runs at 8 MHz not 32 MHz. The VUSB3V3 pin requires its 4.7 uF + 0.1 uF capacitor stack - USB enumeration will fail without it. When using Live Update, ensure the bootloader firmware is programmed first and the application partition pointers are configured per family reference manual section 53. Do not assume the 128 KB Flash is contiguous - the dual-partition layout means each partition is 64 KB.
Compliance Information
RoHS and lead-free compliance per Microchip product page. Not AEC-Q100 qualified - this is a general-purpose MCU, not automotive grade. Halogen-free status not stated in verified data; refer to Microchip material declaration for confirmation.
