Microchip Technology

DSPIC33CH128MP206-I/PT - Dual-Core 100MHz DSC, 64-TQFP | Microchip

MPN: DSPIC33CH128MP206-I/PT ✓ Active
In Stock Ships in 1-3 business days
3.0 V to 3.6 V Vdss 64-pin TQFP (PT), 10x10 mm Package 100 MHz (100 MIPS) Speed 152 KB Memory
From $5.45 USD / Unit
MOQ: 1 |
Price updated: 2026-09-22
Volume Pricing
Qty Unit Price Extended
1 $9.5 $9.50
10 $8.55 $85.50
100 $7.62 $762.00
500 $6.85 $3,425.00
1,000 $6.1 $6,100.00
3,000 $5.45 $16,350.00
ℹ️ All prices are in USD

DSPIC33CH128MP206-I/PT Overview

The Microchip DSPIC33CH128MP206-I/PT is a high-performance 16-bit dual-core Digital Signal Controller (DSC) integrating a 100 MHz main core and a 200 MHz auxiliary core in a 64-pin TQFP (10x10) package. It features 152 KB of Flash program memory, 16 KB of RAM, and 4 KB of auxiliary RAM, all accessible via a multi-bus architecture that lets the two cores exchange data with minimal latency.

A Digital Signal Controller (DSC) is a hybrid between a microcontroller (MCU) and a Digital Signal Processor (DSP) - it combines deterministic real-time control with high-throughput DSP arithmetic. The dsPIC33CH family extends this with a true dual-core architecture (master + slave), enabling one core to run time-critical control loops and the other to handle communications, housekeeping, or custom algorithms. The full taxonomy is: DSC -> MCU+DSP hybrid -> microcontroller family -> embedded computing -> semiconductor.

Key features of the DSPIC33CH128MP206-I/PT include 12 high-resolution PWM channels (250 ps resolution) optimized for digital power conversion and motor control, four 12-bit ADC modules running up to 3.5 MSps, multiple UART/SPI/I2C serial ports, and CAN FD support. The auxiliary core is independently programmable and exposes a dedicated 8 KB PRAM region for firmware isolation, which is critical for functional-safety and proprietary-code partitioning.

Architecturally, the device uses a Harvard bus with separate program and data paths. The main core runs up to 100 MIPS while the slave core can reach 200 MIPS, allowing demanding closed-loop control and advanced modulation schemes to be offloaded. Integrated peripherals (DMA, comparators, QEI, and PMP) reduce external component count and BOM cost.

Typical applications include digitally controlled switch-mode power supplies, BLDC/PMSM motor drives, wireless charging transmitters, LED lighting drivers, server/telecom power converters, drones, and automotive sensor conditioning. The CAN FD interface and functional-safety documentation also suit automotive body-electronics and ADAS sub-modules.

When designing with this part, allocate a minimum of two decoupling capacitors per VDD pin (100 nF ceramic close to the IC plus a bulk 4.7 uF), keep the analog and digital grounds stitched under the IC, and follow Microchip's AN2721 layout guidelines for high-resolution PWM and ADC signal integrity.

This page synthesizes distributor pricing, drop-in alternatives from the same dsPIC33CH family, and practical design notes not found in the manufacturer datasheet alone.

Drop-in alternatives for DSPIC33CH128MP206-I/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.

Variants in this series

Same-series models that are drop-in compatible with DSPIC33CH128MP206-I/PT (same form factor and footprint) — differing in Package, Core Architecture, ADC, Operating Temperature, High-Resolution PWM.

Microchip Technology
Package: 28-pin SSOP
ADC: Dual 12-bit, 3.5 Msps, 12 input channels
Operating Temperature: -40 C to +85 C (Industrial, /SS)
Microchip Technology
Package: 28-pin SSOP
Core Architecture: dsPIC33CH 16-bit Dual-Core (master + slave)
ADC: 23-channel, 12-bit
Microchip Technology
Package: 36-pin UQFN (5x5 mm)
Core Architecture: dsPIC33C (main + slave dual core)
ADC: 12-bit, up to 3.5 Msps
Microchip Technology
Package: 36-pin UQFN (5x5 mm)
ADC: Dual 12-bit, up to 3.5 MSPS
Operating Temperature: -40C to +85C (industrial grade)
Microchip Technology
Package: 48-pin UQFN-EP (6x6 mm) (M4)
Core Architecture: Dual-core 16-bit dsPIC33 DSC
ADC: 12-bit, up to 3.5 MSPS
Microchip Technology
Package: TQFP-48 (PT), 7x7 mm
Core Architecture: Dual-core dsPIC33C (master + slave), 16-bit DSC
ADC: 2 x 12-bit, up to 3.5 Msps
Microchip Technology
Package: 64-TQFP (10x10 mm), 0.5 mm pitch
Core Architecture: dsPIC33CH dual-core (master + slave)
Operating Temperature: -40 °C to +85 °C (Industrial)
Microchip Technology
Package: TQFP-64 (10x10 mm)
Core Architecture: Dual-core dsPIC33C DSC (master + slave)
ADC: 4x 12-bit, up to 3.5 Msps
Microchip Technology
Package: 48-pin TQFP (PT) 7x7 mm
Core Architecture: Dual 16-bit dsPIC DSC (main + slave)
ADC: 12-bit, multi-channel
Microchip Technology
Package: TQFP-64 (PT) 10x10 mm
Core Architecture: Dual-Core 16-bit DSC (Harvard + DSP engine)
ADC: Dual 12-bit, up to 3.5 Msps, up to 24 channels
Microchip Technology
Package: TQFP-80 (PT), 12x12 mm
Core Architecture: Dual-core 16-bit dsPIC33 DSC (master + slave)
ADC: 12x 16-bit, up to 3.25 MSPS
Microchip Technology
Package: 48-TQFP (7x7 mm)
Core Architecture: Dual 16-bit dsPIC DSC cores (Master + Slave)
ADC: 2x 12-bit, up to 3.5 Msps

Quick Comparison Tool — Select alternative parts for side-by-side comparison:

DSPIC33CH128MP206T-I/PT

✅ Drop-In
Microchip Technology
📦 64-pin TQFP (PT)
dsPIC33CH dual-core (master + slave) · 16-bit · 200 MHz · 200 MHz (per family spec); per-Mouser listing 100 MHz · 152 KB Flash (128 KB master + 24 KB slave), 152K x 8 · 20 KB (16 KB master + 4 KB slave) · 64-TQFP (10x10 mm), 0.5 mm pitch · 3.0 V to 3.6 V

✓ In Stock

$4.85 / Unit

View Datasheet →

DSPIC33CH128MP205-I/PT

✅ Drop-In
Microchip Technology
📦 64-pin TQFP (PT)
Dual-core dsPIC33C (master + slave), 16-bit DSC · 200 MHz per core (180 MHz dual-core mode) · 16-bit dsPIC with DSP extensions · 128 KB · 4 KB · 152 KB (128 KB master + 24 KB shared) · 16 KB · 3.0 V to 3.6 V

✓ In Stock

$3.89 / Unit

View Datasheet →

DSPIC33CH128MP202-I/SS

✅ Drop-In ⚠️ 参数待验证
Microchip Technology
📦 28-pin SSOP (SS)
dsPIC33CH dual-core DSC · 16-bit dual-core (main + secondary dsPIC33C) · 200 MHz (180 MIPS) per core · 128 KB (152 KB with aux flash, per Family RM) · 20 KB (16 KB SRAM + 4 KB DMA RAM) · 3.0 V to 3.6 V · -40 C to +85 C (Industrial, /SS) · 28-pin SSOP

✓ In Stock

$4.1 / Unit

View Datasheet →

DSPIC33CH128MP202T-I/SS

✅ Drop-In ⚠️ 参数待验证
Microchip Technology
📦 28-pin SSOP (SS)
dsPIC33CH 16-bit Dual-Core (master + slave) · 200 MHz · 180 MHz · 152 KB (152K x 8) · 20 KB total (16 KB + 4 KB split between cores) · 21 general-purpose I/O · 23-channel, 12-bit · 4 x 12-bit

✓ In Stock

$3.94 / Unit

View Datasheet →

DSPIC33CH128MP203-I/M5

✅ Drop-In ⚠️ 参数待验证
Microchip Technology
📦 48-pin uQFN (M5)
16-bit dsPIC dual-core DSC · 2 (main core + slave control core) · 100 MHz (max) · 100 MHz (max) · 128 KB · 16 KB + 4 KB · 3.0 V to 3.6 V · -40C to +85C (industrial grade)

✓ In Stock

$3.85 / Unit

View Datasheet →

DSPIC33CH128MP203-E/M5

✅ Drop-In ⚠️ 参数待验证
Microchip Technology
📦 48-pin uQFN (M5)
16-Bit Dual-Core Digital Signal Controller (DSC) · dsPIC33C (main + slave dual core) · 180 MHz · 200 MHz · 152 KB (152K x 8) · 20 KB SRAM (16 KB + 4 KB dual-partition PRAM) · 36-pin UQFN (5x5 mm) · 3.0 V to 3.6 V DC

✓ In Stock

$4.61 / Unit

View Datasheet →

DSPIC33CH128MP205-I/M4

✅ Drop-In ⚠️ 参数待验证
Microchip Technology
📦 48-pin uQFN (M4)
Dual-core 16-bit dsPIC33 DSC · 200 MHz (max) · 180 MHz (max) · 152 KB · 16 KB · 4 KB · 3.0 V to 3.6 V · 300 mA

✓ In Stock

$5.48 / Unit

View Datasheet →

DSPIC33CH128MP206-I/PT Maximum Ratings & Electrical Characteristics

Core Architecture dsPIC33CH dual-core 16-bit DSC
Main Core Speed 100 MHz (100 MIPS)
Auxiliary Core Speed 200 MHz (200 MIPS)
Program Memory (Flash) 152 KB
Data RAM 16 KB
Auxiliary RAM (PRAM) 8 KB
DMA Channels 8
High-Resolution PWM Channels 12 (250 ps resolution)
ADC Modules 4 x 12-bit, up to 3.5 MSps
CAN FD Interfaces Yes
Serial Interfaces 3 x UART/SPI/I2C (configurable)
Timers 2 x 16-bit (per core)
External Interrupts 4
Operating Voltage 3.0 V to 3.6 V
Operating Temperature -40C to +85C (Industrial)
Package 64-pin TQFP (PT), 10x10 mm
Mounting Type Surface Mount
MSL Level 3 (168 hours)
RoHS Status Compliant
Functional Safety Documentation Available (FuSa)

DSPIC33CH128MP206-I/PT Pin Configuration

TQFP-64 Package Pinout Diagram TQFP-64 10x10mm, P0.5mm, JEDEC MS-026. 1 16 TQFP-64
Pin 1 RP — Remappable peripheral pin (PPS)
Pin 2 RP — Remappable peripheral pin (PPS)
Pin 3 VDD — Digital supply 3.3V
Pin 4 VSS — Digital ground
Pin 5 AN — Analog input
Pin 6 AN — Analog input
Pin 7 AVDD — Analog supply 3.3V
Pin 8 AVSS — Analog ground
Pin 9 OSCI — Primary oscillator input
Pin 10 OSCO — Primary oscillator output
Pin 11 RP — Remappable peripheral pin (PPS)
Pin 12 RP — Remappable peripheral pin (PPS)
Pin 13 RP — Remappable peripheral pin (PPS)
Pin 14 RP — Remappable peripheral pin (PPS)
Pin 15 VDD — Digital supply 3.3V
Pin 16 VSS — Digital ground
Pin 17 PWMH — High-resolution PWM output
Pin 18 PWML — High-resolution PWM output (complementary)
Pin 19 PWMH — High-resolution PWM output
Pin 20 PWML — High-resolution PWM output (complementary)
Pin 21 PWMH — High-resolution PWM output
Pin 22 PWML — High-resolution PWM output (complementary)
Pin 23 VDD — Digital supply 3.3V
Pin 24 VSS — Digital ground
Pin 25 PWMH — High-resolution PWM output
Pin 26 PWML — High-resolution PWM output (complementary)
Pin 27 PWMH — High-resolution PWM output
Pin 28 PWML — High-resolution PWM output (complementary)
Pin 29 PWMH — High-resolution PWM output
Pin 30 PWML — High-resolution PWM output (complementary)
Pin 31 VDD — Digital supply 3.3V
Pin 32 VSS — Digital ground
Pin 33 AN — Analog input
Pin 34 AN — Analog input
Pin 35 AVDD — Analog supply 3.3V
Pin 36 AVSS — Analog ground
Pin 37 RP — Remappable peripheral pin (PPS)
Pin 38 RP — Remappable peripheral pin (PPS)
Pin 39 RP — Remappable peripheral pin (PPS)
Pin 40 CANTX — CAN FD transmit
Pin 41 CANRX — CAN FD receive
Pin 42 RP — Remappable peripheral pin (PPS)
Pin 43 VDD — Digital supply 3.3V
Pin 44 VSS — Digital ground
Pin 45 SDA — I2C data (PPS-mappable)
Pin 46 SCL — I2C clock (PPS-mappable)
Pin 47 SDO — SPI data out (PPS-mappable)
Pin 48 SDI — SPI data in (PPS-mappable)
Pin 49 SCK — SPI clock (PPS-mappable)
Pin 50 RP — Remappable peripheral pin (PPS)
Pin 51 RP — Remappable peripheral pin (PPS)
Pin 52 VDD — Digital supply 3.3V
Pin 53 VSS — Digital ground
Pin 54 RP — Remappable peripheral pin (PPS)
Pin 55 RP — Remappable peripheral pin (PPS)
Pin 56 MCLR — Master clear / reset (active low)
Pin 57 RP — Remappable peripheral pin (PPS)
Pin 58 RP — Remappable peripheral pin (PPS)
Pin 59 PGED — Programming/debug data
Pin 60 PGEC — Programming/debug clock
Pin 61 VDD — Digital supply 3.3V
Pin 62 VSS — Digital ground
Pin 63 RP — Remappable peripheral pin (PPS)
Pin 64 RP — Remappable peripheral pin (PPS)

Typical Applications

DSPIC33CH128MP206-I/PT is suitable for 7 applications: Digital Switch-Mode Power Supplies (SMPS), BLDC / PMSM Motor Control, Wireless Charging Transmitters, Server and Telecom Power Converters, Automotive Sensor Signal Conditioning, LED Lighting Drivers and Dimming, Drone Flight Control and ESC.

Digital Switch-Mode Power Supplies (SMPS)

The DSPIC33CH128MP206-I/PT's 12 channels of high-resolution PWM with 250 ps edge placement and four 3.5 MSps 12-bit ADCs make it ideal for closed-loop digital control of switch-mode power supplies. Its dual-core architecture lets the master core run the voltage/current control loop at deterministic 100 MHz while the auxiliary core handles PMBus telemetry, housekeeping, and fault logging. This partitioning reduces interrupt latency on the control path and simplifies functional-safety certification for server/telecom power supplies. Place the IC on a 4-layer PCB with dedicated analog/digital ground stitching and follow Microchip AN2721 for high-resolution PWM and ADC signal integrity.

🏭

BLDC / PMSM Motor Control

The DSPIC33CH128MP206-I/PT delivers field-oriented control (FOC) for BLDC and PMSM motors with its 12 high-resolution PWM channels (perfect for the 6-PWM three-phase topology plus 6 auxiliary channels) and four ADCs that enable simultaneous current sensing on the three phases. The 100 MHz master core can execute the 10-20 kHz FOC loop with margin, while the 200 MHz auxiliary core runs the speed/torque observer, CAN FD stack, and encoder/Resolver interface. Per Microchip's motor-control application notes, this device targets industrial servo drives, robotic joints, and drone propulsion systems.

📱

Wireless Charging Transmitters

Wireless charging transmitters benefit from the DSPIC33CH128MP206-I/PT's deterministic dual-core operation: the master core runs the Qi protocol resonant control loop at precise intervals, while the auxiliary core handles foreign-object detection (FOD), I2C/PMBus communications with the host, and authentication handshakes. The 250 ps PWM resolution enables the precise coil-current shaping required for 15W/30W fast-charging compliance, and the CAN FD interface supports automotive Qi deployments in cabin wireless charging pads. The 152 KB Flash holds both protocol stacks and proprietary tuning algorithms.

🖥️

Server and Telecom Power Converters

Server and telecom power supplies (48V-to-POL converters, intermediate bus converters) require DSP-grade control loops with high PSRR and fast transient response. The DSPIC33CH128MP206-I/PT delivers this with 12 high-resolution PWM outputs to drive multi-phase buck/boost stages, four 3.5 MSps ADCs for input/output voltage and current sensing, and dual-core isolation between the control loop and housekeeping tasks. Per Microchip's product brief, the device targets these applications specifically. Functional-safety documentation and PMBus protocol support simplify design for redundant power architectures.

🚗

Automotive Sensor Signal Conditioning

The DSPIC33CH128MP206-I/PT's CAN FD interface, four 12-bit ADCs, and dual-core architecture suit automotive sensor modules that require simultaneous signal conditioning and bus communication. The auxiliary core can run the CAN FD stack while the master core digitizes and filters sensor data at deterministic intervals. While the I/PT variant itself is industrial temperature grade (-40C to +85C), Microchip offers automotive-grade (AEC-Q100) variants in the same family with the appropriate order suffix for body-electronics and ADAS sub-module designs.

💡

LED Lighting Drivers and Dimming

High-end architectural and stage lighting drivers leverage the DSPIC33CH128MP206-I/PT's 12 high-resolution PWM channels to drive multi-channel constant-current LED drivers with sub-microsecond dimming resolution. The 200 MHz auxiliary core can run DMX-512/RDM or D4i protocol stacks while the master core maintains tight current regulation across all channels. Per Microchip's lighting application notes, the device supports both analog dimming via the high-resolution PWMs and digital dimming via PWM duty cycle for hybrid dimming architectures required by entertainment-grade fixtures.

✈️

Drone Flight Control and ESC

Drones and UAVs benefit from the DSPIC33CH128MP206-I/PT's deterministic dual-core operation for flight control and electronic speed control (ESC) integration. The master core runs the 1-8 kHz flight control loop with sensor fusion (gyro/accel/mag via SPI), while the auxiliary core drives the BLDC motor PWM and current sensing with low latency. The compact 64-pin TQFP (10x10 mm) package fits in space-constrained ESC and flight-controller boards. Per Microchip's product brief, the device targets drone propulsion and flight controller applications.

What is the difference between the main and auxiliary cores in DSPIC33CH128MP206-I/PT?
The DSPIC33CH128MP206-I/PT integrates two independently programmable dsPIC cores - a 100 MHz master core and a 200 MHz auxiliary slave core connected via a low-latency mailbox and shared memory fabric. According to Microchip's dsPIC33CH family datasheet, this lets time-critical control loops run on the master while housekeeping, communication stacks, or proprietary algorithms run on the slave, simplifying certification for functional-safety and IP protection. Both cores share peripherals but expose a dedicated 8 KB PRAM region.
How much Flash and RAM does DSPIC33CH128MP206-I/PT have?
The DSPIC33CH128MP206-I/PT provides 152 KB of Flash program memory, 16 KB of data SRAM, and an additional 8 KB of auxiliary RAM (PRAM) accessible to the slave core. According to the Microchip datasheet summary, the Flash supports self-programming under firmware control, and PRAM is mapped into the slave-core address space for isolated execution - useful for proprietary algorithm isolation or functional-safety partitioning.
Where can I download the DSPIC33CH128MP206-I/PT datasheet PDF?
The official DSPIC33CH128MP206-I/PT datasheet PDF can be downloaded directly from Microchip's product page at microchip.com/en-us/product/dsPIC33CH128MP206, or via the symlink at ww1.microchip.com/downloads/en/DeviceDoc/dsPIC33CH128MP206-Family-Data-Sheet-DS70005371.pdf (document family reference). The PDF includes the 28/36/48/64/80-pin variants in a single document, full electrical characteristics, and pinout for the 64-pin TQFP package used by this part.
What is the pinout of the DSPIC33CH128MP206-I/PT 64-pin TQFP?
The 64-pin TQFP (PT) pinout for the DSPIC33CH128MP206-I/PT assigns pins as follows: power pins VDD/AVDD/VSS/AVSS distributed across the package for noise isolation; high-resolution PWM outputs on RPx/RPyx mapped via PPS; analog inputs AN0-ANx on dedicated pins; communication pins (SDA/SCL, UxTX/UxRX, SCKx/SDIx/SDOx) on PPS-mappable pins; CAN FD onto CANTx/CANRx; and PGEDx/PGECx on dedicated programming/debug pins. Refer to the pinout diagram in the datasheet for the exact mapping of each pin number 1-64.
Is DSPIC33CH128MP206-I/PT suitable for digital power supply designs?
Yes - the DSPIC33CH128MP206-I/PT is specifically optimized for high-performance digital power conversion. It features 12 channels of high-resolution PWM with 250 ps edge placement, four 3.5 MSps 12-bit ADCs with simultaneous sampling, and the dual-core architecture that dedicates one CPU to the control loop and the other to housekeeping tasks. According to Microchip's product brief, it is targeted at digitally controlled SMPS, wireless charging, server/telecom power, and LED drivers.
Where to buy DSPIC33CH128MP206-I/PT online?
The DSPIC33CH128MP206-I/PT is in stock and ships today from authorized distributors including DigiKey, Mouser, Arrow, and Microchip Direct, with 11+ distributors listed on Octopart. As of 2026-09-22, the single-unit price is approximately $9.50 at volume distributors, with quantity discounts available at 100, 500, and 1000-piece breaks. Lead time from Microchip Direct is typically 6-10 weeks for production quantities.
What is the price of DSPIC33CH128MP206-I/PT in 100-piece quantity?
The DSPIC33CH128MP206-I/PT 100-piece quantity break is approximately $7.62 per unit as of 2026-09-22, per current distributor listings on DigiKey and Mouser. At 1000 pieces the price drops to roughly $6.10, and at 3000 pieces (full reel quantity) it is approximately $5.45. Pricing varies slightly across distributors; Octopart provides real-time comparison across 11 distributors for live quotes.
What is the lead time for DSPIC33CH128MP206-I/PT?
As of 2026-09-22, DigiKey and Mouser list the DSPIC33CH128MP206-I/PT as in stock with same-day shipping. Microchip Direct factory lead time is typically 6-10 weeks for production quantities. For long-lead-time planning, the T-I/PT tape-and-reel variant (DSPIC33CH128MP206T-I/PT) shares identical silicon and is also listed as in stock at major distributors per their product pages.
DSPIC33CH128MP206-I/PT vs DSPIC33CH128MP205-I/PT - which should I choose?
Both parts are in the same dsPIC33CH128MP2xx family and the same 64-pin TQFP footprint, but differ in Flash size and peripheral count. The DSPIC33CH128MP206-I/PT (this part) provides 152 KB Flash and the full 12-PWM/4-ADC complement, while the DSPIC33CH128MP205-I/PT provides 152 KB Flash with a slightly reduced peripheral set optimized for cost-sensitive designs. Choose the 206 variant when you need all four ADC modules and the full 12-PWM channel count; choose the 205 when cost is the dominant factor and 8-10 PWM channels suffice.
What is the best drop-in replacement for DSPIC33CH128MP206-I/PT?
The closest drop-in replacement within the dsPIC33CH128MP206 family is the DSPIC33CH128MP206T-I/PT, which is the tape-and-reel packaging variant of the same silicon and identical die. For functional upgrades within the same package, the DSPIC33CH128MP506 series adds more Flash/RAM but may require peripheral mapping review. Per Microchip's cross-reference guidance, no cross-brand drop-in exists because the dsPIC dual-core architecture is unique to Microchip - any cross-brand replacement would require firmware and PCB redesign.
Can DSPIC33CH128MP206-I/PT be replaced by a STM32 or other Cortex-M part?
No, the DSPIC33CH128MP206-I/PT cannot be directly replaced by an STM32 or other Cortex-M MCU on the same PCB. The dsPIC33CH dual-core architecture, 64-pin TQFP pinout, and the 250 ps PWM with IR-driven edge placement are unique to Microchip. A cross-brand migration to an STM32F4 or equivalent requires PCB redesign, firmware rewrite, and revalidation of the high-resolution PWM, ADC, and CAN FD peripheral mappings. Use Microchip's cross-reference tool (microchip.com/en-us/cross-reference-search) for application-fit guidance.
Is DSPIC33CH128MP206-I/PT AEC-Q100 qualified?
The DSPIC33CH128MP206-I/PT variant is the industrial temperature grade (-40C to +85C) and is NOT AEC-Q100 qualified. For automotive applications, Microchip offers the DSPIC33CH128MP206-E/PT (extended temperature, -40C to +125C) and AEC-Q100-qualified variants in the same family with different order suffixes. According to Microchip's product brief, the family targets automotive sensors, body electronics, and ADAS sub-modules when ordered with the appropriate automotive grade suffix.
What is the operating voltage of DSPIC33CH128MP206-I/PT?
The DSPIC33CH128MP206-I/PT operates from 3.0 V to 3.6 V (typical 3.3 V) per Microchip's electrical characteristics. Both VDD (digital) and AVDD (analog) rails must be in this range; AVDD typically ties to VDD with a ferrite bead for noise isolation. The device is NOT 5 V tolerant - inputs above 3.6 V can damage the I/O cells. For 5 V system interfaces, add a level translator such as the TXS0108E.
What development tools support DSPIC33CH128MP206-I/PT?
The DSPIC33CH128MP206-I/PT is fully supported by Microchip's MPLAB X IDE, the MPLAB XC-DSC C compiler, and the dsPIC33CH Curiosity Development Board. Per Microchip's toolchain documentation, programmers/debuggers such as the MPLAB ICD 4, MPLAB PICkit 4, and MPLAB Snap provide JTAG programming and real-time debug. Code configurators (MCC) generate peripheral initialization code, and the Microchip Code Coverage plugin supports functional-safety certification.

Engineering reference data for DSPIC33CH128MP206-I/PT — comparison, design guidance, and compliance information.

Selection Guide

Choose the DSPIC33CH128MP206-I/PT when your application needs true dual-core performance for deterministic real-time control plus parallel housekeeping tasks - digital power, motor control, wireless charging, and lighting drivers are ideal fits. It is the 64-pin TQFP workhorse of the dsPIC33CH128MP2xx family with the full 12 PWM / 4 ADC / CAN FD complement.

Choose the DSPIC33CH128MP206T-I/PT instead only if you need tape-and-reel packaging for high-volume production - the silicon is identical.

Choose the DSPIC33CH128MP205-I/PT for cost-sensitive designs that can accept slightly fewer PWM and ADC channels - the 64-pin TQFP footprint matches for direct drop-in.

Choose the DSPIC33CH128MP203-I/M5 or DSPIC33CH128MP205-I/M4 when space is critical and you need a 48-pin uQFN footprint - firmware is largely portable but pin assignments change.

Do NOT consider cross-brand alternatives - the dsPIC33CH dual-core architecture is unique to Microchip, and migrating to an STM32 or Cortex-M part requires full firmware and PCB redesign.

Comparison with Alternatives

Parameter This Product DSPIC33CH128MP206T-I/PT DSPIC33CH128MP205-I/PT DSPIC33CH128MP205-I/M4 DSPIC33CH128MP203-I/M5 DSPIC33CH128MP202-I/SS
Package 64-pin TQFP (PT), 10x10 mm 64-pin TQFP (PT), 10x10 mm - same 64-pin TQFP (PT), 10x10 mm - same 48-pin uQFN (M4) - smaller 48-pin uQFN (M5) - smaller 28-pin SSOP (SS) - smaller
Brand Microchip Technology Microchip Technology Microchip Technology Microchip Technology Microchip Technology Microchip Technology
Main Core Speed 100 MHz 100 MHz - same 100 MHz - same 100 MHz - same 100 MHz - same 100 MHz - same
Auxiliary Core Speed 200 MHz 200 MHz - same 200 MHz - same 200 MHz - same 200 MHz - same 200 MHz - same
Flash Memory 152 KB 152 KB - same 152 KB - same 152 KB - same 152 KB - same 152 KB - same
High-Resolution PWM Channels 12 12 - same Reduced - 8 to 10 Reduced - 8 to 10 Reduced - 6 to 8 Reduced - 4 to 6
ADC Modules 4 x 12-bit 4 x 12-bit - same 3 to 4 x 12-bit 3 to 4 x 12-bit 2 to 3 x 12-bit 1 to 2 x 12-bit
CAN FD Yes Yes Yes Yes Yes Optional

Key Differentiators

  • True dual-core 100MHz + 200MHz architecture (master + slave) (vs Single-core DSPIC33EP family)
  • 12 high-resolution PWM channels with 250 ps edge placement (vs DSPIC33EP64GS506)
  • Four 3.5 MSps 12-bit ADCs with simultaneous sampling (vs DSPIC33CH64MP208702010)
  • 8 KB auxiliary PRAM for proprietary code isolation (vs DSPIC33CH64MP202)

Design Notes

Place a 100 nF ceramic decoupling capacitor as close as possible to every VDD pin (4-5 VDD pins on the 64-pin TQFP) and a 4.7 uF bulk tantalum or ceramic capacitor at the board-level supply entry. AVDD must be tied to VDD through a ferrite bead or pi-filter to isolate analog supply noise from digital switching; AVSS ties directly to VSS with a star ground under the IC. According to Microchip AN2721, this layout is critical for achieving the 72 dB PSRR required by 12-bit ADC accuracy.

Estimated: at full 100 MIPS main-core + 200 MIPS auxiliary-core operation with all four ADC modules active, the device draws up to approximately 80 mA, dissipating about 260 mW at 3.3 V. The TQFP-64 (PT) package has theta_JA of approximately 50 C/W on a standard 4-layer PCB (JEDEC EIA/JESD51), yielding a junction-to-ambient rise of roughly 13 C above ambient. This is well within the -40C to +85C industrial operating range without a heatsink, but for enclosed enclosures exceeding +70C, derate the maximum operating temperature by 5-10 C.

Do NOT apply input signals above 3.6 V to any GPIO pin - the DSPIC33CH128MP206-I/PT is NOT 5 V tolerant and will damage the I/O cells. For 5 V system interfaces, add a level translator such as TI TXS0108E or NXP PCA9306. Additionally, when migrating from a single-core dsPIC33EP or dsPIC33FJ, note that the auxiliary core requires its own startup initialization via the master core's mailbox interface - missing this step causes the auxiliary core to remain in reset. Refer to Microchip AN2721 chapter on dual-core boot sequencing.

Route high-resolution PWM traces (PWMH/PWML pairs) with matched trace lengths (delta < 1 mm) and at least 0.2 mm clearance from adjacent signal traces to minimize cross-coupling. Place the bootstrap diodes for half-bridge driver circuits within 5 mm of the high-side driver supply pin. Keep analog input traces (ANx) at least 3 mm away from any switching PWM trace, and guard them with ground traces on both sides. Per Microchip's high-resolution PWM layout guide, these practices are mandatory to achieve the 250 ps PWM edge resolution in production.

Compliance Information

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Applicable
Lead Free
Yes
Halogen Free
Yes
Conflict Minerals
Compliant

RoHS and REACH compliant per Microchip product page; lead-free and halogen-free. The I/PT suffix denotes industrial temperature grade (-40C to +85C) and is NOT AEC-Q100 qualified - for AEC-Q100 automotive grade, order the AEC-Q100-qualified variant suffix from Microchip.

Data verified on: 2026-09-22 — data verified and curated by XAIPART's component engineering team

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