ADC/DAC
Produtos (2518)
LTC2355IMSE-12 - 12-Bit 3.5Msps Serial ADC | Analog Devices
The Analog Devices LTC2355IMSE-12 is a 12-bit, 3.5Msps successive approximation register (SAR) analog-to-digital converter with a single differential input channel, housed in a 10-pin MSOP-EP (exposed pad) package. It operates from a single 3.3V supply, drawing only 5.5mA, and features an integrated 2.5V internal bandgap reference for ratiometric or absolute measurements. An ADC (Analog-to-Digital Converter) is a data converter that samples continuous analog signals and quantizes them into discrete digital codes. SAR ADCs use a successive-approximation algorithm with an internal DAC and comparator, delivering deterministic latency, low power, and excellent DC accuracy - making them the dominant architecture for industrial, instrumentation, and precision sensor applications that require kilo-sample to mega-sample rates without the complexity of pipeline or sigma-delta converters. Key features include 3.5Msps conversion rate, 71.1dB SINAD at 12 bits, 18mW power dissipation, and a Sleep shutdown mode that reduces consumption to 13uW between conversions. The serial interface simplifies PCB routing and minimizes digital switching noise coupling back into the analog front end. The 10-pin MSOP-EP footprint with an exposed thermal pad provides low thermal resistance and a compact 3mm x 3mm board area. Typical applications include industrial process control, multi-channel data acquisition front ends, portable or battery-powered instrumentation, motor control feedback loops, and optical sensor monitoring. The differential input rejects common-mode noise in long cable runs or noisy industrial environments. When designing with this ADC, provide a low-impedance input driver (typically an op-amp buffer) and bypass the supply with 0.1uF and 10uF ceramic capacitors placed close to the AVdd pin. The exposed pad must be soldered to a sufficient copper pour for thermal dissipation and low-impedance ground return.
LTC2355IMSE-14 - 14-bit 3.5Msps SAR ADC | Analog Devices
The Analog Devices LTC2355IMSE-14 is a 14-bit, 3.5Msps serial successive-approximation-register (SAR) analog-to-digital converter (ADC) with differential inputs, housed in a 10-lead MSOP package with an exposed pad. It draws only 5.5mA from a single 3.3V supply and supports a 0V to 2.5V unipolar differential input range with 80dB common-mode rejection. A SAR ADC is a type of analog-to-digital converter that uses an iterative binary-search algorithm against a precision DAC to digitize an analog signal in a single conversion cycle, requiring no pipeline latency. SAR ADCs sit within the broader category of data converters, between sigma-delta ADCs (highest resolution, lowest speed) and flash ADCs (lowest resolution, highest speed). This places SAR converters in the middle of the trade-off space, offering high accuracy at moderate speeds with deterministic latency, which is critical for multiplexed data acquisition, motor control feedback, and instrumentation loops. The LTC2355-14 delivers 71.1dB SINAD at 14-bit resolution and 74.2dB SINAD at 12-bit resolution, giving designers flexibility to trade resolution for dynamic range. A Sleep shutdown mode reduces quiescent current to just 13uW, and the on-chip 2.5V internal bandgap reference can be overdriven by an external reference when higher accuracy or temperature stability is required. Power dissipation is only 18mW at full speed, which is exceptionally low for the sample-rate class. Typical applications include portable high-speed data acquisition, multiplexed sensor front-ends, industrial process control, and battery-powered instrumentation. The combination of small footprint, low power, and differential input architecture suits space-constrained designs where ground-loop immunity is required, such as isolated sensor digitizers and handheld test equipment. When designing with this part, place the 10uF bypass capacitor and 0.1uF decoupling capacitor as close as possible to the supply pins and bond the exposed pad (Pin 11) to a continuous ground plane to achieve the rated thermal and AC performance. Avoid driving the analog inputs above the supply rail to prevent input-protection conduction. This page synthesizes distributor pricing, cross-brand drop-in alternatives, and practical PCB layout guidance not consolidated on the manufacturer datasheet, giving a one-stop reference for engineers selecting the LTC2355IMSE-14.
LTC2358HLX-18#PBF - 18-Bit 200ksps/Ch Octal SAR ADC | Analog Devices
The Analog Devices LTC2358HLX-18#PBF is a buffered, 8-channel simultaneous-sampling, 18-bit successive approximation register (SAR) analog-to-digital converter rated at 200 ksps per channel, housed in a 48-pin LQFP (7x7 mm) package with exposed pad. Each channel integrates a picoamp-input analog buffer, a wide common-mode range front end, and 128 dB CMRR, enabling direct digitization of ±10.24 V true bipolar and 30 V_P-P common-mode signals without external signal conditioning. A SAR ADC is a successive-approximation-register converter that resolves one bit per clock cycle using a binary-search algorithm against a precision DAC. SAR ADCs occupy the middle ground between delta-sigma (high resolution, low speed) and flash (very fast, low resolution) converters, and are preferred for multi-channel data acquisition where deterministic per-channel latency and low latency-to-sample ratios matter. The LTC2358 family sits in the multi-channel simultaneous-sampling SAR segment alongside the Linear Technology legacy octal ADCs, offering per-channel independent SoftSpan range control. Headline specifications include 96.4 dB SNR, ±3.5 LSB INL (max), no missing codes at 18 bits, 128 dB CMRR, and pin-selectable SPI CMOS (1.8 V to 5 V) or LVDS serial interfaces with one to eight output lanes in CMOS mode. The internal reference and buffer remove the need for an external reference IC, while flexible high-voltage analog supplies accept rails from 5 V up to ±18 V or 0 V to 38 V. The architecture combines a switched-capacitor charge-redistribution DAC core with per-channel input buffers that present a very high impedance to the signal source, eliminating the loading effects and kickback currents typical of unbuffered SAR inputs. The SoftSpan interface allows each channel's input range to be reconfigured on a per-conversion basis between soft-span ranges from ±10.24 V down to 0 V to 5 V, trading full-scale range for noise density. Typical applications include multi-axis industrial position and pressure data acquisition, multi-phase power and energy metering, optical and analytical instrumentation, and any high-channel-count simultaneous-sampling test system requiring 18-bit resolution. The wide common-mode range makes it suitable for direct connection to bridges, RTDs, thermocouples, and current-shunt monitoring networks. When designing with this device, allocate the exposed pad to a continuous ground copper pour to maintain junction temperature within the -40 °C to +125 °C operating range, and follow Analog Devices' recommended layout for the analog and digital supply decoupling networks. The LVDS interface requires 100 Ω termination at the receiver end; CMOS mode requires level shifters if interfacing to a 1.8 V host. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes that are not available in the manufacturer datasheet alone.
LTC2360CTS8 - 12-Bit 100ksps SAR ADC, TSOT-23-8 | Analog Devices
The Analog Devices LTC2360CTS8 is a 12-bit, 100 ksps successive-approximation-register (SAR) analog-to-digital converter (ADC) housed in an 8-pin TSOT-23 (TS8) surface-mount package. The part consumes only 0.5 mA from a single 2.35 V to 3.6 V supply, scales its supply current linearly with sample rate (Nap mode), and integrates a low-noise input structure that supports single-ended inputs with a 0 V to VDD or 0 V to VREF range. Per the LTC2360 family datasheet, the converter delivers true 12-bit performance with no missing codes and integral nonlinearity (INL) and differential nonlinearity (DNL) characterized for the commercial 0 °C to 70 °C temperature range. A SAR ADC is a type of analog-to-digital converter that uses a binary-search successive-approximation algorithm: each clock cycle the internal capacitive DAC is charged from the input and then iteratively switched against a reference to resolve one additional bit. SAR ADCs are valued for low latency (one conversion in N clocks), deterministic behavior, and excellent DC accuracy with no pipeline delay, making them the natural choice for multiplexed data-acquisition channels, industrial control loops, and precision instrumentation. The LTC2360 belongs to the broader ADC IC family (SAR -> ADC -> data converter -> signal chain -> analog IC) and is widely used where board area and power are constrained. Key features include 100 ksps sampling rate, single 3 V supply operation with 0.5 mA active supply current, automatic Nap-mode power-down that scales current with throughput, an external reference input for system-rail ratio-metric conversions, and a compact TSOT-23-8 footprint measuring roughly 2.9 mm x 1.6 mm. The device uses a simple SPI/QSPI/MICROWIRE-compatible serial interface, so it can communicate with virtually any microcontroller or DSP with as few as three digital lines. These traits let designers drop the part into densely populated PCBs without dedicated analog rails. The architecture combines a precision input sampling network, a charge-redistribution SAR core, and an internal conversion clock; the wide external-reference range (1 V to VDD) lets the dynamic range track the system reference rather than the supply, simplifying calibration in ratiometric designs. Nap mode and shutdown reduce IDD at low throughput, which is critical for battery-powered sensors that must idle most of the time and only wake for a quick burst of conversions. Typical applications include portable instrumentation, battery-powered sensor nodes, industrial process-control analog front ends, optical-module monitoring, and general-purpose data-acquisition boards. The TSOT-23 footprint is especially attractive for handheld medical devices and consumer audio accessories where PCB real estate is at a premium and the SPI interface simplifies integration with low-cost Cortex-M0 microcontrollers. When designing with this part, place the supply bypass capacitor (typically 10 µF tantalum in parallel with 0.1 µF ceramic) within a few millimeters of the VDD pin and route REF analog ground back to a single system star ground. Use short, symmetric analog traces to the analog input, and avoid running the serial clock near the analog input trace to prevent digital-to-analog coupling. This page synthesizes distributor pricing, pin-compatible drop-in alternatives, and practical design notes drawn from the LTC2360 family datasheet to provide practical context that is not always present on a single distributor listing.
LTC2360HTS8 - 12-Bit 100kSPS SAR ADC in TSOT-23-8 | Analog Devices
The Analog Devices LTC2360HTS8 is a 12-bit, 100 kSPS, single-channel, low-power successive-approximation-register (SAR) analog-to-digital converter that consumes only 0.5 mA from a single 3 V supply. Housed in a tiny TSOT-23-8 surface-mount package, the part delivers a serial SPI-compatible output and uses an external reference voltage, making it well suited to compact, power-constrained embedded designs. A SAR ADC is a sampling converter that uses a binary search through an internal capacitive DAC to resolve each analog sample in one conversion cycle. The SAR architecture offers a deterministic latency of one conversion cycle, intrinsic single-shot accuracy, and excellent dynamic performance at moderate sampling rates, distinguishing it from sigma-delta converters (which trade latency for higher resolution) and from pipeline ADCs (which require higher power and more complex calibration). Within the broader component hierarchy, the LTC2360HTS8 sits at: SAR ADC -> analog-to-digital converter -> data converter -> signal chain IC -> semiconductor. Key electrical features include 12-bit resolution, 100 kSPS maximum sampling rate, single-ended analog input, SPI/serial digital interface, external voltage reference, and 1:1 sample-and-hold-to-ADC ratio. Supply current scales down automatically at lower sampling rates, and the device operates from a 2.35 V to 3.6 V supply with a -40 °C to +125 °C extended automotive temperature range, making it a robust fit for industrial and harsh-environment data-acquisition front ends. Typical applications include portable instrumentation, sensor signal conditioning, isolated data acquisition, battery monitoring, and high-speed closed-loop control. The compact TSOT-23-8 footprint also enables use in space-constrained designs such as wearables, IoT edge nodes, and small-form-factor PLC analog input modules. When designing with this part, observe the analog input drive and reference decoupling recommendations in the manufacturer datasheet, and place the 0.1 µF reference bypass capacitor as close as possible to the REF pin to avoid conversion noise. The serial interface simplifies galvanic isolation and is compatible with most modern microcontrollers and DSPs. This page consolidates distributor pricing, drop-in alternatives in the same TSOT-23-8 footprint, and practical design considerations not found in a single datasheet excerpt, giving engineers a single reference for BOM validation, sourcing, and layout review.
LTC2360ITS8 - 12-bit 100ksps SAR ADC | Analog Devices | TSOT-23-8
The Analog Devices LTC2360ITS8 is a 12-bit, 100ksps successive-approximation-register (SAR) analog-to-digital converter (ADC) that draws only 0.5 mA from a single 3 V rail and is housed in a space-saving 8-pin TSOT-23 (TS8) package. Key headline parameters are 12-bit resolution, 100 ksamples per second conversion speed, and 0.5 mA typical supply current at full throughput. The device integrates an auto shutdown sequence between conversions, scaling supply current down to the nanoampere regime at reduced sampling rates, which makes it well suited to battery-powered and duty-cycled acquisition systems. A SAR ADC is a successive-approximation-register converter, a class of precision Nyquist-rate data converters that perform a binary search through an internal capacitive DAC using a single comparator and a logic SAR state machine. SAR is a sub-type of analog-to-digital converter (ADC), which itself belongs to the data-converter (or precision converter) family within the broader mixed-signal IC hierarchy. SAR ADCs are widely used for their deterministic latency, lack of pipeline delay, and excellent DC accuracy, making them a popular alternative to delta-sigma converters in multiplexed, multi-channel, and control-oriented applications. The LTC2360 family features a true-analog ground-referenced 0 V to VDD or 0 V to VREF unipolar input range, providing excellent ground-referenced signal handling for low-voltage sensors. The part operates from a single 2.7 V to 3.6 V analog supply, requires only 0.5 mA at 100 ksps, and supports an external reference up to VDD for designer-controlled input range scaling. Conversion is initiated through a simple serial-clock (SCK) protocol with a one-cycle latency, allowing direct interface to SPI-/QSPI-/MICROWIRE-compatible microcontrollers and DSPs without glue circuitry. Architecturally, the LTC2360ITS8 combines a precision low-power capacitive DAC, a high-speed comparator, and an internal oscillator. Auto shutdown between conversions drops quiescent current dramatically at lower sampling rates, allowing the part to consume microampere-level average current in duty-cycled sensor reads. Available in 6-pin and 8-pin TSOT-23 packages, the SOT-23 footprint enables extremely small board area, ideal for high-density sensor nodes, portable instrumentation, and space-constrained PCB layouts. Typical applications include portable and battery-powered sensor acquisition, isolated data acquisition front-ends, pen tablets and touch digitizers, consumer audio and instrumentation, industrial process control loops, and general-purpose analog monitoring. The wide operating range and small package also make it suitable for wearable health monitors and IoT edge devices. When designing with this part, ensure the reference pin is properly bypassed and that the analog input is bandwidth-limited to the 100 ksps Nyquist limit. The SOT-23-8 footprint with exposed pad requires careful PCB thermal layout to dissipate the modest power dissipation of approximately 1.5 mW at 100 ksps. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone, giving engineers a single source for parametric, sourcing, and design-in information for the LTC2360ITS8.
LTC2361HTS8 - 250ksps 12-Bit SAR ADC | Analog Devices
The Analog Devices (formerly Linear Technology) LTC2361HTS8 is a 12-bit, 250 ksps, successive approximation register (SAR) analog-to-digital converter housed in a compact 8-pin TSOT-23 (HTS8) package. The device operates from a single 2.35 V to 3.6 V supply, drawing only 0.75 mA typical supply current at full sample rate, and supports a unipolar 0 V to VDD or 0 V to VREF input range with an external reference option for application flexibility. A SAR ADC is a type of data converter that uses a binary search algorithm and a capacitive DAC to digitize an analog input. SAR converters are valued for low latency (single-cycle conversion), deterministic behavior, and high dynamic performance at moderate sample rates. The LTC2361 belongs to the broader data converter (ADC) family, which sits within the signal chain hierarchy of analog mixed-signal ICs, ultimately serving precision measurement, industrial, and instrumentation systems. Key features of the LTC2361HTS8 include 12-bit resolution with no missing codes, an SPI/MICROWIRE-compatible serial interface, automatic power-down between conversions to reduce average current, and a small TSOT-23-8 footprint that enables high-density PCB designs. The LTC2360/LTC2361/LTC2362 family shares the same die and pinout across 100/250/500 ksps, allowing the same layout to be reused for different speed grades. The device accepts a 0 V to VDD or 0 V to VREF full-scale input, which suits single-ended sensor interfaces. The internal architecture combines a precision sample-and-hold front-end with a charge-redistribution SAR core, a high-bandwidth internal reference buffer, and on-chip conversion clock generation. The serial data output (SDO) and serial clock (SCK) use a simple three-wire interface that connects directly to microcontrollers, DSPs, and FPGAs, while the automatic nap mode between conversions reduces average power consumption at lower throughput rates. Typical applications for the LTC2361HTS8 include portable instrumentation, data acquisition front-ends, battery monitoring, industrial process control loops, and isolated sensor signal conditioning. The wide supply range and low current draw also make it suitable for low-power remote monitoring and energy-harvesting systems. When designing with the LTC2361HTS8, observe the input driving requirements in the manufacturer datasheet — the S/H front-end has specific acquisition-time and source-impedance constraints. A low-impedance buffer or op-amp driver is often required to reach the rated THD and SNR performance; a poor driver will noticeably degrade the converter's effective resolution. This page synthesizes distributor pricing, drop-in alternatives drawn from the LTC2360/2361/2362 same-package family, and practical design notes not found in the manufacturer datasheet, providing a one-stop engineering reference for selecting the LTC2361HTS8.
LTC2361ITS8 - 12-Bit 250ksps SAR ADC in TSOT-23 | Analog Devices
The Analog Devices LTC2361ITS8 is a 12-bit, 250 ksps successive-approximation analog-to-digital converter that operates from a single 2.7 V to 3.6 V supply and draws only 0.5 mA during conversion in a tiny 6-pin/8-pin TSOT-23 (MO-193) SMD package. It features a single-ended analog input, an external reference, a low-power auto-shutdown that drops supply current between conversions, and a high-speed SPI/serial interface compatible with 1.8 V logic. The device is a member of the pin-compatible LTC2360 (100 ksps), LTC2361 (250 ksps), and LTC2362 (500 ksps) family, allowing designers to scale throughput on a single PCB layout. What is a SAR ADC? A successive-approximation-register ADC is a topology that converts an analog input to a 12-bit digital code in one internal clock cycle by binary-searching a capacitive DAC against the sampled input voltage. SAR converters sit in the ADC hierarchy under Nyquist-rate data converters and above flash and dual-slope converters, offering an industry-standard balance of low power consumption, small footprint, and high accuracy for general-purpose data acquisition. Key features include true 12-bit performance with no missing codes, an external reference that sets input common-mode and full-scale range, a sample-and-hold front-end accepting 0 V to VREF inputs, and a serial data interface that reduces pin count versus parallel-output ADCs. Compared with the 100 ksps LTC2360, the LTC2361 doubles throughput for the same package and supply current, and the LTC2362 doubles throughput again. Technically, the architecture auto-powers-down between conversions and reduces supply current proportionally to the actual conversion rate; at 1 ksps the supply current falls well below 0.5 mA, yielding industry-leading sample-rate-to-power efficiency for battery-powered and remote-sensor applications. Typical applications include compact 12-bit data acquisition systems, portable instrumentation, sensor signal conditioning with microcontroller-based post-processing, loop-powered industrial 4-20 mA digitizers, and handheld medical monitoring where board area is constrained. When designing with the LTC2361ITS8, place the 0.1 uF decoupling capacitor close to the VDD pin and observe the tACQ acquisition-time timing budget to ensure rated linearity at full throughput. A clean low-noise VREF source is required for full 12-bit accuracy. This page synthesizes distributor pricing, verified pin-compatible alternatives in the TSOT-23 footprint, and practical design notes that go beyond a single datasheet summary.
LTC2362HTS8 - 12-Bit 500ksps SAR ADC TSOT-23-8 | Analog Devices
The Analog Devices LTC2362HTS8 is a 12-bit, 500 ksps successive approximation register (SAR) analog-to-digital converter housed in an 8-pin TSOT-23 (HTS8) package. It operates from a single 3 V supply and draws only 1.1 mA during conversion, automatically powering down between conversions to extend battery life. The full-scale analog input range is 0 V to VDD (or VREF), and the digital interface is a compact SPI/QSPI/MICROWIRE-compatible serial port that supports daisy-chaining of multiple ADCs. An ADC (analog-to-digital converter) is a data-conversion IC that translates a real-world analog voltage into a discrete digital code for processing by a microcontroller, DSP, or FPGA. SAR ADCs sample the input through a track-and-hold, perform a binary search against an internal DAC, and present the result one bit per clock cycle. In the broader hierarchy, the LTC2362HTS8 sits in the SAR-ADC family within the data-converter category of mixed-signal integrated circuits. The 12-bit resolution and 500 ksps throughput place it in the precision low-power tier favored for instrumentation, sensor read-out, and portable measurement front-ends. Key specifications include 12-bit resolution, 500 ksps sampling rate, 1.1 mA typical supply current at full speed, automatic nap/power-down between conversions, a single-ended 0 V to VDD input range, and a SPI-compatible serial interface. The HTS8 suffix designates the TSOT-23-8 surface-mount package with a thermal-pad-exposed lead frame that lowers thermal resistance versus a conventional SOT-23 footprint. Operating temperature range spans –40 °C to +125 °C (H grade), and the device is specified over the extended industrial range for harsh-environment designs. The 500 ksps sampling rate makes the LTC2362HTS8 well suited to multi-channel multiplexing architectures where each channel is sampled sequentially. The combination of low 1.1 mA supply current and automatic power-down enables battery-powered data-acquisition systems that idle most of the time and only burst-sample on demand. Designers should keep in mind that the H grade operating range, TSOT-23-8 footprint, and 3 V nominal supply set this part apart from higher-resolution or higher-speed pipeline ADCs in the broader product family. Typical applications include portable instrumentation, multi-channel data-acquisition front-ends, sensor signal conditioning read-outs, and industrial process-control analog input modules. This page synthesizes distributor stock, drop-in pin-compatible alternatives within the LTC236x family, and practical layout notes that complement the official datasheet.
LTC2362ITS8 - 500ksps 12-Bit Serial ADC | Analog Devices
The Analog Devices LTC2362ITS8 is a 500 ksps, 12-bit, sampling Successive Approximation Register (SAR) analog-to-digital converter that operates from a single 3V supply and draws only 1.1 mA. Housed in a compact TSOT-23-8 (TS) package, this ADC is part of the LTC2360/LTC2361/LTC2362 family, where the -2 suffix variant delivers the highest sample rate of the trio. A single-ended analog input is sampled through a low-noise front end, and conversions are clocked via an external SCK, with results shifted out through a simple SPI-compatible serial interface. A SAR ADC is a successive-approximation-register analog-to-digital converter that uses a binary search across an internal capacitive DAC to resolve each conversion in N clock cycles. SAR ADCs offer deterministic latency, no pipeline delay, and excellent DC accuracy, which makes them the architecture of choice for multiplexed data-acquisition systems, industrial sensor front-ends, and precision instrumentation where every sample's timing relationship to the input must be exact. Key features of the LTC2362ITS8 include 12-bit resolution, 500 ksps throughput, an integrated low-drift reference, 1.1 mA typical supply current at full speed, automatic power-down between conversions to reduce average current, and a wide input common-mode range. The TSOT-23-8 footprint is roughly half the board area of an MSOP-10, making this part attractive for space-constrained designs. The supply current drops automatically at lower sample rates, supporting battery-powered applications without sacrificing dynamic performance. Architecturally, the device combines a sample-and-hold amplifier, a charge-redistribution DAC, a comparator, and a SAR control state machine. The 3-wire serial interface (CS, SCK, SDO) is compatible with standard SPI and Microwire controllers, requiring no external configuration registers - the part is hardware-strapped for 12-bit mode at 500 ksps. Internal calibration on power-up trims offset and linearity, simplifying software bring-up. Typical applications include portable instrumentation, battery-powered data loggers, isolated industrial sensor front-ends, and general-purpose multi-channel analog monitoring where the SPI output feeds a microcontroller or FPGA. The combination of high speed, small package, and low current also suits handheld medical sensors and 4-20 mA loop-powered smart transmitters. When designing with the LTC2362ITS8, place a 0.1 uF decoupling capacitor within 2 mm of the VDD pin and keep the analog input traces short and guarded. The reference is internal, so an external bypass of 1 uF is recommended. Ensure the SPI SCK frequency does not exceed the device's maximum to maintain conversion accuracy at full throughput. This page synthesizes real-time distributor pricing, drop-in compatible same-family variants, and practical PCB-level design guidance not found in the manufacturer datasheet alone.
LTC2365CTS8 - 12-bit 1Msps SAR ADC | Analog Devices
The Analog Devices LTC2365CTS8 is a 12-bit, 1 Msps, single-ply sampled successive-approximation analog-to-digital converter (SAR ADC) housed in an 8-pin TSOT-23 package. Operating from a single 3 V supply, the device consumes only 2 mA during conversion, making it suitable for power-constrained and portable designs. The LTC2365 accepts a unipolar analog input range of 0 V to VDD or 0 V to VREF and delivers 72 dB SINAD and -80 dB THD at full speed, supporting precision measurement front-ends. An ADC (Analog-to-Digital Converter) is a mixed-signal integrated circuit that converts continuous analog voltages into binary digital words; the SAR (Successive Approximation Register) architecture is one of the most widely used ADC topologies, valued for its deterministic latency, low power, and ability to deliver medium-to-high resolution at multi-Msample/s rates. Within the broader hierarchy, the LTC2365 sits in the SAR ADC -> data converter -> mixed-signal IC -> semiconductor family, sharing this category with 12-, 14-, and 16-bit precision converters from Analog Devices, Texas Instruments, and Maxim. Key features of the LTC2365CTS8 include a high dynamic range sample-and-hold circuit, a high-speed serial SPI-compatible interface, 2 mA typical supply current, and the industry's smallest footprint for a 12-bit 1 Msps ADC - the 8-lead TSOT-23 surface-mount package measuring only 2.9 mm × 2.8 mm. These characteristics are engineered for space-limited, low-power precision applications such as instrumentation front-ends, sensor signal chains, and portable data-acquisition systems. The LTC2365CTS8 employs a charge-redistribution SAR core with an integrated sample-and-hold amplifier. Conversion is initiated on the falling edge of CONVST and the result is clocked out via a serial interface (SCK and SDO), enabling direct connection to most microcontrollers, DSPs, or FPGAs without glue logic. Internal reference buffering simplifies external BOM. Typical applications include industrial process control loops, portable medical instrumentation, automotive sensor interfaces, optical module monitoring, multichannel data-acquisition cards, and isolated ADC front-ends driven by digital isolators. When designing with this device, pay close attention to PCB layout: keep analog and digital grounds separated, decouple VDD close to the IC with a 0.1 uF ceramic capacitor, and treat the REF pin carefully to avoid injection of digital switching noise. The TSOT-23 package has low thermal mass, so avoid sustained sampling at the absolute maximum ratings without adequate PCB copper area. This page synthesizes distributor pricing, drop-in TSOT-23 alternatives, and practical design notes not found in the manufacturer datasheet alone.
LTC2365HTS8 - 12-Bit 1Msps SAR ADC | Analog Devices | TSOT-23-8
The Linear Technology/Analog Devices LTC2365HTS8 is a 12-bit, 1Msps successive-approximation analog-to-digital converter (SAR ADC) packaged in an 8-pin TSOT-23 (TS8) and drawing only 2 mA from a single 2.5 V or 3 V supply. Background: A SAR ADC (Successive Approximation Register Analog-to-Digital Converter) is a class of data converter that performs a binary search across the analog input range using an internal DAC and comparator, producing one conversion per N clock cycles for N bits of resolution. SAR ADCs sit within the broader ADC family (SAR, sigma-delta, pipeline, flash) and are widely chosen for applications that need deterministic latency, low power, and small package size. The LTC2365 belongs to the TSOT-23 ADC family from Analog Devices, optimized for space-constrained precision front ends. Key features include a high dynamic range sample-and-hold front end, a high-speed SPI-/QSPI-/MICROWIRE-compatible serial interface, an external reference option (0 V to VDD or 0 V to VREF input range), 72 dB SINAD and -80 dB THD at full sample rate, and a 1 Msps throughput in the LTC2365 grade. The low 2 mA supply current at 1 Msps makes the part suitable for battery-powered and portable instruments, while the TSOT-23-8 footprint allows placement directly next to sensors on crowded mixed-signal boards. Architecturally, the device pairs a charge-redistribution capacitive DAC with an internal oscillator and clock generator; no external clock source is required, which simplifies BOM. The high-impedance analog input and reference pin allow direct connection to low-power sensor outputs or to a precision external reference such as the LT1461. Nap and shutdown modes further reduce current consumption to microampere levels for duty-cycled measurements. Typical applications include portable data acquisition, multichannel sensor front-end digitization, isolated or industrial process control loops, optical module monitoring, and instrumentation where a small serial ADC saves board area. The wide input common-mode range and small 3 mm x 2.9 mm TSOT-23 footprint make it ideal for high-density plug-in modules where SPI-based ADCs are preferred over parallel-interface devices. When designing with the LTC2365, place a 0.1 uF decoupling capacitor as close as possible to the VDD pin, route the analog input traces away from the serial clock, and use a low-noise reference if DC accuracy below 1 LSB is needed at 12 bits. The LTC2365HTS8 is one of several H-grade speed variants; the C-, I-, and H-suffix parts differ in throughput (200 ksps / 500 ksps / 1 Msps respectively), allowing designers to scale speed and power with the same PCB layout. This page synthesizes distributor pricing, drop-in same-family variants, and practical design notes not all found in a single manufacturer data brief.
LTC2365ITS8 - 1Msps 12-Bit Serial SAR ADC in TSOT-23-8 | Analog Devices
The Analog Devices LTC2365ITS8 is a 1Msps, 12-bit, single-channel, serial-interface successive-approximation-register (SAR) analog-to-digital converter that operates from a single 3V supply and draws only 2mA. The device integrates a high dynamic range sample-and-hold front end with a high-speed SPI-compatible serial data interface, and is offered in a space-saving 8-pin TSOT-23 (TSOT-23-8) surface-mount package. A SAR ADC is a successive-approximation-register analog-to-digital converter that resolves N bits in N clock cycles using a binary-search charge-redistribution DAC. SAR ADCs are valued for their deterministic latency (single-cycle conversion), zero pipeline delay, low power consumption, and excellent DC accuracy at moderate sample rates - characteristics that make them the dominant converter architecture for multiplexed data acquisition, industrial instrumentation, and precision sensor signal chains. Key features of the LTC2365ITS8 include a 1Msps guaranteed sample rate, 12-bit no-missing-codes resolution, a true bipolar or unipolar software-selectable input range of 0V to VDD or 0V to VREF (where VREF is set by an external reference), 72dB SINAD and -80dB THD at full sample rate, and a power-down mode that reduces supply current to under 1 microamp between conversions. The serial interface is SPI-/MICROWIRE-/QSPI-/DSP-compatible, allowing direct connection to most microcontrollers, FPGAs, and digital signal processors without glue logic. The 'I' suffix designates the industrial operating-temperature grade (-40C to +85C), and the 'TS8' suffix denotes the 8-pin TSOT-23 (Thin Small Outline Transistor) plastic package. Outstanding AC performance at 1Msps, combined with an extremely small footprint and 2mA supply current, makes the LTC2365ITS8 ideal for compact, battery-powered or isolated data-acquisition modules where board real estate and power dissipation are at a premium. Typical applications include portable and handheld instrumentation, multi-channel data-acquisition systems (using an external analog multiplexer), isolated industrial sensors and 4-20mA loop digitizers, optical module monitoring, and battery management system (BMS) cell voltage and current monitoring in compact embedded designs. When designing with the LTC2365ITS8, place the 0.1 microfarad VDD bypass capacitor as close as possible to the supply pin to minimize digital switching noise on the analog rail. Drive the analog input with a low-impedance, low-noise op-amp buffer (such as the AD8628 or AD8031) to avoid gain error and distortion from source impedance, since the ADC's input draw is non-zero during acquisition. This page synthesizes distributor pricing, drop-in package-and-pin compatible alternatives, and practical design notes that complement the manufacturer datasheet.
LTC2366ITS8 - 12-Bit 3Msps Serial SAR ADC | Analog Devices
The Analog Devices LTC2366ITS8 is a 12-bit, 3 Msps, single-channel successive-approximation-register (SAR) analog-to-digital converter housed in an 8-pin TSOT-23 package. It operates from a single 2.35 V to 3.6 V supply, drawing only 2.6 mA at 3 Msps, and accepts a 0 V to VDD unipolar input range with true ground-referenced sampling. The serial interface is SPI/QSPI/MICROWIRE-compatible, and the part delivers 72 dB SINAD and -80 dB THD at the full 3 Msps throughput. A SAR ADC (Successive Approximation Register Analog-to-Digital Converter) is a type of data converter that performs a binary search against the analog input using an internal DAC and comparator, producing one conversion per N bit-clock cycles. SAR ADCs are valued in precision data-acquisition systems because they sample the input on a single aperture, exhibit zero pipeline latency, and provide excellent DC accuracy with low power consumption - ideal attributes when a system must respond to multiplexed or transient analog events without delay. The LTC2366 family sits within the SAR ADC hierarchy: ADC -> data converter -> signal chain IC -> mixed-signal semiconductor. Key features of the LTC2366 include a high dynamic range sample-and-hold front end, automatic Nap and Sleep power-down modes between conversions, a dedicated REF pin for an external reference, and an SDO line that goes high-impedance when CS is de-asserted to allow multiple parts to share a SPI bus. The TSOT-23-8 footprint is among the smallest available for any 12-bit ADC in this speed class, enabling dense multi-channel data-acquisition front ends on compact PCBs. Architecturally the LTC2366 combines a charge-redistribution DAC array with a low-noise comparator and on-chip clock generator. The external reference (typically 2.5 V or 3.0 V) sets full-scale range; the wide-input-tolerance single-supply design simplifies power-tree design in 3.3 V systems. Latency is one conversion cycle, with throughput controlled by the SCK frequency and CS framing. Typical applications include portable instrumentation, isolated data acquisition, multi-channel multiplexed sensor front ends, motor control feedback loops, optical sensor read-out, and process-control analog input modules. Industrial automation modules and battery-powered handheld meters benefit from its low 2.6 mA active current and sub-microamp Sleep mode. The wide SINAD margin also allows direct connection to high-impedance bridge sensors or audio-bandwidth signal sources when paired with appropriate input buffers. When designing with this part, ensure the reference bypass network uses a high-quality ceramic capacitor close to the REF pin to avoid conversion noise, and keep the SCK trace impedance-controlled to prevent coupling into the analog input. The Nap/Sleep duty-cycle can be tuned to average supply current well below the active 2.6 mA figure for duty-cycled battery systems. This page synthesizes distributor pricing, drop-in alternatives drawn from the same LTC236x family and competitor parametric equivalents, and practical PCB design notes that are not collated in the manufacturer datasheet.
LTC2372CUH-16 - 16-Bit 500ksps 8-Ch SAR ADC | Analog Devices
The Analog Devices LTC2372CUH-16 is a low-noise, high-speed, 16-bit successive approximation register (SAR) analog-to-digital converter with a maximum sample rate of 500 ksps and an integrated 8-channel low-crosstalk input multiplexer. Operating from a single 5 V supply, the part is offered in a 32-lead 5 mm × 5 mm QFN (UH) plastic package, with the LTC2372CUH-16 being the commercial-temperature grade pin-compatible variant of the LTC2372-16 family. A SAR ADC is a successive-approximation-register analog-to-digital converter: a type of Nyquist-rate data converter that performs one conversion per sample clock by binary-searching an internal capacitive DAC against the input voltage. SAR ADCs sit in the broader hierarchy of ADC → data converter → mixed-signal IC → semiconductor device, combining precision analog sampling with synchronous digital logic on a single die. Compared with delta-sigma converters, SAR ADCs offer deterministic latency, no pipeline delay, and excellent multi-channel multiplexing behavior, which is exactly why the LTC2372CUH-16 was architected around an 8-to-1 input MUX. Key features include a fully differential ±VREF input stage (pseudo-differential unipolar and pseudo-differential bipolar inputs are also configurable), an integrated 2.048 V temperature-compensated reference with 20 ppm/°C maximum drift, a single-shot capable reference buffer, and 96 dB SNR. The high-speed SPI-compatible serial interface supports 1.8 V, 2.5 V, 3.3 V and 5 V host logic, and includes a sequencer with 16 steps that can cycle through any subset of the 8 input channels without host intervention. The combination of 500 ksps throughput, 16-bit resolution, 8-channel MUX, and integrated reference makes the LTC2372CUH-16 a strong fit for multiplexed industrial data acquisition, multi-sensor monitoring, and instrumentation front-ends where several analog signals must be digitized by a single converter. The integrated reference eliminates the need for an external 2.048 V reference IC in space-constrained designs. A typical design consideration is that the part's INL and SNR are specified with the on-chip reference buffer enabled; bypassing it degrades AC performance, so the reference buffer pin should be driven according to the datasheet's reference circuit. For best 16-bit noise performance, the analog inputs should be driven by a low-impedance, low-noise op-amp front end. This page synthesizes distributor stock and pricing, drop-in package-compatible alternatives, and practical interface/PCB design notes not found in the manufacturer datasheet alone, organized for engineers evaluating the LTC2372CUH-16 for production designs.
LTC2372CUH-18 - 18-Bit 500ksps 8-Ch SAR ADC | Analog Devices
The Analog Devices LTC2372CUH-18 is a low-noise, high-speed 18-bit successive approximation register (SAR) analog-to-digital converter (ADC) with 8 input channels and a maximum throughput of 500 kSPS, offered in a 32-lead QFN (5x5 mm) package. It achieves ±2.75 LSB (max) INL, no missing codes at 18-bit resolution, and 100 dB SNR (fully-differential) / 95 dB SNR (pseudo-differential) typical. The integrated low-drift 2.048 V temperature-compensated reference (20 ppm/°C max) plus a single-shot capable reference buffer simplify external analog design. An analog-to-digital converter (ADC) is a mixed-signal integrated circuit that converts a real-world continuous analog voltage into a discrete digital code proportional to the input. Within the broader signal-chain taxonomy, the LTC2372-18 belongs to the successive-approximation-register ADC family, which sits under precision data converters (alongside delta-sigma and pipeline ADCs) and ultimately the data-acquisition / power-management IC hierarchy. SAR ADCs are favored when applications need high throughput (hundreds of kSPS to multi-MSPS) with low latency and no pipeline delay, at 16- to 20-bit resolution. Key features include a configurable low-crosstalk 8-channel input multiplexer accepting fully-differential, pseudo-differential unipolar, and pseudo-differential bipolar inputs; a high-speed SPI-compatible serial interface supporting 1.8 V, 2.5 V, 3.3 V, and 5 V logic; a sequencer with a depth of 16; and true 18-bit performance with no missing codes. The single 5 V supply operation simplifies power-tree design, while an internal reference buffer keeps the reference pin stable during single-shot conversions. Architecturally, the LTC2372-18 combines a high-performance 18-bit capacitive SAR core with an integrated input MUX and an on-chip reference/buffer, eliminating the need for an external low-noise reference and ADC-driver buffer in many precision applications. The combination of 100 dB SNR and 500 kSPS throughput targets instrumentation, medical imaging front-ends, and industrial process control. Typical applications include multi-channel data-acquisition systems, medical imaging front-ends, precision industrial process control, vibration analysis, and automatic test equipment (ATE). The wide input-range flexibility also supports direct connection to bridge sensors, thermocouples, and RTD front-ends through simple external instrumentation amplifiers. When laying out the PCB, keep analog and digital ground returns separated under the ADC and join them at a single point near the exposed pad; bypass the 5 V supply with a 1 µF ceramic plus a 10 µF bulk capacitor placed within 5 mm of the AVDD pin. To minimize channel-to-channel crosstalk at 500 kSPS, route the 8 analog inputs with matched impedance and keep them away from the CNV/MCLK/SCK digital traces. This page synthesizes distributor pricing, drop-in alternatives within the LTC23xx family, and practical layout guidance that complements the manufacturer datasheet.
LTC2372HUH-16 - 16-Bit 500ksps 8-Ch SAR ADC | Analog Devices
The Analog Devices LTC2372HUH-16 is a low noise, high speed, 8-channel 16-bit successive approximation register (SAR) ADC operating from a single 5V supply, housed in a 32-pin QFN (5x5 mm) package. It features a 500 ksps maximum sample rate, 1.5 µs conversion time, 96 dB SNR, and an onboard low-drift (20 ppm/°C max) 2.048V temperature-compensated reference with a single-shot reference buffer. An ADC (Analog-to-Digital Converter) is a data-acquisition component that converts real-world analog signals into digital codes for processing by microcontrollers, DSPs, or FPGAs. A SAR (Successive Approximation Register) ADC is a specific architecture that uses a binary-search algorithm and an internal DAC to converge on the input voltage in N clock cycles for N-bit resolution. Within the broader hierarchy, SAR ADCs sit alongside pipelined, sigma-delta, and flash converters in the precision data-converter category, balancing speed, accuracy, and power. Key features include a highly configurable, low-crosstalk 8-channel input multiplexer supporting fully differential, pseudo-differential unipolar, and pseudo-differential bipolar analog input ranges. The high-speed SPI-compatible serial interface supports 1.8V, 2.5V, 3.3V, and 5V logic, and an on-chip sequencer with a depth of 16 allows autonomous channel scanning. The internal reference removes the need for an external precision reference and the associated board area. The architecture combines a charge-redistribution capacitive DAC with a precision comparator and internal clock, achieving excellent INL and DNL while maintaining low power. The 5V single-supply operation and wide logic-level compatibility simplify interface to modern MCUs without level shifters, and the exposed thermal pad on the QFN-32 package supports ground referencing and thermal dissipation. Typical applications include industrial process control and instrumentation, multichannel data acquisition systems, programmable logic controllers, medical instrumentation, and automated test equipment. The 8-channel MUX and sequencer make it particularly attractive for multi-sensor front ends. When designing with this device, allocate adequate settling time between multiplexer channel switches, place the 0.1 µF and 10 µF decoupling capacitors close to the supply pins, and route the analog and digital grounds as star-connected islands meeting at the exposed pad. The internal reference is sufficient for most applications but can be overdriven by an external reference when ultra-low drift is required. This page synthesizes distributor pricing, drop-in alternatives, application circuits, and PCB layout guidance not consolidated in the manufacturer datasheet, giving engineers a single reference for selection and sourcing.
LTC2372HUH-18 - 18-Bit 500ksps 8-Ch SAR ADC | Analog Devices
The Analog Devices LTC2372HUH-18 is a low noise, high speed, highly configurable 8-channel 18-bit successive approximation register (SAR) analog-to-digital converter (ADC) that operates from a single 5V supply and delivers up to 500 ksps throughput in a 32-pin QFN (5x5 mm) package. According to the manufacturer datasheet, the part integrates a low-crosstalk 8-channel input multiplexer, an onboard low-drift (20 ppm/°C max) 2.048V temperature-compensated reference, and a single-shot capable reference buffer, making it a complete multi-channel precision data-acquisition front end. A successive approximation register ADC is a sampled-data converter that binary-searches its internal DAC against the analog input over N clock cycles to produce an N-bit code. The SAR architecture is favored for multiplexed multi-channel applications because each conversion is deterministic, has no pipeline latency, and exhibits excellent DC linearity. The LTC2372HUH-18 belongs to the precision SAR ADC product class, which sits hierarchically under analog-to-digital converters, data converters, and signal-chain ICs in the broader power management and analog semiconductor taxonomy. Key differentiating specifications include 100 dB SNR at the 500 ksps maximum sample rate, 8 fully-differential or pseudo-differential input channels routed through a low-crosstalk MUX, 20 ppm/°C maximum reference temperature coefficient, and an SPI-compatible serial interface that supports 1.8V, 2.5V, 3.3V, and 5V logic. A configurable sequencer with a depth of 16 automates channel scanning, and the wide 4.75V to 5.25V analog supply tolerance suits industrial 5V rails. The 32-QFN (5x5) plastic package with exposed pad provides low thermal resistance, enabling reliable operation over the -40°C to +125°C extended industrial temperature range. In the typical application circuit, the LTC2372HUH-18 is driven by an external op-amp buffer or directly by a low-impedance sensor network, with a 0.1 µF + 10 µF decoupling scheme on AVDD and an RC anti-alias filter at each MUX input. The reference bypass capacitor (typically 10 µF X7R) is critical to achieve the rated SNR. The serial interface is daisy-chainable, allowing multiple LTC2372-18 devices to share one SPI bus when more than eight channels are required. Typical applications include multi-channel industrial data acquisition, programmable logic controller (PLC) analog input modules, medical instrumentation signal chains, and high-accuracy test and measurement front ends. The wide input range options (fully differential, pseudo-differential unipolar, and pseudo-differential bipolar) also make it suitable for direct connection to load-cell bridges, thermocouples with biasing, and current-shunt monitors. When designing with this part, budget the acquisition time carefully: at 500 ksps the conversion clock must allow 1.7 µs for the ADC core plus the acquisition phase, otherwise throughput drops. Use the BUSY indicator and the internal sequencer to offload channel-management CPU overhead, and verify the reference bypass capacitor is low-ESR to avoid SNR degradation above 100 kHz input frequency. This page synthesizes distributor pricing, verified drop-in alternatives, application examples, and practical design notes that complement the manufacturer datasheet and the parametric summaries found on DigiKey, Mouser, and Octopart.
LTC2372IUH-18 - 18-Bit 500ksps 8-Ch SAR ADC | Analog Devices
The Analog Devices LTC2372IUH-18 is a low-noise, high-speed 8-channel 18-bit successive approximation register (SAR) analog-to-digital converter sampling at 500 ksps, housed in a 32-lead 5 mm × 5 mm QFN package. The part operates from a single 5 V analog supply (4.75 V to 5.25 V) and integrates a 2.048 V onboard low-drift (20 ppm/°C max) temperature-compensated reference with a single-shot capable reference buffer, plus a high-speed SPI-compatible serial interface that supports 1.8 V, 2.5 V, 3.3 V, and 5 V logic. The converter is specified for the industrial –40 °C to +85 °C temperature range, denoted by the 'I' suffix in the part number. What is a SAR ADC? A successive approximation register analog-to-digital converter is a precision data-conversion architecture that uses a binary-search algorithm against an internal DAC to determine each code, one bit at a time. SAR ADCs sit in the taxonomy of analog-to-digital converters -> data converters -> signal-chain ICs -> mixed-signal semiconductors, and are prized for low latency, deterministic behavior, no pipeline delay, and excellent DC accuracy - making them the converter of choice for multiplexed multi-channel precision instrumentation, industrial process control, and medical monitoring front ends. The LTC2372IUH-18 achieves 100 dB SNR, and its highly configurable low-crosstalk 8-channel input multiplexer supports fully differential, pseudo-differential unipolar, and pseudo-differential bipolar analog input ranges. A sequencer with a depth of 16 may be programmed through the SPI port to automate channel scanning, and an internal oscillator sets the conversion time, easing external timing constraints. Typical applications include industrial process control and automation, multichannel data acquisition systems, medical instrumentation, and automated test equipment. The wide input range flexibility lets one hardware design serve multiple sensor types - thermocouples, strain gauges, and bipolar transducers - by reconfiguring the MUX rather than redesigning the analog front end. When designing with the LTC2372IUH-18, decouple the AVDD and DVDD rails close to the pins and follow Analog Devices' standard SAR ADC layout recommendations to preserve the 100 dB SNR. Use the internal sequencer rather than discrete channel-selection logic to minimize GPIO usage and to keep channel-to-channel timing deterministic. This page synthesizes distributor pricing, same-family and cross-brand drop-in alternatives, and practical design notes not found on a single manufacturer page, so an engineer can make a sourcing decision in one pass.
LTC2373CUH-18 - 18-Bit, 1Msps, 8-Ch SAR ADC | Analog Devices
The Analog Devices LTC2373CUH-18 is a 18-bit, 1 Msps successive-approximation-register (SAR) analog-to-digital converter with eight multiplexed input channels, 100 dB SNR, and an integrated 2.048 V temperature-compensated reference, housed in a 32-pin QFN (5x5 mm) package. It operates from a single 5 V supply and supports a highly configurable, low-crosstalk input MUX that accepts fully differential, pseudo-differential unipolar, and pseudo-differential bipolar input ranges, making it well-suited for multiplexed data acquisition systems. The device delivers 100 dB SNR at the 1 Msps full sampling rate and dissipates only 27 mW typical power. What is a SAR ADC? A successive-approximation-register ADC is a sampled-data converter that uses a binary-search algorithm against an internal DAC to digitize each input sample in N clock cycles (one per bit). SAR ADCs sit at the intersection of precision (typically 12-20 bits) and speed (100 ksps to multi-Msps), and they need no continuous settling current like delta-sigma converters. Within the data converter hierarchy, SAR ADCs are a subfamily of analog-to-digital converters (ADC), which are part of the data acquisition and signal-chain IC family, used wherever a precise snapshot of an analog voltage is required. The LTC2373-18 combines this SAR architecture with a wide-input multiplexed front end, programmable sequencer, and integrated reference to form a complete multi-channel precision front end. Key features include an onboard low-drift (20 ppm/°C max) 2.048 V reference, a single-shot-capable reference buffer, a high-speed SPI-compatible serial interface that supports 1.8 V, 2.5 V, 3.3 V, and 5 V logic, and a programmable sequencer with depth 16. The 32-QFN (5x5) package provides an exposed pad for thermal relief, enabling continuous 1 Msps operation across the -40 °C to +85 °C commercial temperature range. An internal oscillator sets the conversion time, eliminating the need for an external high-frequency clock source. Architecturally, the LTC2373CUH-18 pairs a charge-redistribution DAC array with a precision comparator and a low-noise input front end that is fully differential to reject common-mode disturbances. The integrated reference and reference buffer reduce external BOM cost while preserving low drift across temperature, and the programmable sequencer allows autonomous channel cycling without microcontroller intervention for each conversion, offloading channel-management overhead in high-channel-count systems. Typical applications include industrial process control and programmable logic controller (PLC) analog input modules, multi-channel data acquisition systems, instrumentation and test equipment, medical instrumentation front ends, and precision sensor signal conditioning. The 100 dB SNR and 18-bit resolution make the part particularly attractive where the dynamic range of multiple channels must be captured simultaneously. A key design consideration is channel acquisition time: at full 1 Msps throughput with a fully-differential input, settle the input amplifier to 18-bit accuracy within the acquisition window. For higher-impedance sources, an ADA4528 buffer may be inserted in front of each MUX channel. Always decouple REFOUT with the manufacturer-recommended capacitor network and route CNV, SCK, and SDO as short match-length pairs to avoid aperture jitter from degrading SNR. This page consolidates distributor pricing, drop-in same-package alternatives, comparison data, and practical design notes that go beyond the manufacturer datasheet alone.
LTC2373HUH-16 - 16-Bit 1Msps 8-Ch SAR ADC, 32-QFN | Analog Devices
The Analog Devices LTC2373HUH-16 is a low-noise, high-speed 16-bit successive approximation register (SAR) analog-to-digital converter sampling up to 1 Msps with eight input channels and an integrated low-crosstalk analog multiplexer. It operates from a single 5 V supply, supports fully-differential, pseudo-differential unipolar and pseudo-differential bipolar input ranges, and is housed in a 32-pin QFN (5x5 mm) package (UH suffix). An SAR ADC (successive approximation register analog-to-digital converter) is a type of Nyquist-rate data converter that uses a binary search algorithm with an internal DAC to digitize analog signals in a fixed number of clock cycles. SAR ADCs sit within the broader hierarchy of analog-to-digital conversion technologies alongside flash, pipeline, sigma-delta, and integrating ADCs, occupying a sweet spot between speed and accuracy that makes them the workhorse of industrial instrumentation, motor control, and multi-channel data acquisition systems. Key specifications include 16-bit resolution, 1 Msps throughput, 96 dB SNR, an onboard low-drift 2.048 V temperature-compensated reference (20 ppm/°C max), and a single-shot capable reference buffer. The device also integrates a configurable 8-channel input multiplexer and a sequencer of depth 16 that lets designers cycle through channels automatically without continuous host intervention. The high-speed SPI-compatible serial interface supports 1.8 V, 2.5 V, 3.3 V, and 5 V logic, enabling direct connection to modern microcontrollers, FPGAs, and DSPs without level shifters. The SAR architecture delivers zero-latency conversions, deterministic latency per sample, and no pipeline delay, which is critical in closed-loop control systems, multiplexed data acquisition front-ends, and oversampling applications. The wide input common-mode range and flexible input configurations reduce the need for external signal-conditioning circuits, simplifying BOM and shrinking board area. Typical applications include industrial process control and multi-channel data acquisition systems, programmable logic controller (PLC) analog input modules, medical instrumentation front-ends, optical networking power monitoring, and motor control position/velocity feedback. The combination of 1 Msps speed, 8-channel MUX, and 16-bit accuracy makes the LTC2373HUH-16 particularly well-suited for simultaneous-sampling systems using its internal sequencer. When designing with this device, ensure adequate bypass capacitance on both AVDD and DVDD rails and place the input RC network close to the analog input pins to minimize charge kickback. The internal 2.048 V reference buffer should be enabled only when needed to minimize quiescent current draw in power-sensitive designs. This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design guidance not found in the manufacturer datasheet alone, giving engineers an at-a-glance decision matrix for second-source qualification.
LTC2373IUH-18 - 18-Bit, 1Msps, 8-Ch SAR ADC | ADI
The Analog Devices LTC2373IUH-18 is an 18-bit, 1Msps, 8-channel successive-approximation-register (SAR) ADC with 100dB SNR, operating from a single 5V supply and housed in a 32-lead QFN (5x5 mm) package with exposed pad. An SAR ADC (successive-approximation-register analog-to-digital converter) is a type of Nyquist-rate data converter that uses a binary search algorithm to convert an analog voltage into a digital code in N clock cycles. SAR ADCs are valued for low latency, zero-pipeline-delay conversions and are widely used in multiplexed data-acquisition front ends, industrial instrumentation and precision sensor signal chains where deterministic per-sample timing is required. Key features include a highly configurable low-crosstalk 8-channel input multiplexer supporting fully differential, pseudo-differential unipolar and pseudo-differential bipolar analog input ranges; an onboard low-drift 20ppm/°C max 2.048V temperature-compensated reference; a singleshot-capable reference buffer; and a high-speed SPI-compatible serial interface that supports 1.8V, 2.5V, 3.3V and 5V logic. The sequencer with depth 16 enables autonomous channel scanning for cyclic and event-triggered acquisitions. Architecturally, the LTC2373IUH-18 combines a charge-redistribution capacitive DAC core with a precision 2.048V internal reference and dedicated reference-buffer amplifier, achieving 100dB SNR and excellent INL/DNL without external reference components. The wide common-mode input range combined with true-differential switching simplifies front-end signal conditioning for bridge sensors, RTDs and ±10V industrial signals when paired with external attenuators. Typical applications include industrial automation and process control, multichannel data acquisition systems, medical instrumentation, seismic and vibration monitoring, and precision weigh scales. When designing in, allocate adequate bypass capacitance on REF and provide a low-impedance analog ground pour under the exposed pad to maintain SNR at full speed. This page synthesizes distributor pricing, pin-compatible family variants, and practical design notes not found in the manufacturer datasheet.
LTC2381IMS-16 - 16-Bit 250ksps SAR ADC | Analog Devices
The Analog Devices LTC2381IMS-16 is a 16-bit, 250 ksps successive approximation register (SAR) analog-to-digital converter housed in a 16-pin MSOP (I-grade temperature range) package. It operates from a single 2.5V supply, supports a ±2.5V fully differential analog input range, consumes only 3.25 mW, and guarantees ±2 LSB INL max with no missing codes at 16 bits. A SAR ADC is a type of analog-to-digital converter that uses a binary search algorithm through a capacitive DAC and a comparator to digitize an analog input one code-word at a time. SAR ADCs sit in the broader converter hierarchy alongside delta-sigma, pipeline, and flash ADCs, and are favored when designers need a combination of high sampling rate, low latency, and excellent DC linearity. The LTC2381-16 belongs to the precision data converter IC category and serves in the wider role of signal-chain interface between analog sensors/signals and digital processors, MCUs, or FPGAs. Key features include a high-speed SPI-compatible serial interface that supports 1.8V, 2.5V, 3.3V, and 5V logic and a daisy-chain mode for multi-converter synchronization. The device exhibits no cycle latency between conversions, achieves 92 dB SNR (typical), and integrates a low-drift internal reference. The I-grade (–40°C to +85°C) MSOP-16 package is optimized for compact, space-constrained designs. Technically, the LTC2381-16 uses a charge-redistribution capacitive DAC architecture with internal calibration to deliver 16-bit linearity. Its wide common-mode input range simplifies front-end driver design, while the true-differential input rejects common-mode noise from industrial sensor bridges. The combination of low power (3.25 mW), small package, and high throughput makes it well suited to multiplexed multi-channel systems where one ADC serves several analog inputs. Typical applications include industrial process control and instrumentation, seismic data acquisition, portable medical instrumentation, ATE (automatic test equipment) signal capture, and precision weigh scales. The combination of 250 ksps speed and 16-bit accuracy suits control loops where loop latency matters more than absolute noise floor. When designing with this device, ensure adequate input driver bandwidth and a low-impedance reference decoupling network. Use the daisy-chain mode when multiple LTC2381-16 devices must sample simultaneously across a multi-board system. This page synthesizes distributor pricing, drop-in pin-compatible alternatives, and practical design notes that go beyond the manufacturer datasheet to help engineers choose, source, and implement the LTC2381IMS-16 quickly.
LTC2389CUK-16 - 16-Bit 2.5Msps SAR ADC w/ 4.096V Ref | Analog Devices
The Analog Devices LTC2389CUK-16 is a low-noise, high-speed 16-bit successive approximation register (SAR) analog-to-digital converter that samples at up to 2.5 Msps on a single 5V supply, offered in a 48-pin QFN (7x7) package. It integrates a precision 4.096V internal reference with 0.5% initial accuracy and ±20ppm/°C maximum temperature coefficient, plus an internal reference buffer. The pin-configurable analog input supports fully differential ±4.096V, pseudo-differential unipolar 0V to 4.096V, and pseudo-differential bipolar ±2.048V input ranges for direct interface to a wide range of sensor and signal-conditioning front ends. A SAR (Successive Approximation Register) ADC is a precision data-converter type which uses a binary-search charge-redistribution DAC and a comparator to digitize an analog input in N conversion cycles for an N-bit code. SAR ADCs are favored over CMOS pipeline and delta-sigma types where low latency, deterministic single-shot conversion, and wide input common-mode tolerance are required, and they sit hierarchically under the broader ADC category of data-converter ICs. Key features include guaranteed 16-bit resolution with no missing codes, integrated reference and reference buffer, low noise floor of approximately 7.5 ppm RMS, and pin-configurable input spans. The device also provides a flexible LVDS/CMOS-compatible serial or parallel interface and operates over the commercial 0°C to +70°C range, enabling direct PCB streaming for very compact layouts. The architecture combines a capacitive charge-redistribution DAC with an internal precision reference and high-speed comparator, achieving 16-bit performance at multi-MHz speeds without external reference components. A digital filter and on-chip calibration logic minimize integral non-linearity (INL) and differential non-linearity (DNL). This device is intended for industrial process control, multiplexed data acquisition systems, portable or point-of-use systems. The wide analog input range suits ±10V systems through balanced PWM outputs of a front-end driver while preserving full 16-bit dynamic range. When designing with this device, ensure the input signal bandwidth is limited to less than the Nyquist frequency (1.25 MHz at 2.5 Msps) and that source impedance is below 50Ω to avoid conversion errors. Decoupling must include 10µF and 0.1µF ceramic capacitors placed within 5mm of each supply pin, with a 4.7µF reference bypass capacitor. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found on the manufacturer datasheet, with all specs cross-checked against the verified Analog Devices product page and current DigiKey/Mouser listings.