5CSEBA5U19I7N vs 5CSEBA5U19C8N Comparação
Comparação detalhada lado a lado de 5CSEBA5U19I7N por Intel e 5CSEBA5U19C8N por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Intel
5CSEBA5U19C8N - Cyclone V SE SoC FPGA, 85K LE, Dual ARM Cortex-A9 | Intel
5CSEBA5U19C8N ✓ AtivoComparação de especificações
| Parâmetro | 5CSEBA5U19I7N | 5CSEBA5U19C8N |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $119,85 | $195,00 |
| Product Type | SoC FPGA (System-on-Chip FPGA) | — |
| Series | Cyclone V SE | — |
| Logic Elements | 85,000 | 85,000 LE |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Core Frequency | 800 MHz (typical), up to 925 MHz | — |
| Process Technology | 28 nm TSMC low-power | 28 nm TSMC |
| Encapsulamento | 484-pin UBG (UFBGA) 19x19 mm | 484-UBGA (U19, 19x19 mm) |
| Tensão de alimentação | 1.1 V core | — |
| FPGA User I/O | 66 (per datasheet front-page snippet) | — |
| Embedded Memory | Approximately 4,450 Kbits | 3.88 Mbit |
| DSP Blocks | 87 variable-precision (18x18 multipliers) | — |
| Transceivers | Up to 5 Gbps (Cyclone V SE feature) | — |
| HPS Peripherals | USB 2.0 OTG, EMAC, CAN, SPI, I2C, UART, SD/MMC, NAND | — |
| Temperatura de operação | -40C to +100C (Industrial grade, suffix I) | 0C to +85C (commercial) |
| Tipo de montagem | Surface Mount (BGA) | Surface Mount (SMD/SMT) |
| Nível MSL | [DATA_NEEDED: MSL level] | — |
| Status RoHS | Compliant (per Heisener listing and product family) | Compliant |
| Family | — | Cyclone V SE (SoC FPGA) |
| Adaptive Logic Modules (ALMs) | — | 32,070 ALM |
| Processor Cores | — | Dual ARM Cortex-A9 MPCore |
| Core Maximum Frequency | — | 925 MHz (datasheet); 600 MHz commercial speed grade |
| L1 Cache (Instruction) | — | 2 x 32 kB |
| L1 Cache (Data) | — | 2 x 32 kB |
| L2 Cache | — | 512 kB shared |
| FPGA User I/Os | — | 66 I/O |
| Core Voltage | — | 1.1 V |
| Ball Pitch | — | [DATA_NEEDED: ball pitch in mm] |
| Speed Grade | — | C8 (0.85 ns, commercial) |