ADC1112D125HN-C18 vs ADC1113D125HN-C1 Comparação
Comparação detalhada lado a lado de ADC1112D125HN-C18 por Renesas Electronics e ADC1113D125HN-C1 por Renesas Electronics. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Renesas Electronics
ADC1112D125HN-C18 - Dual 11-bit 125MSPS ADC, LVDS/CMOS | Renesas
ADC1112D125HN-C18 ✓ AtivoRenesas Electronics
ADC1113D125HN-C1 - Dual 11-bit 125 Msps ADC, JESD204A | Renesas
ADC1113D125HN-C1 ✓ AtivoComparação de especificações
| Parâmetro | ADC1112D125HN-C18 | ADC1113D125HN-C1 |
|---|---|---|
| Marca | Renesas Electronics | Renesas Electronics |
| Categoria | ADC/DAC | ADC/DAC |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $9,48 | $15,20 |
| Resolução | 11-bit | 11 bit |
| Number of Channels | 2 (dual, simultaneous sampling) | 2 (dual, simultaneous sampling) |
| Sample Rate (Max) | 125 Msps | — |
| Analog Supply Voltage (AVDD) | 3.0 V to 3.6 V | — |
| Digital I/O Supply (OVDD) | 1.8 V to 3.3 V | — |
| Output Interface | CMOS or LVDS DDR (selectable) | — |
| Input Type | Single-ended analog inputs (per channel) | — |
| Reference | Internal programmable (0-6 dB in 1 dB steps) or external | — |
| Control Interface | SPI (3-wire, mode configuration) | — |
| Power-Down Mode | Yes, per-channel via SPI | — |
| Encapsulamento | HVQFN-64 (8x8 mm with exposed thermal pad) | 56-VFQFN (HVQFN-56) with exposed pad, 9 mm x 9 mm, 0.85 mm height (SOT804-3) |
| Tipo de montagem | Surface Mount | Surface Mount |
| Faixa de temperatura de operação | -40 C to +85 C | [DATA_NEEDED: operating temperature range] |
| Nível MSL | 3 (168 hours) | [DATA_NEEDED: moisture sensitivity level] |
| Status RoHS | Compliant | Compliant (assumed from VFQFN package; verify against part declaration) |
| Sample Rate | — | 125 Msps per channel |
| Architecture | — | Pipelined, multi-bit per stage |
| Digital Output Interface | — | JESD204A, serial (CMOS or LVDS DDR) |
| Analog Input | — | Differential, on-chip track-and-hold |
| Supply Voltage (analog) | — | [DATA_NEEDED: AVDD] |
| Supply Voltage (digital) | — | [DATA_NEEDED: DVDD] |
| Power Consumption | — | [DATA_NEEDED: total power at 125 Msps] |
| INL (typical) | — | [DATA_NEEDED: integral non-linearity] |
| DNL (typical) | — | [DATA_NEEDED: differential non-linearity] |
| SNR | — | [DATA_NEEDED: signal-to-noise ratio] |
| SFDR | — | [DATA_NEEDED: spurious-free dynamic range] |
| Input Bandwidth | — | [DATA_NEEDED: analog input bandwidth] |
| Configuration | — | SPI serial control port |