EP1K30TC144-2 vs EP1K30TI144-2N Comparação
Comparação detalhada lado a lado de EP1K30TC144-2 por Intel e EP1K30TI144-2N por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EP1K30TC144-2 | EP1K30TI144-2N |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $18,40 | $25,00 |
| Family | ACEX 1K | — |
| Logic Elements / Cells | 1,728 | 1728 |
| System Gates | 30,000 | — |
| Logic Array Blocks (LABs) | 216 | — |
| User I/Os | 102 | — |
| Embedded Array Blocks (EABs) | 6 | — |
| Total EAB Memory | 24,576 bits | — |
| Process Technology | 0.22 µm SRAM LUT | 0.22 µm CMOS SRAM |
| Core Supply Voltage (VCCINT) | 2.5 V (2.375 V - 2.625 V) | — |
| I/O Supply Voltage (VCCIO) | 3.3 V (LVTTL/LVCMOS), 2.5 V, or PCI | — |
| Maximum Internal Clock Frequency | 200 MHz | — |
| Encapsulamento | 144-pin TQFP (TC) | 144-pin LQFP |
| Operating Temperature (Commercial) | 0C to +70C | — |
| Tipo de montagem | Surface Mount | Surface Mount |
| Nível MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Configuration Method | Passive Serial / JTAG / EPC1/EPC2 PROM | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | Compliant (per Utmel product note) |
| Speed Grade | -2 (mid commercial speed grade) | -2 |
| Series | — | ACEX-1K |
| Manufacturer | — | Intel (formerly Altera) |
| Typical Gate Count | — | 30,000 gates |
| Embedded Memory (RAM bits) | — | 24,576 bits |
| Maximum User I/O | — | 102 |
| Number of Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Number of Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count] |
| Core Voltage (VCCINT) | — | 2.5 V |
| I/O Voltage (VCCIO) | — | 2.5 V / 3.3 V |
| Operating Temperature Grade | — | Industrial |
| Faixa de temperatura de operação | — | -40 °C to +100 °C ambient |
| Lead Pitch | — | 0.5 mm |
| Configuration Interface | — | JTAG (IEEE 1149.1), serial passive/active |