EP1M350F780I6 vs EP1M350F780I5 Comparação
Comparação detalhada lado a lado de EP1M350F780I6 por Altera e EP1M350F780I5 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Altera
EP1M350F780I5 - Altera Mercury Enhanced Configuration Device, 780-pin FBGA | Intel
EP1M350F780I5 NrndComparação de especificações
| Parâmetro | EP1M350F780I6 | EP1M350F780I5 |
|---|---|---|
| Marca | Altera | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Ativo | NRND |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $210,00 | $178,00 |
| Family | Mercury (PLD) | — |
| Logic Cells | 14,400 | — |
| Equivalent Gates | 350,000 | — |
| User I/Os | 486 | — |
| Embedded Memory (bits) | 114,688 | — |
| Core Supply Voltage | 1.8 V | — |
| Encapsulamento | 780-ball FC-FBGA (Fine-line) | 780-ball FineLine BGA (F780) |
| Temperatura de operação | 0 C to 85 C (Industrial) | — |
| Process Technology | CMOS | — |
| Multi-Gigabit Transceivers | Up to 1.25 Gbps with embedded CDR | — |
| Configuration | JTAG (IEEE 1149.1) / Active Serial (EPC) | — |
| LAB Count | 1,440 (per Mouser listing) | — |
| Tipo de montagem | Surface Mount | — |
| Nível MSL | [DATA_NEEDED: MSL rating] | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Device Family | — | Altera Mercury (EP1M) Enhanced Configuration Device |
| Função | — | FPGA configuration PROM with integrated controller |
| Storage Density Code | — | 350 (high-density) |
| Supported Configuration Schemes | — | Passive Serial, Active Serial, Fast Passive Parallel |
| Internal Architecture | — | Configuration controller + flash memory array |
| Programming Method | — | In-system programmable via Altera Quartus / JTAG |
| Temperature Grade (suffix "I") | — | Industrial |
| Speed Grade | — | 5 |
| Target FPGA Compatibility | — | Altera APEX 20K, APEX II, Mercury, Stratix-class high-density FPGAs |
| JTAG Support | — | Yes (IEEE 1149.1 boundary scan) |
| Cascade / Multi-FPGA Support | — | Yes, supports daisy-chained multi-FPGA boot |
| Read-Back | — | Yes |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |