EP2A40F1020C9N vs EP2A40F1020I9N Comparação
Comparação detalhada lado a lado de EP2A40F1020C9N por Intel e EP2A40F1020I9N por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EP2A40F1020C9N | EP2A40F1020I9N |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $175,00 | $165,00 |
| Family | APEX II | APEX II |
| Series | EP2A40 | — |
| Device Type | FPGA (Field-Programmable Gate Array) | — |
| Logic Family | CMOS | — |
| System Gates | 1.5 M | 1,500,000 (1.5 M) |
| Logic Cells / Elements | 38,400 | — |
| Maximum Operating Frequency | 366 MHz | 366 MHz |
| Propagation Delay | 1.55 ns | — |
| Core Voltage | 1.5 V | — |
| Process Technology | 0.15 µm all-layer copper (up to 8 metal layers) | 0.15 um CMOS, up to 8 metal layers |
| User I/O Pins | 735 | — |
| Total Pins | 1020 | — |
| Encapsulamento | 1020-ball FC-FBGA, 33 × 33 mm, 1 mm pitch, FineLine | 1020-pin FC-FBGA (Flip-Chip FineLine BGA) |
| Temperatura de operação | 0 °C to 85 °C | — |
| I/O Standards | True-LVDS, LVPECL, PCML, HyperTransport, LVTTL, LVCMOS, PCI, GTL+, SSTL | — |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | Passive Serial, Passive Parallel Asynchronous/Synchronous, JTAG |
| On-chip Memory | Embedded System Blocks (ESB) for RAM/ROM | — |
| Tipo de montagem | Surface Mount (BGA) | Surface Mount (BGA) |
| Status RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Device Logic Elements / Cells | — | 38,400 cells |
| Core Supply Voltage | — | 1.5 V |
| User I/O Count | — | 735 bidirectional I/O |
| Operating Temperature Grade | — | Industrial (I9 suffix: -40C to +100C per Altera APEX II convention) |
| High-Speed I/O Standards | — | True-LVDS (up to 1 Gbps), LVPECL, PCML, HyperTransport |
| Embedded Memory | — | ESB-based True-Dual-Port/Single-Port RAM, ROM, CAM (bits [DATA_NEEDED: total RAM bits]) |
| Clock Management | — | PLLs (count [DATA_NEEDED: PLL count]) |
| Status do ciclo de vida | — | Obsolete (per distributor listings / Altera APEX II family EOL) |