EP2A40F1020C9N vs EP2A40F1020I9N Comparaison
Comparaison détaillée côte à côte de EP2A40F1020C9N par Intel et EP2A40F1020I9N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A40F1020C9N | EP2A40F1020I9N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $175,00 | $165,00 |
| Family | APEX II | APEX II |
| Series | EP2A40 | — |
| Device Type | FPGA (Field-Programmable Gate Array) | — |
| Logic Family | CMOS | — |
| System Gates | 1.5 M | 1,500,000 (1.5 M) |
| Logic Cells / Elements | 38,400 | — |
| Maximum Operating Frequency | 366 MHz | 366 MHz |
| Propagation Delay | 1.55 ns | — |
| Core Voltage | 1.5 V | — |
| Process Technology | 0.15 µm all-layer copper (up to 8 metal layers) | 0.15 um CMOS, up to 8 metal layers |
| User I/O Pins | 735 | — |
| Total Pins | 1020 | — |
| Boîtier | 1020-ball FC-FBGA, 33 × 33 mm, 1 mm pitch, FineLine | 1020-pin FC-FBGA (Flip-Chip FineLine BGA) |
| Température de fonctionnement | 0 °C to 85 °C | — |
| I/O Standards | True-LVDS, LVPECL, PCML, HyperTransport, LVTTL, LVCMOS, PCI, GTL+, SSTL | — |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | Passive Serial, Passive Parallel Asynchronous/Synchronous, JTAG |
| On-chip Memory | Embedded System Blocks (ESB) for RAM/ROM | — |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Statut RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Device Logic Elements / Cells | — | 38,400 cells |
| Core Supply Voltage | — | 1.5 V |
| User I/O Count | — | 735 bidirectional I/O |
| Operating Temperature Grade | — | Industrial (I9 suffix: -40C to +100C per Altera APEX II convention) |
| High-Speed I/O Standards | — | True-LVDS (up to 1 Gbps), LVPECL, PCML, HyperTransport |
| Embedded Memory | — | ESB-based True-Dual-Port/Single-Port RAM, ROM, CAM (bits [DATA_NEEDED: total RAM bits]) |
| Clock Management | — | PLLs (count [DATA_NEEDED: PLL count]) |
| Statut du cycle de vie | — | Obsolete (per distributor listings / Altera APEX II family EOL) |