EP2AGX65CU17I5G vs EP2AGX65CU17C5N Comparação
Comparação detalhada lado a lado de EP2AGX65CU17I5G por Intel e EP2AGX65CU17C5N por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EP2AGX65CU17I5G | EP2AGX65CU17C5N |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Unknown | NRND |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $0,00 | $178,40 |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Product Family | Arria II GX | — |
| Logic Elements | 60,214 | 60,214 |
| Programmable Logic Bits | 5,371,904 | — |
| User I/O Count | 156 | — |
| Encapsulamento | 358-ball LFBGA, FCBGA | 358-ball FC-UFBGA (UBGA) |
| Number of Terminals | 358 | — |
| Terminal Form | Ball | — |
| Package Code | LFBGA | — |
| Package Shape | Square | — |
| Tipo de montagem | Surface Mount | Surface Mount (BGA) |
| Logic Cell Count | 60,214 | — |
| I/O Count | 156 | — |
| Status RoHS | Compliant | — |
| Lead Free Status | Not stated in verified data | — |
| Faixa de temperatura de operação | [DATA_NEEDED: operating temperature range] | — |
| Core Voltage | [DATA_NEEDED: core voltage] | 0.9 V |
| I/O Voltage Support | [DATA_NEEDED: I/O voltage support] | — |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Maximum Transceiver Data Rate | [DATA_NEEDED: maximum transceiver data rate] | — |
| Configuration Memory | [DATA_NEEDED: configuration memory] | — |
| Package Dimensions | [DATA_NEEDED: package dimensions] | — |
| Embedded Memory | [DATA_NEEDED: embedded memory] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Family | — | Arria II GX |
| LABs/CLBs | — | 2,530 |
| Total Memory Bits | — | 5,371,904 bits (4.4 Mb) |
| Maximum User I/O | — | 156 |
| User I/O Banks | — | 9 (typical, package-dependent) |
| Process Technology | — | 40 nm TSMC low-power |
| Transceivers | — | Up to 16 multi-gigabit transceivers |
| Max Transceiver Data Rate | — | 6.375 Gbps |
| PLLs | — | 8 |
| DSP Blocks | — | 6 × 6 hardened multipliers |
| Speed Grade | — | C5 (middle-speed) |
| Temperature Grade | — | N (extended, -40 °C to +100 °C Tj) |
| Hard PCIe Gen1/Gen2 | — | Yes (with PIPE interface) |
| Configuration Modes | — | FPP, PS, JTAG, EPCS |