EP2S60F484C3N vs EP2S60F484I5N Comparação
Comparação detalhada lado a lado de EP2S60F484C3N por Intel e EP2S60F484I5N por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EP2S60F484C3N | EP2S60F484I5N |
|---|---|---|
| Marca | Intel | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | NRND | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $1.245,75 | $1.325,00 |
| Family | Stratix II | Field Programmable Gate Array (FPGA) |
| Logic Elements | 60,440 | — |
| Adaptive LUTs (ALUTs) | 48,352 | — |
| Embedded Memory (TriMatrix) | 2,544 Kbits (M4K + M512 + M-RAM) | — |
| Embedded DSP Blocks | 12 (48 GMACs at 450 MHz) | — |
| Maximum User I/O Pins | 334 | 334 |
| Encapsulamento | 484-BGA (F484), 1.0 mm pitch | 484-ball FC-FBGA (Flip-Chip Fine-pitch BGA), 1.00 mm pitch |
| Process Technology | 90 nm CMOS, 1.2 V core | 90 nm CMOS |
| Speed Grade | -3 (fastest commercial) | I5 (industrial, slow-speed for low power) |
| Operating Temperature (Commercial) | 0C to +85C (TJ) | — |
| Supply Voltage VCCINT | 1.2 V nominal | — |
| Configuration Modes | FPP, AS, PS, JTAG | — |
| Nível MSL | 3 (per JEDEC J-STD-020) | — |
| Status RoHS | Compliant | [DATA_NEEDED: rohs status not stated in verified data] |
| Lead-Free | Yes | — |
| Series | — | Stratix II (EP2S60) |
| Logic Elements (LE) | — | 60,440 |
| Adaptive Logic Modules (ALM) | — | 24,176 |
| Embedded Memory (bits) | — | 2,544,192 |
| Embedded Memory (M512/M4K/M-RAM blocks) | — | M512: 330, M4K: 255, M-RAM: 2 |
| DSP Blocks (18-bit multipliers) | — | 48 blocks (192 18x18 multipliers) |
| PLLs | — | 12 (4 enhanced + 8 fast) |
| Maximum Fabric Clock | — | 609.76 MHz |
| Core Supply Voltage | — | 1.2 V typical |
| Faixa de temperatura de operação | — | -40 °C to +100 °C (industrial) |
| Tipo de montagem | — | Surface Mount (BGA) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free / halogen-free status] |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel |
| Design Tool | — | Quartus II (legacy; current Intel Quartus Prime with Stratix II device support) |