EP2S60F484C3N vs EP2S60F484I5N 비교

다음의 상세 나란히 비교: EP2S60F484C3N 제조: Intel 및 EP2S60F484I5N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EP2S60F484C3N EP2S60F484I5N
브랜드 Intel Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 NRND Obsolete
재고 상태 In Stock In Stock
단가 (USD) $1,245.75 $1,325.00
Family Stratix II Field Programmable Gate Array (FPGA)
Logic Elements 60,440 —
Adaptive LUTs (ALUTs) 48,352 —
Embedded Memory (TriMatrix) 2,544 Kbits (M4K + M512 + M-RAM) —
Embedded DSP Blocks 12 (48 GMACs at 450 MHz) —
Maximum User I/O Pins 334 334
패키지 484-BGA (F484), 1.0 mm pitch 484-ball FC-FBGA (Flip-Chip Fine-pitch BGA), 1.00 mm pitch
Process Technology 90 nm CMOS, 1.2 V core 90 nm CMOS
Speed Grade -3 (fastest commercial) I5 (industrial, slow-speed for low power)
Operating Temperature (Commercial) 0C to +85C (TJ) —
Supply Voltage VCCINT 1.2 V nominal —
Configuration Modes FPP, AS, PS, JTAG —
MSL 레벨 3 (per JEDEC J-STD-020) —
RoHS 상태 Compliant [DATA_NEEDED: rohs status not stated in verified data]
Lead-Free Yes —
Series — Stratix II (EP2S60)
Logic Elements (LE) — 60,440
Adaptive Logic Modules (ALM) — 24,176
Embedded Memory (bits) — 2,544,192
Embedded Memory (M512/M4K/M-RAM blocks) — M512: 330, M4K: 255, M-RAM: 2
DSP Blocks (18-bit multipliers) — 48 blocks (192 18x18 multipliers)
PLLs — 12 (4 enhanced + 8 fast)
Maximum Fabric Clock — 609.76 MHz
Core Supply Voltage — 1.2 V typical
동작 온도 범위 — -40 °C to +100 °C (industrial)
실장 유형 — Surface Mount (BGA)
Lead-Free / Halogen-Free — [DATA_NEEDED: lead-free / halogen-free status]
Configuration Interface — JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel
Design Tool — Quartus II (legacy; current Intel Quartus Prime with Stratix II device support)

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