EPF10K50STC144-2 vs EPF10K50ETI144-2 Comparação
Comparação detalhada lado a lado de EPF10K50STC144-2 por Intel e EPF10K50ETI144-2 por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Intel
EPF10K50STC144-2 - 50K Gates FLEX-10KS FPGA, 102 I/O, 144-TQFP | Intel
EPF10K50STC144-2 ObsoleteIntel
EPF10K50ETI144-2 - 50K Gates FLEX 10KE FPGA, 144-LQFP | Intel
EPF10K50ETI144-2 ⚠ Última compraComparação de especificações
| Parâmetro | EPF10K50STC144-2 | EPF10K50ETI144-2 |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Última compra |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $17,80 | $26,10 |
| Series | FLEX-10KS | — |
| Manufacturer | Intel (formerly Altera) | — |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Typical Gate Count | 50,000 gates | — |
| Logic Elements | 2,880 | — |
| Embedded RAM | 40,960 bits | — |
| Logic Array Blocks (LABs) | 360 | 360 |
| User I/O Pins | 102 | — |
| Embedded Array Blocks (EABs) | 20 (per datasheet family) | 10 |
| Maximum Internal Frequency | 66.67 MHz | — |
| Propagation Delay | 0.6 ns | — |
| Logic Family | CMOS | — |
| Core Voltage | 5.0 V | — |
| Encapsulamento | 144-TQFP (TQFP-144, 20x20 mm) | 144-LQFP (TQFP), 22 x 22 mm, 0.5 mm pitch |
| Terminal Form | Gull Wing | — |
| Temperatura de operação | 0 C to 70 C (Commercial) | -40C to +85C (Industrial) |
| Temperature Grade | Commercial | — |
| Tipo de montagem | Surface Mount | — |
| Configuration Memory | SRAM-based (volatile) | — |
| Programming Interface | JTAG (IEEE 1149.1), Passive Serial/Parallel | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Family | — | FLEX 10KE |
| Typical Gates | — | 50,000 |
| Maximum System Gates | — | 199,000 |
| Logic Elements (LEs) | — | 2,880 |
| Total RAM Bits | — | 40,960 |
| Maximum User I/O Pins (this package) | — | 102 |
| Maximum User I/O Pins (family) | — | 254 |
| Core Voltage (VCCINT) | — | 2.5 V |
| Process Technology | — | 0.22 µm CMOS SRAM |
| Configuration Method | — | Serial Passive / JTAG (IEEE 1149.1) |
| Speed Grade | — | -2 (mid) |