EPM3128ATC100-10 vs EPM3128ATC100-10NS Comparação
Comparação detalhada lado a lado de EPM3128ATC100-10 por Altera e EPM3128ATC100-10NS por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Altera
EPM3128ATC100-10 - MAX 3000A 128-Macrocell CPLD, 10ns TQFP-100 | Intel / Altera
EPM3128ATC100-10 NrndComparação de especificações
| Parâmetro | EPM3128ATC100-10 | EPM3128ATC100-10NS |
|---|---|---|
| Marca | Altera | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | NRND | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $8,10 | $6,50 |
| Device Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | — |
| User I/Os | 80 | 80 |
| Usable Gates | 2500 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Counter Frequency | 227.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Voltage Tolerance | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | — |
| Encapsulamento | 100-pin TQFP | TQFP-100 |
| Tipo de montagem | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile) |
| In-System Programming | IEEE Std. 1532 compliant (JTAG) | — |
| PCI Compliance | PCI Local Bus Specification Rev 2.2 (selected speed grades) | — |
| Logic Family | CMOS | — |
| Temperatura de operação | 0 C to 70 C (commercial) | [DATA_NEEDED: operating temperature range] |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Family | — | MAX 3000A |
| Macro Cells | — | 128 |
| Contagem de pinos | — | 100 |
| Pin-to-Pin Logic Delay (tPD) | — | 10 ns |
| Counter Frequency (fCNT) | — | up to 227.3 MHz |
| Supply Voltage - Core (VCCINT) | — | 3.3 V |
| Supply Voltage - I/O (VCCIO) | — | 3.3 V or 2.5 V (5.0 V-tolerant inputs) |
| Logic-Level Compatibility | — | 5.0 V, 3.3 V, 2.5 V |
| Programmability | — | In-system (ISP), IEEE Std. 1532 |
| Boundary Scan | — | IEEE 1149.1 JTAG |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |