EPM3128ATC100-5N vs EPM3128ATC100-10N Comparação
Comparação detalhada lado a lado de EPM3128ATC100-5N por Intel e EPM3128ATC100-10N por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Altera
EPM3128ATC100-10N - 128-Macrocell MAX 3000A CPLD, 10ns, TQFP-100 | Intel
EPM3128ATC100-10N NrndComparação de especificações
| Parâmetro | EPM3128ATC100-5N | EPM3128ATC100-10N |
|---|---|---|
| Marca | Intel | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Ativo | NRND |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $8,20 | $5,20 |
| Device Family | MAX 3000A | — |
| Product Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 8 (16 macrocells each) | — |
| Usable Gates | Up to 10,000 | 2500 |
| User I/Os | 80 | — |
| Propagation Delay (tPD) | 5 ns | 10 ns |
| Maximum Internal Frequency | 192.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 2.5 V | — |
| Programming Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (IEEE Std. 1532) | — |
| JTAG Boundary Scan | Yes (IEEE 1149.1) | — |
| Encapsulamento | TQFP-100 (TC100) | 100-pin TQFP (14 x 14 x 1.0 mm) |
| Temperatura de operação | 0 C to +70 C (commercial) | 0 °C to +70 °C (commercial) |
| Tipo de montagem | Surface Mount | Surface Mount |
| Status RoHS | [DATA_NEEDED: RoHS compliance] | Compliant |
| Family | — | MAX 3000A |
| Macro Cells | — | 128 |
| Number of I/O | — | 80 |
| Logic Elements / Blocks | — | 8 LABs (16 macrocells each) |
| Maximum Internal Frequency (fMAX) | — | 98 MHz |
| Supply Voltage VCCINT | — | 3.3 V |
| I/O Bank Voltage VCCIO | — | 3.3 V or 2.5 V (selectable) |
| Configuration Memory | — | CMOS EEPROM (non-volatile, instant-on) |
| In-System Programming | — | IEEE Std. 1532-compliant ISP via JTAG |
| Lead-Free | — | Yes |
| Nível MSL | — | 3 (per JEDEC J-STD-020) |