EPM3128ATI144-7N vs EPM3128ATC144-7N Comparação
Comparação detalhada lado a lado de EPM3128ATI144-7N por Altera e EPM3128ATC144-7N por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Altera
EPM3128ATI144-7N - 128 Macrocell CPLD, 129.9MHz, 3.3V | Altera MAX 3000A
EPM3128ATI144-7N ⚠ Última compra
Comparação de especificações
| Parâmetro | EPM3128ATI144-7N | EPM3128ATC144-7N |
|---|---|---|
| Marca | Altera | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Última compra | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $9,95 | $9,25 |
| Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Logic Capacity | 2.5K gates | — |
| Macrocells | 128 | — |
| Maximum Frequency (fMAX) | 129.9 MHz | — |
| Pin-to-Pin Propagation Delay | 7.5 ns (speed grade -7) | — |
| User I/O Pins | 96 | — |
| Core Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Supply Voltage (VCCIO) | 3.3 V / 2.5 V / 1.8 V | 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Programmable Logic Technology | CMOS EEPROM | — |
| Programming Interface | JTAG (IEEE Std 1149.1) in-system programmable | — |
| Encapsulamento | 144-pin TQFP | TQFP-144 (20 x 20 mm, 0.5 mm pitch) |
| Terminal Pitch | 0.5 mm | — |
| JEDEC Package Code | S-PQFP-G144 | — |
| Temperatura de operação | -40C to +85C (industrial) | 0 °C to +70 °C (commercial) |
| MultiVolt I/O | Yes (interfaces with 5.0V/3.3V/2.5V/1.8V logic) | — |
| Series | — | MAX 3000A |
| Architecture | — | EEPROM-based, MAX architecture |
| Number of Macrocells | — | 128 |
| Number of Usable Gates | — | Up to 10,000 |
| User I/Os | — | 96 |
| Contagem de pinos | — | 144 |
| Logic Family | — | CMOS |
| Propagation Delay (tPD) | — | 7.5 ns (pin-to-pin, -7 speed grade) |
| Counter Frequency | — | Up to 227.3 MHz |
| In-System Programmability (ISP) | — | Yes, via JTAG (IEEE 1149.1) |
| PCI Compliance | — | Compatible with PCI Local Bus Specification Rev. 2.2 |
| Tipo de montagem | — | Surface Mount (SMD/SMT) |
| Status RoHS | — | Lead-free (-7N suffix indicates Pb-free finish) |