EPM5192ALC84-15 vs EPM5192AJC84-15 Comparação

Comparação detalhada lado a lado de EPM5192ALC84-15 por Altera e EPM5192AJC84-15 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.

Comparação de especificações

Parâmetro EPM5192ALC84-15 EPM5192AJC84-15
Marca Altera Altera
Categoria FPGA & CPLD FPGA & CPLD
Status do ciclo de vida Obsolete Obsolete
Status do estoque In Stock In Stock
Preço unitário (USD) $13,20 $18,95
Device Family MAX 5000 (EPM5192) —
Device Type CPLD / UV-Erasable / OTP Complex PLD EPLD (Erasable Programmable Logic Device)
Macrocells 192 192
Dedicated Inputs 7 —
User I/O Pins 64 —
Propagation Delay (tPD) 15 ns —
Propagation Delay (Industry Variant) 25 ns (per MicrochipUSA listing) —
Supply Voltage (VCC) 4.75 V to 5.25 V (nominal 5 V) 5 V (single supply)
Process Technology CMOS (EPROM-based) CMOS EPROM
Programmability UV-erasable window / OTP —
Encapsulamento 84-pin PLCC (QCCJ, J-bend ceramic) 84-pin PLCC (J84C) windowed ceramic
Operating Temperature Grade Commercial —
Terminal Form J-BEND —
Package Code QCCJ —
Package Shape SQUARE —
Architecture Programmable Logic Array + Macrocell Registers + PIA interconnect —
Family — MAX 5000
Propagation Delay (tpd) — 15 ns
Maximum Clock Frequency (fMAX) — 83.3 MHz
Technology — CMOS, UV-erasable EPROM
Tipo de montagem — Surface Mount
Temperatura de operação — [DATA_NEEDED: commercial/industrial/military grade]
Programming Method — UV-erase + EPROM programming (windowed package)
Logic Blocks — 16 Logic Array Blocks (LABs)
I/O Pins — [DATA_NEEDED: user I/O count]
Status RoHS — Non-compliant (contains Pb, ceramic windowed package)

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