EPM5192JC1 vs EPM5192GC1 Comparação
Comparação detalhada lado a lado de EPM5192JC1 por Intel e EPM5192GC1 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EPM5192JC1 | EPM5192GC1 |
|---|---|---|
| Marca | Intel | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $48,30 | $24,50 |
| Family | MAX 5000 (MAX 5xxx CPLD) | MAX 5000 |
| Manufacturer | Intel (formerly Altera Corporation) | — |
| Macro Cells | 192 | 192 |
| Usable Gates | 3750 | 3,750 |
| Maximum Operating Frequency | 62.5 MHz | 62.5 MHz |
| Supply Voltage (VCC) | 5 V (nominal) | 5 V |
| Process Technology | 0.5 µm CMOS, UV-erasable EPROM | EPROM-based CMOS |
| Propagation Delay (typ) | [DATA_NEEDED: propagation delay in ns] | — |
| I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| Encapsulamento | [DATA_NEEDED: exact package from datasheet] | — |
| Tipo de montagem | [DATA_NEEDED: surface mount or through-hole] | Through-hole (PGA) |
| Temperatura de operação | [DATA_NEEDED: operating temp range] | [DATA_NEEDED: operating temperature range] |
| Programming Interface | JTAG-compatible (Altera MAX 5xxx) | — |
| Logic Blocks (LABs) | 24 (8 macrocells per LAB) | — |
| Status RoHS | unknown | unknown |
| AEC-Q100 | not_applicable | — |
| Lifecycle | Obsolete - last-time-buy stock only at franchised distributors | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Programming Technology | — | UV-Erasable / OTP EPROM |
| Package Type | — | Ceramic PGA (Pin Grid Array) |
| Logic Elements | — | 192 macrocells with AND/OR array |
| Propagation Delay | — | [DATA_NEEDED: tpd specification] |
| Número de pinos | — | [DATA_NEEDED: pin count for GC1 PGA package] |
| Development Tool | — | Altera MAX+PLUS II |