EPM7192EQC160-20 vs EPM7192EGC160-12 Comparação
Comparação detalhada lado a lado de EPM7192EQC160-20 por Intel e EPM7192EGC160-12 por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Intel
EPM7192EQC160-20 - 192-Macrocell MAX 7000 CPLD, 20ns, PQFP-160 | Intel
EPM7192EQC160-20 ObsoleteComparação de especificações
| Parâmetro | EPM7192EQC160-20 | EPM7192EGC160-12 |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | NRND |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $58,26 | $10,85 |
| Series | MAX 7000 | MAX 7000 |
| Programmable Type | EE PLD (EEPROM-based) | — |
| Number of Macrocells | 192 | — |
| Number of Logic Array Blocks | 4 | — |
| Number of User I/O Pins | 124 (per package), 36 (per data source variant description) | — |
| Delay Time (tPD) | 20 ns | — |
| Internal Counter Frequency (fCNT) | 100 MHz typical | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | 4.75 V to 5.25 V (5.0 V nominal) |
| Temperatura de operação | -40C to +85C (industrial) | 0 C to +90 C (Commercial) |
| Encapsulamento / Caixa | 160-BQFP / 160-PQFP (28x28 mm) | — |
| Tipo de montagem | Surface Mount | Through-Hole (Pin Grid Array, socketable) |
| In-System Programmable (ISP) | Yes, 5.0 V ISP via JTAG (IEEE Std. 1149.1) | — |
| Programmable Security Bit | Yes | — |
| Power-Saving Mode | Yes, programmable per macrocell | — |
| Nível MSL | [DATA_NEEDED: MSL rating] | — |
| Status RoHS | [DATA_NEEDED: RoHS status - non-RoHS era part] | [DATA_NEEDED: RoHS status - not stated in provided web data] |
| Device Family | — | MAX 7000E (EPM7192E) |
| Macrocells | — | 192 |
| Logic Array Blocks (LABs) | — | 4 |
| Usable Gates | — | 3.75K |
| User I/O Pins | — | 124 |
| Propagation Delay (tPD) | — | 12 ns |
| Maximum Operating Frequency | — | 76.9 MHz |
| Process Technology | — | CMOS, EEPROM-based |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Encapsulamento | — | 160-BPGA / PGA-160 (39.6 x 39.6 mm) |