LFE5UM-45F-6BG554C vs LFE5UM-85F-6BG554C Comparação

Comparação detalhada lado a lado de LFE5UM-45F-6BG554C por Lattice Semiconductor e LFE5UM-85F-6BG554C por Lattice Semiconductor. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.

Lattice Semiconductor
LFE5UM-45F-6BG554C LFE5UM-45F-6BG554C - ECP5 FPGA 45K LUTs w/ SERDES, 554-CABGA | Lattice

LFE5UM-45F-6BG554C - ECP5 FPGA 45K LUTs w/ SERDES, 554-CABGA | Lattice

LFE5UM-45F-6BG554C ✓ Ativo
Lattice Semiconductor
LFE5UM-85F-6BG554C LFE5UM-85F-6BG554C - ECP5-5G FPGA, 84K LUTs, 12 SERDES | Lattice

LFE5UM-85F-6BG554C - ECP5-5G FPGA, 84K LUTs, 12 SERDES | Lattice

LFE5UM-85F-6BG554C ✓ Ativo

Comparação de especificações

Parâmetro LFE5UM-45F-6BG554C LFE5UM-85F-6BG554C
Marca Lattice Semiconductor Lattice Semiconductor
Categoria FPGA & CPLD FPGA & CPLD
Status do ciclo de vida Ativo Ativo
Status do estoque In Stock In Stock
Preço unitário (USD) $115,10 $13,10
Family LatticeECP5 ECP5-5G (LFE5UM)
Logic Cells 44,000 (nominal, LUT4-equivalent) —
Logic Elements / LUTs Approximately 45,000 LUT4 —
Embedded Block RAM 1,944 Kb 3744 Kbits
Distributed RAM [DATA_NEEDED: distributed RAM Kbits] [DATA_NEEDED: distributed RAM Kbits]
DSP Slices [DATA_NEEDED: DSP slice count] —
User I/O (this package) 245 —
SERDES Channels 4 x multi-protocol SERDES (1.5 / 3.2 / 5 Gbps) 12
Hardened PCIe Gen2 Yes (x1 endpoint) —
PLL Count [DATA_NEEDED: PLL count] —
Process Node 40 nm CMOS 40 nm
Core Voltage 1.1 V 1.1 V
Speed Grade -6 (commercial, lower timing margin than -7/-8) -6
Temperatura de operação Commercial (0C to +85C, C suffix) —
Encapsulamento 554-pin cabga (chip-array BGA), 23 mm x 23 mm 554-ball caBGA (BG554)
Tipo de montagem Surface Mount (BGA) Surface Mount (BGA)
Nível MSL 3 (per partstack data) [DATA_NEEDED: MSL rating]
Peak Reflow Temperature 260 C, 30 s max —
Lead-Free / Termination Finish Yes, Tin-Silver-Copper (e1 per JESD-609) —
Configuration Interface IEEE 1149.1 JTAG, SPI, Dual-boot / Multi-boot —
TransFR Support Yes (transparent field reconfiguration) —
Status RoHS Compliant Compliant
Logic Elements (LUT4) — 84000
DSP Slices (18x18 multipliers) — 156
User I/O — 259
SERDES Data Rate (max) — 5 Gbps
Package Body Size — 23 x 23 mm
Operating Temperature Grade — Commercial (C)
Configuration Memory — SRAM-based (volatile, requires external boot)

Fichas técnicas e recursos

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