SY58052AUMG-TR vs SY58052AUMG Comparação
Comparação detalhada lado a lado de SY58052AUMG-TR por Microchip Technology e SY58052AUMG por Microchip Technology. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Microchip Technology
SY58052AUMG-TR - 10.7Gbps CML Data-Clock Synchronizer | Microchip
SY58052AUMG-TR ✓ AtivoComparação de especificações
| Parâmetro | SY58052AUMG-TR | SY58052AUMG |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoria | Clock & Timing | Clock & Timing |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $4,55 | $3,68 |
| Função | Ultra-precision CML data and clock synchronizer (retimer) | Ultra-precision CML data and clock synchronizer (resynchronizer) |
| Maximum Data Rate | 10.7 Gbps | — |
| Frequência máxima de clock | 10.7 GHz | — |
| Input Type | Differential CML with internal termination (VT pin) | — |
| Tipo de saída | Differential CML | CML |
| Supply Voltage Range | 2.375 V to 3.63 V | 2.375 V to 3.63 V |
| Temperatura de operação | -40C to +85C | -40C to +85C |
| Encapsulamento | 16-VFQFN (3x3 mm) Exposed Pad | 16-VFQFN exposed pad (3x3 mm) |
| Number of Channels | 1 | — |
| Tipo de montagem | Surface Mount | Surface Mount |
| Coupling Support | AC-coupled and DC-coupled interfaces | — |
| Termination | Internal input and output termination | — |
| Applications Category | ATM/SONET/SDH support circuit | — |
| Terminal Form | No lead | — |
| Package Code | HVQCCN (square) | — |
| Temperature Grade | Industrial | — |
| Maximum Data Throughput | — | > 10.7 Gbps |
| Maximum Clock Frequency (fMAX) | — | > 10.7 GHz |
| Any Input to Any Output Delay | — | 160 ps max |
| Input Types | — | CML, PECL, data inputs |
| Product Family | — | Precision Edge(R) |
| Internal Termination | — | Input and output termination integrated |
| Primary Application | — | Backplane retiming / data-to-clock resynchronization |
| Status RoHS | — | [DATA_NEEDED: RoHS Status] |
| Nível MSL | — | [DATA_NEEDED: MSL Level] |