SY58052AUMG-TR vs SY58052AUMG 비교
다음의 상세 나란히 비교: SY58052AUMG-TR 제조: Microchip Technology 및 SY58052AUMG 제조: Microchip Technology. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Microchip Technology
SY58052AUMG-TR - 10.7Gbps CML Data-Clock Synchronizer | Microchip
SY58052AUMG-TR ✓ 활성사양 비교
| 파라미터 | SY58052AUMG-TR | SY58052AUMG |
|---|---|---|
| 브랜드 | Microchip Technology | Microchip Technology |
| 카테고리 | Clock & Timing | Clock & Timing |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $4.55 | $3.68 |
| 기능 | Ultra-precision CML data and clock synchronizer (retimer) | Ultra-precision CML data and clock synchronizer (resynchronizer) |
| Maximum Data Rate | 10.7 Gbps | — |
| 최대 클록 주파수 | 10.7 GHz | — |
| Input Type | Differential CML with internal termination (VT pin) | — |
| 출력 유형 | Differential CML | CML |
| Supply Voltage Range | 2.375 V to 3.63 V | 2.375 V to 3.63 V |
| 동작 온도 | -40C to +85C | -40C to +85C |
| 패키지 | 16-VFQFN (3x3 mm) Exposed Pad | 16-VFQFN exposed pad (3x3 mm) |
| Number of Channels | 1 | — |
| 실장 유형 | Surface Mount | Surface Mount |
| Coupling Support | AC-coupled and DC-coupled interfaces | — |
| Termination | Internal input and output termination | — |
| Applications Category | ATM/SONET/SDH support circuit | — |
| Terminal Form | No lead | — |
| Package Code | HVQCCN (square) | — |
| Temperature Grade | Industrial | — |
| Maximum Data Throughput | — | > 10.7 Gbps |
| Maximum Clock Frequency (fMAX) | — | > 10.7 GHz |
| Any Input to Any Output Delay | — | 160 ps max |
| Input Types | — | CML, PECL, data inputs |
| Product Family | — | Precision Edge(R) |
| Internal Termination | — | Input and output termination integrated |
| Primary Application | — | Backplane retiming / data-to-clock resynchronization |
| RoHS 상태 | — | [DATA_NEEDED: RoHS Status] |
| MSL 레벨 | — | [DATA_NEEDED: MSL Level] |