XA3S50-4PQG208I vs XA3S50-4PQG208Q Comparação

Comparação detalhada lado a lado de XA3S50-4PQG208I por Xilinx e XA3S50-4PQG208Q por AMD. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.

Comparação de especificações

Parâmetro XA3S50-4PQG208I XA3S50-4PQG208Q
Marca Xilinx AMD
Categoria FPGA & CPLD FPGA & CPLD
Status do ciclo de vida Ativo Obsolete
Device Type Spartan-3A automotive field-programmable gate array (FPGA) Field Programmable Gate Array (FPGA)
System Gates 50,000 gates 50,000 gates
Logic Cells 1,728 logic elements 1,728 logic cells
Configurable Logic Blocks 192 CLBs 192 CLBs
Total RAM Bits 73,728 bits —
User I/O 124 I/O —
Maximum Data Rate per I/O 622 Mb/s —
Core Supply Voltage 1.2 V —
I/O Supply Voltage 3.3 V —
FPGA Technology 90 nm —
Encapsulamento 208-pin PQFP plastic quad flat package 208-pin PQFP
Total Package Pins 208 pins —
Speed Grade -4 —
Temperature Grade Industrial, -40°C to +100°C —
Single-Ended I/O Standards 17 standards 17 standards
Differential I/O Standards 7 standards, including LVDS 7 standards
Digital Termination Digitally controlled termination supported —
Automotive Qualification AEC-Q100 automotive-grade designation reported in verified source data AEC-Q100 qualified
FPGA Family — Spartan-3 XA
Maximum Operating Frequency — 125 MHz
User I/O Pins — 124 I/O
On-Chip RAM — 73,728 bits
Tensão de alimentação — 1.2 V
Maximum Data Transfer Rate per I/O — 622 Mb/s
Differential I/O Support — LVDS
On-Chip Termination — Digitally Controlled
Package Pin Pitch — 0.50 mm
Terminal Form — Gull wing
Package Shape — Square
Faixa de temperatura de operação — [DATA_NEEDED: operating temperature range]
Configuration Memory — [DATA_NEEDED: configuration memory type]
Static Power — [DATA_NEEDED: static power]
Dynamic Power — [DATA_NEEDED: dynamic power]

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