74HC165D - 8-Bit Parallel/Serial-In Shift Register | Nexperia SOIC-16
N.º da peça: 74HC165D ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $0.42 | $0,42 |
| 10 | $0.36 | $3,60 |
| 100 | $0.27 | $27,00 |
| 500 | $0.22 | $110,00 |
| 1.000 | $0.18 | $180,00 |
| 2.500 | $0.15 | $375,00 |
74HC165D Visão geral
The 74HC165 belongs to the 74HC logic family of high-speed Si-gate CMOS devices, which are pin-compatible with low-power Schottky TTL (LSTTL) and specified per JEDEC standard no. 7A. As a parallel-in/serial-out (PISO) shift register, it is one of the most common building blocks for I/O expansion: it converts 8 parallel inputs into a single serial data stream, freeing microcontroller GPIOs. It sits in the broader hierarchy of logic ICs -> PISO shift registers -> serial-to-parallel/parallel-to-serial converters -> digital logic.
Key features include an asynchronous 8-bit parallel load (SH/LD), a synchronous serial input (DS), two complementary serial outputs (Q7 and Q7-bar) for flexible daisy-chaining, and standard CMOS output drive capability. The MSI (Medium-Scale Integration) ICC category gives typical quiescent current around 8 uA, and the wide 2-6 V supply range allows drop-in use in both 3.3 V and 5 V logic designs. The device is also available in the 74HCT165 variant for TTL-level input compatibility.
Internally, the 74HC165D uses a master-slave flip-flop architecture implemented in silicon-gate C2MOS technology, achieving propagation delays comparable to LSTTL while consuming CMOS-level quiescent power. The asynchronous parallel load is edge-controlled by SH/LD, decoupled from the shift clock, which simplifies firmware because the host does not have to clock the load bit. The two complementary outputs Q7 and Q7-bar eliminate the need for an external inverter when chaining multiple devices for 16-, 24-, or 32-bit expansion.
Typical applications include expanding microcontroller GPIO for button/keypad matrices, reading multiple switch inputs over SPI-like bit-banging, driving LED chains from a small pin-count MCU, scanning industrial sensors, and building shift-register-based input multiplexers in PLC and HMI systems. The wide supply range and CMOS power profile also make it suitable for battery-powered IoT peripherals.
When designing with the 74HC165D, place a 100 nF decoupling capacitor close to VCC, and remember that the parallel-load inputs D0-D7 are sampled asynchronously when SH/LD goes low. For multi-device daisy chains, tie the Q7-bar output of stage N into the DS input of stage N+1, and clock all SH/LD and CLK lines in parallel to keep the load deterministic.
This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design notes not found in the manufacturer datasheet alone.
Alternativas drop-in para 74HC165D — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com 74HC165D (mesmo formato e footprint) — diferindo em Logic Type, Output Type, Function, Operating Temperature, Package.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
74HC165D,652
✅ Drop-In✓ Em estoque
$0.16 / unidade
Ver ficha técnica →74HC165D-Q100,118
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
74HCT165D,653
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
CD74HC165M
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
SN74HC165N
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
74HC165D Classificações máximas e características elétricas
| Logic Type | Shift Register (Parallel-in / Serial-out, PISO) |
| Number of Elements | 1 |
| Bits per Element | 8 |
| Função | 8-bit parallel-load / serial-in shift register with complementary serial outputs |
| Supply Voltage (Vcc) | 2.0 V to 6.0 V |
| Input Type | Standard CMOS (HC); TTL-compatible variant is 74HCT165 |
| Tipo de saída | Complementary CMOS (Q7, Q7-bar) |
| Logic Family | 74HC / 74HCT (high-speed Si-gate CMOS, LSTTL pin-compatible) |
| Parallel Load | Asynchronous, active-low SH/LD |
| Serial Input | Synchronous DS on rising CLK edge |
| Temperatura de operação | -40 C to +125 C |
| Encapsulamento | 16-pin SOIC (SOT109-1) |
| Tipo de montagem | Surface Mount |
| Nível MSL | 1 (unlimited) |
| Status RoHS | Compliant |
| JEDEC Compliance | JEDEC standard no. 7A |
Configuração de pinos do 74HC165D
| Pino 1 | SH/LD — Shift/Load (active-low asynchronous parallel load) |
| Pino 2 | CLK — Serial shift clock (rising edge clocks DS into Q7) |
| Pino 3 | D4 — Parallel data input D4 |
| Pino 4 | D5 — Parallel data input D5 |
| Pino 5 | D6 — Parallel data input D6 |
| Pino 6 | D7 — Parallel data input D7 |
| Pino 7 | Q7-bar — Complementary serial output (inverted Q7) |
| Pino 8 | GND — Ground reference |
| Pino 9 | Q7 — Serial data output (shifted MSB-first) |
| Pino 10 | DS — Serial data input (for daisy-chaining) |
| Pino 11 | D0 — Parallel data input D0 |
| Pino 12 | D1 — Parallel data input D1 |
| Pino 13 | D2 — Parallel data input D2 |
| Pino 14 | D3 — Parallel data input D3 |
| Pino 15 | CE — Clock Enable (active-low; held low to enable shifting) |
| Pino 16 | VCC — Supply voltage (2.0 V to 6.0 V) |
Aplicações típicas
74HC165D é adequado para 7 aplicaçãos: Microcontroller GPIO Expansion for Button Matrices, Industrial Sensor Multiplexing and PLC Digital Inputs, SPI-Like Bit-Banged Input Scanner for LED Wall Controllers, Keyboard and Matrix-Scanner Front-End, Shift-Register-Based I/O Expansion for IoT Edge Nodes, Test and Measurement Fixture Input Multiplexing, Educational and Prototyping Boards (Arduino Shields).
Microcontroller GPIO Expansion for Button Matrices
The 74HC165D lets an MCU read 8 or more pushbuttons or keypad switches using just three pins (SH/LD, CLK, Q7). Its 2.0-6.0 V supply matches both 3.3 V (Raspberry Pi, ESP32) and 5 V (Arduino) MCUs without level shifting. Because SH/LD is asynchronous, the firmware simply pulls SH/LD low, clocks eight bits, and processes a debounced bitmap - no per-button interrupt lines needed. Two 74HC165Ds daisy-chained via Q7-bar into DS give 16 inputs for compact human-interface panels.
Recomendado
Industrial Sensor Multiplexing and PLC Digital Inputs
In PLC and industrial automation, the 74HC165D aggregates eight 24 V-tolerant sensor signals through external resistor networks into a single serial stream to the controller. The -40 C to +125 C operating range and JEDEC 7A compliance suit factory-floor environments, while the SOIC-16 package is easy to hand-rework on retrofit boards. CMOS quiescent current around 8 uA means negligible heat rise even inside sealed enclosures. For AEC-Q100 needs, swap to the same-footprint 74HC165D-Q100,118 without PCB changes.
Recomendado
SPI-Like Bit-Banged Input Scanner for LED Wall Controllers
Large LED walls and stage-lighting rigs use the 74HC165D to read rotary encoders, limit switches and DIP banks across many channels. The complementary Q7/Q7-bar outputs make daisy-chaining trivial: clock 16-64 bits in a burst and decode the switch positions on the host. Because the part runs at 2-6 V, the same PCB can host 3.3 V MCU and 5 V legacy peripherals without level shifters. The 16-pin SOIC footprint also fits inside 1-inch-wide controller PCBs where a DIP part would not.
Recomendado
Keyboard and Matrix-Scanner Front-End
Mechanical keyboards and matrix keypads use the 74HC165D as a parallel-input scanner that feeds columns or rows back to the controller. Eight inputs per IC and easy daisy-chaining allow 64+ key matrices to be scanned with only three MCU pins. The CMOS input thresholds (0.5x VCC) tolerate 5 V MCU GPIOs and 3.3 V MCUs equally well, simplifying BOM across keyboard product lines. Propagation delay around 12 ns at 6 V supports 10 kHz+ matrix scan rates without missing keystrokes.
Recomendado
Shift-Register-Based I/O Expansion for IoT Edge Nodes
Battery-powered IoT edge nodes (smart home, environmental sensors) use the 74HC165D to read multiple pushbuttons, door sensors and PIR outputs at low cost. Typical quiescent current of 8 uA is negligible compared to a sleeping radio MCU, and the 2 V minimum supply extends operating time on depleted batteries. The SOIC-16 package is small enough to fit alongside ESP32 or nRF52 modules in wearable form factors. During deep sleep, the host can power-gate the 74HC165D entirely because it has no internal bias current.
Recomendado
Test and Measurement Fixture Input Multiplexing
Production test jigs and ATE fixtures use the 74HC165D to aggregate many digital test points onto a single test-header pin, reducing cable count and connector cost. Its standard CMOS output drive comfortably drives 50 cm test cables and logic analyzer inputs. The 2-6 V VCC range lets the fixture share its supply with TTL or CMOS test instruments. Because the part is pin-compatible across Nexperia, TI and ON Semiconductor sources, fixture builds are second-source safe.
Recomendado
Educational and Prototyping Boards (Arduino Shields)
The 74HC165D is a staple on Arduino shields and breadboard-friendly breakout boards because it teaches PISO shift register fundamentals while remaining useful in real designs. Its 5 V tolerance and 2-6 V operation align with the Arduino Uno's 5 V GPIO and the Arduino Due's 3.3 V GPIO. Q7-bar daisy-chaining lets students scale from 8 to 16 to 24 inputs incrementally. The SOIC-16 footprint is also easy to break out to 0.1-inch headers on perfboard for hobby projects.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para 74HC165D — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | 74HC165D,652 | 74HC165D-Q100,118 | 74HCT165D,653 | CD74HC165M | SN74HC165N |
|---|---|---|---|---|---|---|
| Package | 16-pin SOIC (SOT109-1) | 16-pin SOIC - same | 16-pin SOIC - same | 16-pin SOIC - same | 16-pin SOIC - same | 16-pin SOIC - same |
| Brand | Nexperia | Nexperia | Nexperia | Nexperia | Texas Instruments | Texas Instruments |
| Function | 8-bit PISO shift register | 8-bit PISO shift register | 8-bit PISO shift register | 8-bit PISO shift register (TTL inputs) | 8-bit PISO shift register | 8-bit PISO shift register |
| Supply Voltage (Vcc) | 2.0 V to 6.0 V | 2.0 V to 6.0 V | 2.0 V to 6.0 V | 4.5 V to 5.5 V (TTL) | 2.0 V to 6.0 V | 2.0 V to 6.0 V |
| Input Logic Family | CMOS (74HC) | CMOS (74HC) | CMOS (74HC) | TTL (74HCT) | CMOS (74HC) | CMOS (74HC) |
| Automotive Grade (AEC-Q100) | No | No | Yes | No | No | No |
| Operating Temperature | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C | -55 C to +125 C | -40 C to +85 C |
| Quiescent Current (typ) | 8 uA | 8 uA | 8 uA | 8 uA | 8 uA | 8 uA |
Principais diferenciais
- Asynchronous parallel load decoupled from shift clock (vs 74HC164 (serial-in only))
- Complementary Q7/Q7-bar outputs eliminate daisy-chain glue logic (vs 74HC595 (serial-in/parallel-out))
- Wide 2.0-6.0 V supply supports 3.3 V and 5 V designs from one BOM line (vs CD74HCT165 (TI 5 V TTL))
- AEC-Q100 qualified automotive variant in same footprint (vs CD74HC165M (TI non-automotive))
Notas de projeto
Place a 100 nF (0.1 uF) ceramic decoupling capacitor as close as physically possible between VCC (pin 16) and GND (pin 8) on the 74HC165D. The high-speed CMOS edges (rise/fall times of a few ns) inject transient current into VCC; without local decoupling the part may inject logic-level noise into adjacent analog or RF circuitry. If multiple 74HC165D devices are on the board, give each its own 100 nF cap rather than sharing a single bulk cap.
Hold the CE (Clock Enable, pin 15) low for normal shift operation; pulling CE high freezes the shift clock without resetting the register. During multi-device daisy chains, keep SH/LD and CLK traces matched in length (within 25 mm) to keep the load-to-shift handoff deterministic. If the host MCU drives CLK from a weak push-pull pin, add a 10 kohm pull-down on CLK to avoid spurious shifts during MCU reset.
Do not leave D0-D7 floating - floating parallel inputs may capture garbage bits when SH/LD goes low. Either tie unused D0-D7 lines to GND through 10 kohm pull-downs or pull them to defined logic levels before asserting SH/LD. Estimated: with 100 kohm of source impedance on D0-D7, a 10 pF input pin charges in roughly 1 us - faster than the SH/LD pulse width, but still validate with a scope on your actual PCB.
Route the Q7/Q7-bar traces away from switching power or motor driver lines; the 74HC165D has no internal Schmitt triggers on its serial outputs and can be susceptible to crosstalk above 10 MHz shift clocks. For shift clocks above 25 MHz, use a 4-layer PCB with a continuous ground plane under the SOIC-16 footprint. The exposed-pad variant is not offered for this part; standard SOIC-16 ground is via pin 8 only.
Informações de conformidade
RoHS and lead-free per Nexperia product page. 74HC165D itself is not AEC-Q100 - choose 74HC165D-Q100,118 for automotive.
