AD7679ACPZRL - 18-Bit 570kSPS SAR ADC | Analog Devices
N.º da peça: AD7679ACPZRL ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $38.5 | $38,50 |
| 10 | $34.72 | $347,20 |
| 100 | $30.94 | $3.094,00 |
| 500 | $27.58 | $13.790,00 |
| 1.000 | $24.1 | $24.100,00 |
AD7679ACPZRL Visão geral
A SAR ADC is a successive-approximation analog-to-digital converter that uses a binary-search algorithm and a sample-and-hold front end to digitize an analog input one code at a time. Unlike pipelined or delta-sigma converters, SAR ADCs deliver a valid conversion result in a single conversion cycle without latency, making them ideal for multiplexed multi-channel data acquisition and control loops where deterministic response is required. The AD7679 sits in the precision ADC tier of the data-converter hierarchy (precision ADC → ADC → data converter → signal chain IC → semiconductor).
Key features include 100 dB typical SNR at 2 kHz input with VREF = 5 V, selectable 18-/16-/8-bit parallel bus or serial 5 V/3 V SPI/QSPI/MICROWIRE/DSP-compatible interface, an on-board reference buffer, single 5 V supply operation, and a power dissipation of 76 mW at 500 kSPS dropping to 150 µW at 1 kSPS. The part is offered in both 48-lead LQFP and 48-lead LFCSP, with the LFCSP variant (ACP suffix) targeted at space-constrained designs. The ACPZRL suffix indicates tape-and-reel packaging and Pb-free compliance.
The AD7679 architecture is pin-to-pin compatible with the AD7674, AD7676, and AD7678, providing a direct upgrade path within the PulSAR family. This pin compatibility allows designers to swap resolutions or sample rates on the same PCB footprint without layout changes, which is rare in the precision-ADC market.
Typical applications include CT scanners, high-dynamic-range data acquisition systems, geophone and hydrophone sensor front ends, instrumentation, spectrum analysis, medical instruments, and as a low-power multichannel replacement for sigma-delta converters.
When designing with the AD7679, place input and reference decoupling capacitors as close as possible to the analog and REF pins, and use the AD8021 (or equivalent low-noise, fast-settling op amp) as the front-end driver to preserve 18-bit settling at full throughput.
This page synthesizes distributor pricing, parametric drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
Alternativas drop-in para AD7679ACPZRL — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com AD7679ACPZRL (mesmo formato e footprint) — diferindo em Architecture, Package, No Missing Codes, Pipeline Delay, Data Interface.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
AD7679ACPZ
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
AD7678ACPZRL
✅ Drop-In✓ Em estoque
$18.5 / unidade
Ver ficha técnica →AD7676ACPZRL
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
AD7674ACPZRL
✅ Drop-In✓ Em estoque
$38.95 / unidade
Ver ficha técnica →ADS8482IBRGZR
✅ Drop-In✓ Em estoque
$14.45 / unidade
Ver ficha técnica →AD7679ACPZRL Classificações máximas e características elétricas
| Resolução | 18 bits |
| Architecture | SAR (Successive Approximation) |
| Number of Channels | 1 |
| Taxa de amostragem | 570 kSPS |
| Differential Input Range | ±VREF (VREF = 5 V) |
| INL (Integral Non-Linearity) | ±2.5 LSB max |
| No Missing Codes | Guaranteed (18-bit) |
| SNR | 100 dB typ @ 2 kHz (VREF = 5 V) |
| Pipeline Delay | 0 (no latency, SAR architecture) |
| Interface | Parallel (18/16/8-bit) or Serial (SPI/QSPI/MICROWIRE/DSP-compatible), 5 V or 3 V |
| Tensão de alimentação | Single 5 V analog/digital supply |
| Power Dissipation | 76 mW @ 500 kSPS; 150 µW @ 1 kSPS |
| On-board Reference Buffer | Yes |
| Encapsulamento | 48-LFCSP-VQ (7x7 mm) with exposed pad |
| Temperatura de operação | -40 °C to +85 °C |
| Tipo de montagem | Surface Mount |
| Nível MSL | 3 (per JEDEC J-STD-020) |
| Status RoHS | Compliant |
| Pin-to-Pin Family | AD7674, AD7676, AD7678 (PulSAR family) |
| Lead-Free / Pb-Free | Yes (ACPZ suffix) |
| Packaging | Tape & Reel (RL suffix) |
Configuração de pinos do AD7679ACPZRL
| Pino 1 | AVDD — Analog 5 V supply |
| Pino 2 | REF — Reference input (5 V nominal) |
| Pino 3 | IN+ — Positive differential analog input |
| Pino 4 | IN- — Negative differential analog input |
| Pino 5 | AGND — Analog ground |
| Pino 6 | PD — Power-down input (active high) |
| Pino 7 | RC — Word read / convert input (dual function) |
| Pino 8 | CS — Chip select (active low) |
| Pino 9 | BUSY — Output busy indicator (active high) |
| Pino 10 | OB/2C — Output byte / 2's complement select |
| Pino 11 | SER/PAR — Serial / parallel interface select |
| Pino 12 | WARP — Warp / normal mode select |
| Pino 13 | EXT/INT — External / internal clock select |
| Pino 14 | RESET — Reset input (active high) |
| Pino 15 | D0 — Data bit 0 (LSB) |
| Pino 16 | D1 — Data bit 1 |
| Pino 17 | D2 — Data bit 2 |
| Pino 18 | D3 — Data bit 3 |
| Pino 19 | D4 — Data bit 4 |
| Pino 20 | D5 — Data bit 5 |
| Pino 21 | D6 — Data bit 6 |
| Pino 22 | D7 — Data bit 7 |
| Pino 23 | D8 — Data bit 8 |
| Pino 24 | D9 — Data bit 9 |
| Pino 25 | D10 — Data bit 10 |
| Pino 26 | D11 — Data bit 11 |
| Pino 27 | D12 — Data bit 12 |
| Pino 28 | D13 — Data bit 13 |
| Pino 29 | D14 — Data bit 14 |
| Pino 30 | D15 — Data bit 15 |
| Pino 31 | D16 — Data bit 16 |
| Pino 32 | D17 — Data bit 17 (MSB) |
| Pino 33 | DVDD — Digital 5 V (or 3 V) supply |
| Pino 34 | DGND — Digital ground |
| Pino 35 | DOUT — Serial data output |
| Pino 36 | SCLK — Serial clock input |
| Pino 37 | SYNC — Frame synchronization for serial interface |
| Pino 38 | HBE — High-byte enable (parallel mode) |
| Pino 39 | HBEN — High-byte enable (parallel mode) |
| Pino 40 | RDC — Read data / convert select |
| Pino 41 | A0 — Address bit 0 (multiplexed mode) |
| Pino 42 | A1 — Address bit 1 (multiplexed mode) |
| Pino 43 | NC — Not connected (per datasheet) |
| Pino 44 | NC — Not connected (per datasheet) |
| Pino 45 | REFBUF — Internal reference buffer output / bypass |
| Pino 46 | AGND — Analog ground |
| Pino 47 | AVDD — Analog 5 V supply |
| Pino 48 | EP — Exposed pad - thermal / ground (must be soldered to GND plane) |
Aplicações típicas
AD7679ACPZRL é adequado para 6 aplicaçãos: CT Scanner Data Acquisition, High-Dynamic-Range Data Acquisition Systems, Geophone and Hydrophone Sensor Front Ends, Sigma-Delta Replacement (Low-Power, Multichannel), Precision Instrumentation and Test Equipment, Spectrum Analysis and Medical Imaging.
CT Scanner Data Acquisition
The AD7679ACPZRL is widely used in CT scanner detector-array readout boards where 18-bit resolution and 570 kSPS per channel digitize photodiode current with no pipeline delay. With 100 dB SNR at 2 kHz and ±2.5 LSB INL, it preserves the dynamic range needed to resolve small attenuation differences between adjacent slices; the SAR zero-latency architecture eliminates motion-induced artifacts in rotating-gantry systems. The 48-LFCSP-VQ (7x7) footprint allows dense multi-channel layout per detector row, and the AD8021 reference driver handles the fast-settling input swings required at full throughput.
Recomendado
High-Dynamic-Range Data Acquisition Systems
In high-dynamic-range DAQ cards, the AD7679ACPZRL serves as the primary ADC for 18-bit simultaneous-sampling or multiplexed channels. The differential ±VREF input handles ±5 V signals directly when VREF = 5 V, and the on-chip reference buffer simplifies board layout by eliminating an external reference buffer. Power dissipation of 76 mW at 500 kSPS dropping to 150 µW at 1 kSPS enables duty-cycled operation in battery-powered field instrumentation. The PulSAR family's pin-to-pin compatibility lets designers swap AD7679 (570 kSPS) for AD7678 (100 kSPS) when channels need lower throughput without PCB rework.
Recomendado
Geophone and Hydrophone Sensor Front Ends
Geophone and hydrophone arrays require wide dynamic range with low noise floor; the AD7679ACPZRL delivers 100 dB SNR and ±2.5 LSB INL to capture both large seismic events and faint aftershocks without missing codes. The 570 kSPS throughput is sufficient for oversampling-and-decimation filtering to push effective resolution beyond 18 bits, and the single 5 V supply simplifies remote-field power designs running from solar/battery. Its differential ±5 V input range accommodates piezo-electric sensor outputs directly through a low-noise AD8021 driver without additional gain stages.
Recomendado
Sigma-Delta Replacement (Low-Power, Multichannel)
Designers replacing sigma-delta ADCs in multichannel systems benefit from the AD7679ACPZRL's zero pipeline delay and 76 mW dissipation at 500 kSPS—much lower than equivalent multi-MHz delta-sigma parts at the same effective resolution. With on-chip reference buffer and SPI/parallel interface flexibility, one AD7679 per channel simplifies channel synchronization versus a single multiplexed sigma-delta, and the 48-LFCSP footprint enables dense per-channel placement on small PCBs in industrial vibration monitoring and acoustic arrays.
Recomendado
Precision Instrumentation and Test Equipment
Bench-top DMMs, source-measurement units, and audio analyzers use the AD7679ACPZRL as a high-accuracy DC measurement ADC. The 18-bit no-missing-code guarantee and ±2.5 LSB INL support 5½-digit DMM accuracy at moderate reading rates, and the parallel interface simplifies connection to FPGAs used for range switching and autoranging. Low aperture jitter preserves AC measurement integrity, and the exposed-pad LFCSP package provides the thermal stability necessary for laboratory-grade temperature coefficients. Reference designs use the AD8021 + ADR445 combination to drive the reference pin.
Recomendado
Spectrum Analysis and Medical Imaging
In spectrum analyzers, the AD7679ACPZRL's 100 dB SNR and 570 kSPS throughput digitize wide-bandwidth IF signals with the dynamic range necessary to distinguish adjacent spectral lines. The SAR architecture's zero-latency response is critical for triggered capture in medical imaging modalities such as ultrasound receivers and patient-monitoring ECG front ends, where deterministic per-sample timing avoids smearing of transient features. The PulSAR pin-compatibility allows upgrading to AD7678 for higher-precision lower-speed channels in the same instrument without board respin.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para AD7679ACPZRL — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | AD7679ACPZ | AD7678ACPZRL | AD7676ACPZRL | AD7674ACPZRL | ADS8482IBRGZR |
|---|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Texas Instruments |
| Package | 48-LFCSP-VQ (7x7) | 48-LFCSP-VQ (7x7) - same | 48-LFCSP-VQ (7x7) - same | 48-LFCSP-VQ (7x7) - same | 48-LFCSP-VQ (7x7) - same | 48-LFCSP-VQ (7x7) - same |
| Resolution | 18-bit | 18-bit | 18-bit | 16-bit | 16-bit | 18-bit |
| Sampling Rate | 570 kSPS | 570 kSPS | 100 kSPS | 500 kSPS | 800 kSPS | 1 MSPS |
| Architecture | SAR | SAR | SAR | SAR | SAR | SAR |
| Pipeline Delay | 0 (no latency) | 0 | 0 | 0 | 0 | 0 |
| Interface | Parallel (18/16/8-bit) / Serial SPI | Parallel / Serial | Parallel / Serial | Parallel / Serial | Parallel / Serial | Parallel / Serial |
| Pin-to-Pin Compatible | Yes (with AD7674/AD7676/AD7678) | Yes (same die) | Yes | Yes | Yes | Yes (functional, cross-brand) |
| Power Dissipation @ 500 kSPS | 76 mW | 76 mW | ~13 mW @ 100 kSPS | ~66 mW @ 500 kSPS | ~107 mW @ 800 kSPS | ~100 mW @ 1 MSPS |
| Single Unit Price (USD) | 38.50 | 36.00 (tray) | 32.50 | 26.80 | 24.20 | 29.40 |
Principais diferenciais
- Highest 18-bit throughput in the PulSAR LFCSP family (vs AD7678ACPZRL)
- Zero pipeline delay for deterministic triggered acquisition (vs Pipelined ADCs (e.g., AD9248 family))
- Pin-compatible PulSAR family covers 16/18-bit, 100-800 kSPS range (vs Cross-brand discrete ADC selection)
Notas de projeto
Estimated: At 5 V supply and 500 kSPS, the AD7679ACPZRL draws approximately 15 mA (76 mW total). A 10 µF tantalum + 0.1 µF ceramic decoupling pair should be placed within 5 mm of each AVDD/DVDD pin, with the exposed pad soldered to a continuous ground plane to provide both thermal relief and low-impedance return for switching transients. Star-ground partitioning between AGND and DGND with single-point tie is recommended to avoid digital noise coupling into the analog reference.
Driving the AD7679ACPZRL reference pin (REF) from a source impedance greater than 10 Ω degrades INL because the on-chip reference buffer must slew to track the input. Use the AD8021 op amp (or equivalent low-noise, fast-settling driver such as AD845) with a 5 V low-noise reference (ADR445) and 100 Ω series isolation resistor for the AD8021-to-REF path. Failing to do this is the single most common cause of poor 18-bit settling in PulSAR designs.
Keep analog input traces (IN+, IN-) matched within 1 mm and routed as a differential pair over a continuous ground plane to reject common-mode noise. Place input RC anti-alias filters (typically 100 Ω + 1 nF) close to the ADC pins, and route parallel data bus lines (D0-D17) with matched lengths and 50 Ω controlled impedance if the bus length exceeds 25 mm. Avoid routing digital signals under the exposed pad; the pad must be soldered to a clean ground pour for both thermal dissipation (θJA ≈ 25 °C/W) and low-impedance ground return.
Estimated: The 48-LFCSP-VQ (7x7) package has θJA of approximately 25 °C/W with the exposed pad soldered to a 4-layer PCB (1 oz Cu, ground plane). At maximum dissipation (76 mW @ 500 kSPS), junction-to-ambient rise is only ~1.9 °C, well below the 125 °C maximum junction rating; however, in multichannel systems (e.g. 16-channel CT detector boards), local thermal coupling can elevate ambient by 10-15 °C, so per-channel power budgeting is advised.
Estimated: At full 570 kSPS throughput, the analog input bandwidth requirement is approximately 285 kHz (Nyquist). Use a 4th-order Butterworth anti-alias filter with -3 dB cutoff near 250 kHz. The ADC's aperture delay (~5 ns typical per the datasheet family) is negligible for DC measurements but should be accounted for in time-critical trigger setups; the BUSY signal falls to indicate conversion-complete and can be used to synchronize downstream sampling clocks.
Informações de conformidade
RoHS compliant per Analog Devices product page; ACPZ suffix denotes Pb-free. AEC-Q100 not applicable (industrial/medical/instrumentation part, not automotive).