AT90CAN128-16MU - 16MHz 8-bit AVR MCU with CAN 128KB Flash | Microchip
N.º da peça: AT90CAN128-16MU ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $11.62 | $11,62 |
| 10 | $10.46 | $104,60 |
| 100 | $9.29 | $929,00 |
| 500 | $8.36 | $4.180,00 |
| 1.000 | $7.43 | $7.430,00 |
AT90CAN128-16MU Visão geral
A microcontroller (MCU) is a single-chip computer that integrates a CPU core, non-volatile program memory (Flash), working RAM, and a rich set of peripherals (timers, communication controllers, ADC, GPIO). The AT90CAN128 belongs to the AVR 8-bit RISC family, where RISC (Reduced Instruction Set Computer) emphasizes one-cycle execution to deliver high throughput per MHz. In a system hierarchy, this part sits at the edge node: it acquires sensor signals, runs control firmware, and bridges to higher-level networks (here, a CAN bus) for distributed real-time communication.
Key features include four flexible Timer/Counters with compare and PWM modes, two USARTs, a byte-oriented Two-Wire Serial Interface (TWI/I²C-compatible), an 8-channel 10-bit ADC, a JTAG debug interface, and a Real-Time Counter with separate oscillator. The on-chip CAN controller supports both standard (11-bit) and extended (29-bit) identifiers, making the device ideal for in-vehicle networking and industrial fieldbus nodes. The 53 GPIO pins are organized into seven ports (PA–PG), and most pins offer programmable internal pull-ups.
Typical applications include automotive body and chassis ECUs, industrial CAN-based sensor networks, building automation gateways, and any embedded design requiring deterministic on-board communication plus generous Flash headroom for protocol stacks such as CANopen or DeviceNet. Its 128 KB of Flash also accommodates bootloader-based field upgrades.
A practical design consideration is the 4.5 V to 5.5 V supply window: the part is not natively 3.3 V-tolerant, so level shifting is required when interfacing with 3.3 V peripherals. Designers should also follow the datasheet reference decoupling scheme (100 nF per VCC pin plus bulk capacitance) and respect the exposed-pad thermal pad connection on the QFN to minimize junction temperature.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet, giving you a one-stop engineering reference for the AT90CAN128-16MU.
Alternativas drop-in para AT90CAN128-16MU — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com AT90CAN128-16MU (mesmo formato e footprint) — diferindo em Package, Timers/Counters, ADC, Core Architecture.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
AT90CAN128-16AU
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
AT90CAN128-15MT1
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
AT90CAN128-15MZ
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
AT90CAN128-16MUR
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
ATMEGA1281-16MUR
✅ Drop-In✓ Em estoque
$8.78 / unidade
Ver ficha técnica →AT90CAN64-16MU
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
AT90CAN128-16MU Classificações máximas e características elétricas
| Core Architecture | AVR 8-bit RISC |
| Program Memory (Flash) | 128 KB (128K x 8) |
| EEPROM | 4 KB |
| SRAM | 4 KB |
| Maximum CPU Frequency | 16 MHz |
| Supply Voltage (VCC) | 4.5 V to 5.5 V |
| General Purpose I/O Lines | 53 |
| General Purpose Working Registers | 32 |
| Instruction Set | 133 instructions, mostly single-cycle |
| CAN Controller | CAN 2.0A / 2.0B compliant |
| UART / USART | 2x USART |
| Two-Wire Serial Interface (TWI/I²C) | Yes |
| SPI | Yes |
| ADC | 8-channel, 10-bit |
| Timers/Counters | 4 with PWM and compare modes |
| Real-Time Counter | Yes, with separate oscillator |
| JTAG Debug Interface | Yes |
| Encapsulamento | 64-pin QFN (9 mm x 9 mm) |
| Tipo de montagem | Surface Mount |
| Status RoHS | Compliant |
Configuração de pinos do AT90CAN128-16MU
| Pino 1 | PG5 (OC1B) — Port G bit 5 / Timer1 Output Compare B |
| Pino 2 | PE0 (RXD0/PDI) — Port E bit 0 / USART0 RXD / Programming Data In |
| Pino 3 | PE1 (TXD0/PDO) — Port E bit 1 / USART0 TXD / Programming Data Out |
| Pino 4 | PE2 (XCK0/AIN0) — Port E bit 2 / USART0 XCK / Analog Comparator Positive Input |
| Pino 5 | PE3 (OC3A/AIN1) — Port E bit 3 / Timer3 Output Compare A / Analog Comparator Negative Input |
| Pino 6 | PE4 (OC3B/INT4) — Port E bit 4 / Timer3 Output Compare B / External Interrupt 4 |
| Pino 7 | PE5 (OC3C/INT5) — Port E bit 5 / Timer3 Output Compare C / External Interrupt 5 |
| Pino 8 | PE6 (T3/INT6) — Port E bit 6 / Timer3 Clock Input / External Interrupt 6 |
| Pino 9 | PE7 (ICP3/INT7) — Port E bit 7 / Timer3 Input Capture / External Interrupt 7 |
| Pino 10 | VCC — Digital supply voltage (4.5 V to 5.5 V) |
| Pino 11 | GND — Ground |
| Pino 12 | PF0 (ADC0) — Port F bit 0 / ADC Input Channel 0 |
| Pino 13 | PF1 (ADC1) — Port F bit 1 / ADC Input Channel 1 |
| Pino 14 | PF2 (ADC2) — Port F bit 2 / ADC Input Channel 2 |
| Pino 15 | PF3 (ADC3) — Port F bit 3 / ADC Input Channel 3 |
| Pino 16 | PF4 (ADC4/TCK) — Port F bit 4 / ADC Input Channel 4 / JTAG Test Clock |
| Pino 17 | PF5 (ADC5/TMS) — Port F bit 5 / ADC Input Channel 5 / JTAG Test Mode Select |
| Pino 18 | PF6 (ADC6/TDO) — Port F bit 6 / ADC Input Channel 6 / JTAG Test Data Out |
| Pino 19 | PF7 (ADC7/TDI) — Port F bit 7 / ADC Input Channel 7 / JTAG Test Data In |
| Pino 20 | AREF — ADC analog reference voltage |
| Pino 21 | GND — Ground |
| Pino 22 | AVCC — Analog supply voltage (must match VCC) |
| Pino 23 | PA0 (ADC8) — Port A bit 0 / ADC Input Channel 8 |
| Pino 24 | PA1 (ADC9) — Port A bit 1 / ADC Input Channel 9 |
| Pino 25 | PA2 (ADC10) — Port A bit 2 / ADC Input Channel 10 |
| Pino 26 | PA3 (ADC11) — Port A bit 3 / ADC Input Channel 11 |
| Pino 27 | PA4 (ADC12) — Port A bit 4 / ADC Input Channel 12 |
| Pino 28 | PA5 (ADC13) — Port A bit 5 / ADC Input Channel 13 |
| Pino 29 | PA6 (ADC14) — Port A bit 6 / ADC Input Channel 14 |
| Pino 30 | PA7 (ADC15) — Port A bit 7 / ADC Input Channel 15 |
| Pino 31 | PG2 (DAC1) — Port G bit 2 / DAC Output 1 |
| Pino 32 | PG3 (DAC2) — Port G bit 3 / DAC Output 2 |
| Pino 33 | PG4 (OC1A) — Port G bit 4 / Timer1 Output Compare A |
| Pino 34 | PC0 (A8) — Port C bit 0 / External Memory Address Bit 8 |
| Pino 35 | PC1 (A9) — Port C bit 1 / External Memory Address Bit 9 |
| Pino 36 | PC2 (A10) — Port C bit 2 / External Memory Address Bit 10 |
| Pino 37 | PC3 (A11) — Port C bit 3 / External Memory Address Bit 11 |
| Pino 38 | PC4 (A12) — Port C bit 4 / External Memory Address Bit 12 |
| Pino 39 | PC5 (A13) — Port C bit 5 / External Memory Address Bit 13 |
| Pino 40 | PC6 (A14) — Port C bit 6 / External Memory Address Bit 14 |
| Pino 41 | PC7 (A15) — Port C bit 7 / External Memory Address Bit 15 |
| Pino 42 | VCC — Digital supply voltage |
| Pino 43 | GND — Ground |
| Pino 44 | PG0 (WR) — Port G bit 0 / External Memory Write Strobe |
| Pino 45 | PG1 (RD) — Port G bit 1 / External Memory Read Strobe |
| Pino 46 | PB0 (SS) — Port B bit 0 / SPI Slave Select |
| Pino 47 | PB1 (SCK) — Port B bit 1 / SPI Serial Clock |
| Pino 48 | PB2 (MOSI) — Port B bit 2 / SPI Master Out Slave In |
| Pino 49 | PB3 (MISO) — Port B bit 3 / SPI Master In Slave Out |
| Pino 50 | PB4 (OC2A) — Port B bit 4 / Timer2 Output Compare A |
| Pino 51 | PB5 (OC1A) — Port B bit 5 / Timer1 Output Compare A |
| Pino 52 | PB6 (OC1B) — Port B bit 6 / Timer1 Output Compare B |
| Pino 53 | PB7 (OC0A/OC1C) — Port B bit 7 / Timer0 Output Compare A / Timer1 Output Compare C |
| Pino 54 | PD0 (RXD1/INT0) — Port D bit 0 / USART1 RXD / External Interrupt 0 |
| Pino 55 | PD1 (TXD1/INT1) — Port D bit 1 / USART1 TXD / External Interrupt 1 |
| Pino 56 | PD2 (INT2/RXCAN) — Port D bit 2 / External Interrupt 2 / CAN RX |
| Pino 57 | PD3 (INT3/TXCAN) — Port D bit 3 / External Interrupt 3 / CAN TX |
| Pino 58 | PD4 (ICP1) — Port D bit 4 / Timer1 Input Capture |
| Pino 59 | PD5 (XCK1) — Port D bit 5 / USART1 XCK |
| Pino 60 | PD6 (T1) — Port D bit 6 / Timer1 Clock Input |
| Pino 61 | PD7 (T0) — Port D bit 7 / Timer0 Clock Input |
| Pino 62 | RESET — Reset input (active low) |
| Pino 63 | VCC — Digital supply voltage |
| Pino 64 | GND — Ground |
Aplicações típicas
AT90CAN128-16MU é adequado para 7 aplicaçãos: Automotive CAN Body Control Module, Industrial CANopen Sensor Node, Building Automation Gateway, Electric Vehicle Battery Management Slave, CAN-Based Motor Control Drive, Medical Diagnostic Instrument Controller, Agricultural Machinery Telematics Module.
Automotive CAN Body Control Module
The AT90CAN128-16MU's on-chip CAN 2.0A/2.0B controller makes it ideal for automotive body and chassis ECUs that arbitrate messages on a 500 kbit/s CAN bus alongside BCMs, gateway modules, and instrument clusters. With 128 KB Flash the part fits full J1939 or CANopen stacks plus a bootloader for OEM firmware updates, while 53 GPIO pins drive window lifters, lighting FETs, and door-lock relays without an external I/O expander. The 16 MHz AVR core delivers deterministic interrupt latency that meets automotive in-cabin timing budgets.
Recomendado
Industrial CANopen Sensor Node
Industrial CANopen slave nodes benefit from the AT90CAN128-16MU's 128 KB Flash, which holds the full CANopen stack (including DS-301 and DS-401 profiles) plus application code. The 8-channel 10-bit ADC reads process variables such as pressure or flow, the four timers generate PWM for actuator control, and the TWI bus connects to digital sensors. Hardware CAN offloads message arbitration from the CPU, leaving headroom for 1 ms PDO scheduling in deterministic factory networks.
Recomendado
Building Automation Gateway
Building-automation gateways bridge BACnet, KNX, and CAN subnets, and the AT90CAN128-16MU's dual USART plus TWI/SPI provides three serial buses for simultaneous BACnet MS/TP, Modbus, and KNX sub-network traffic. The 4 KB EEPROM stores commissioning parameters and node IDs across power cycles. With 53 GPIO the gateway can supervise HVAC dampers and lighting contactors, while JTAG debug simplifies field firmware updates during commissioning.
Recomendado
Electric Vehicle Battery Management Slave
Distributed battery-management slaves can use the AT90CAN128-16MU to monitor cell voltages and temperatures and report over a CAN daisy-chain to the master BMS. The 8-channel ADC samples up to eight cells per slave, the 10-bit resolution suits 12 V lead-acid or mid-sized LiFePO4 packs, and the CAN peripheral publishes telemetry at the 250 kbit/s BMS rate. The 4 KB SRAM buffers transient messages, and the 4 KB EEPROM stores calibration data for each cell channel.
Recomendado
CAN-Based Motor Control Drive
Compact CAN-driven motor drives for pumps, fans, and small servos can use the AT90CAN128-16MU to receive torque/speed setpoints over CAN and generate the corresponding PWM. Four timers provide complementary PWM outputs with dead-band insertion suited to 3-phase inverter control, and the 16 MIPS performance closes a 10 kHz current loop. Hardware CAN frees the CPU from bit-banging, and JTAG aids in tuning field-oriented-control parameters in production.
Recomendado
Medical Diagnostic Instrument Controller
Medical diagnostic carts and analyzers benefit from the AT90CAN128-16MU's deterministic CAN bus for inter-board communication between the analyzer cartridge, the display board, and the main CPU. The 128 KB Flash fits a USB-CDC bootloader plus the on-board protocol stack, while the TWI bus interfaces to a touch controller and EEPROM-stored calibration. JTAG supports in-house firmware qualification, and the 64-pin QFN package fits within the compact form factor of a handheld analyzer.
Recomendado
Agricultural Machinery Telematics Module
Tractors, harvesters, and irrigation systems often run ISOBUS (ISO 11783) over CAN, and the AT90CAN128-16MU's 128 KB Flash is large enough to host the ISOBUS stack plus implement-and-virtual-terminal code. The on-chip CAN controller supports the 11-bit and 29-bit identifier mix used by ISOBUS, and the dual USART interfaces to GPS and cellular telemetry modules. The 53 GPIO lines connect to implement presence sensors and hitch actuators directly, simplifying BOM and reducing cost.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para AT90CAN128-16MU — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | AT90CAN128-16AU | AT90CAN128-15MT1 | AT90CAN128-15MZ | AT90CAN128-16MUR | ATMEGA1281-16MU | AT90CAN64-16MU |
|---|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 64-pin QFN (9x9 mm) | 64-pin TQFP | 64-pin QFN | 64-pin QFN | 64-pin QFN | 64-pin QFN | 64-pin QFN |
| Maximum CPU Frequency | 16 MHz | 16 MHz | 15 MHz | 15 MHz | 16 MHz | 16 MHz | 16 MHz |
| Flash Memory | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 64 KB |
| EEPROM | 4 KB | 4 KB | 4 KB | 4 KB | 4 KB | 4 KB | 2 KB |
| SRAM | 4 KB | 4 KB | 4 KB | 4 KB | 4 KB | 8 KB | 2 KB |
| CAN Controller | Yes (CAN 2.0A/2.0B) | Yes (CAN 2.0A/2.0B) | Yes (CAN 2.0A/2.0B) | Yes (CAN 2.0A/2.0B) | Yes (CAN 2.0A/2.0B) | No | Yes (CAN 2.0A/2.0B) |
| GPIO Lines | 53 | 53 | 53 | 53 | 53 | 53 | 53 |
| Supply Voltage | 4.5 V to 5.5 V | 4.5 V to 5.5 V | 4.5 V to 5.5 V | 4.5 V to 5.5 V | 4.5 V to 5.5 V | 4.5 V to 5.5 V | 4.5 V to 5.5 V |
| RoHS Status | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Principais diferenciais
- Integrated CAN 2.0A/2.0B controller on-chip (vs ATMEGA1281-16MU)
- Higher Flash density than AT90CAN64 (vs AT90CAN64-16MU)
- Compact 9x9 mm QFN with exposed thermal pad (vs AT90CAN128-16AU (TQFP-64))
Notas de projeto
The AT90CAN128-16MU is a 4.5 V to 5.5 V part only; it is not native 3.3 V. Place a 100 nF decoupling capacitor on each VCC and AVCC pin pair, plus a 10 uF bulk capacitor near the chip, and connect AVCC directly to VCC. When interfacing 3.3 V peripherals, use a level shifter on each shared signal - the AVR inputs must not exceed VCC by more than 0.5 V or the input clamp diodes will forward-bias and inject current into the rail. The exposed pad on the 64-pin QFN must be soldered to a copper pour connected to GND to provide the lowest thermal-resistance path.
Route the CANH and CANL differential pair as a 120-ohm impedance-controlled pair with at least 4x dielectric spacing to other signals, and place the MCP2551/TJA1050 transceiver within 25 mm of the AT90CAN128's CAN pins (PD2 RXCAN, PD3 TXCAN) to keep stub lengths short. Add a common-mode choke and TVS diode such as PESD1CAN near the bus connector for ESD and surge protection. The 16 MHz AVR can be clocked from the internal RC oscillator for cost-sensitive designs, but add a low-ESR 16 MHz crystal with two 12-22 pF load capacitors for CAN 1 Mbit/s operation because CAN timing accuracy requires better than 0.5% clock tolerance.
Common pitfalls include: (1) forgetting to disable the JTAG pins (PF4-PF7) via the MCUCSR fuse when those pins are needed as GPIO, otherwise JTAG debug will be permanently active; (2) exceeding 128 KB of Flash without adjusting the boot loader section size, which can lock the firmware from updating; (3) leaving the internal brown-out detector disabled, which lets VCC droop cause Flash corruption during write cycles - always set BOD to at least 4.0 V; (4) enabling the watchdog without also enabling WDT interrupt mode, which can reset the MCU prematurely during long CAN message processing. Always read the lock bits and fuse bytes before ISP programming to avoid bricking the device.
Informações de conformidade
RoHS and REACH compliant per DigiKey product listing 1245789 and Microchip product page. AEC-Q100 not qualified - the AT90CAN128-16MU is not an automotive-grade part; for AEC-Q100 qualified alternatives evaluate the ATmega64M1 or AT90CAN128 automotive successors. Lead-free reflow compatible per Microchip packaging datasheet.
