ATMEGA48PB-MUR - 4KB AVR MCU, 20MHz, 32-VQFN | Microchip
N.º da peça: ATMEGA48PB-MUR ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $1.28 | $1,28 |
| 10 | $1.22 | $12,20 |
| 100 | $1.09 | $109,00 |
| 500 | $0.98 | $490,00 |
| 1.000 | $0.88 | $880,00 |
ATMEGA48PB-MUR Visão geral
An 8-bit AVR ATmega microcontroller is a reduced-instruction-set computing (RISC) device that executes most instructions in a single clock cycle, forming the entry level of the Microchip 8-bit MCU hierarchy: ATmega48PB -> AVR ATmega family -> AVR core family -> microcontroller -> semiconductor IC. These devices are programmed in-system via SPI and are supported by the AVR toolchain including Microchip Studio and the MiniCore Arduino hardware package.
Key features include 4KB (2K x 16) self-programmable Flash with read-while-write capability, three flexible 16-bit and 8-bit timer/counters with compare modes and PWM, and picoPower technology for ultra-low sleep currents. Connectivity covers I2C (TWI), SPI, and USART with wake-up on start of transmission. System peripherals include brown-out detection, power-on reset, watchdog timer, and both internal and external interrupt sources.
Architecturally, the device pairs the AVR core with 32 general-purpose working registers directly connected to the ALU, enabling one-cycle execution and high code efficiency. The PB generation improves on the PA generation with modified pin functionality on pins 3 and 6, added core-independent peripherals, and lower-power picoPower operation.
Typical applications include industrial sensor nodes, consumer appliances, LED lighting control, battery-powered portable devices, and general-purpose embedded control where small code size and low power dominate.
When designing, note the drop-in caveats documented by Microchip for replacing ATmega48PA parts: pin 3 must not be actively driven when tied to GND, and pin 6 must not be actively driven when tied to VCC.
This page synthesizes distributor pricing, pin-compatible drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Alternativas drop-in para ATMEGA48PB-MUR — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com ATMEGA48PB-MUR (mesmo formato e footprint) — diferindo em Package, EEPROM, Flash Memory, Operating Temperature, RoHS Status.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
ATMEGA48PA-MUR
✅ Drop-In✓ Em estoque
$0.98 / unidade
Ver ficha técnica →ATMEGA88PB-MUR
✅ Drop-In ⚠️ Especificações não verificadas✓ Em estoque
$0.98 / unidade
Ver ficha técnica →ATMEGA168PB-MUR
✅ Drop-In ⚠️ Especificações não verificadas📋 Alternativa de referência (fora do catálogo)
ATMEGA328PB-MUR
✅ Drop-In ⚠️ Especificações não verificadas✓ Em estoque
$1.68 / unidade
Ver ficha técnica →ATMEGA48PB-MUR Classificações máximas e características elétricas
| Core Processor | AVR |
| Core Size | 8-Bit |
| Frequência máxima de clock | 20 MHz |
| Program Memory Size | 4 KB (2K x 16) Flash |
| Program Memory Type | ISP FLASH |
| EEPROM Size | 256 B |
| SRAM Size | 512 B |
| Number of I/O | 27 |
| Connectivity | I2C, SPI, UART/USART |
| Peripherals | Brown-out Detect/Reset, POR, PWM, WDT |
| Encapsulamento | 32-VFQFN Exposed Pad (5x5 mm) |
| Tipo de montagem | Surface Mount |
| Temperatura de operação | -40C to +85C (industrial, per FindIC: IND TEMP) |
| Technology | picoPower |
| Status RoHS | Green / RoHS compliant (per Mouser: QFN/MLF GRN) |
| Packaging | Tape & Reel (R suffix) |
| Functional Safety | FuSa-capable part (per DigiKey listing) |
Configuração de pinos do ATMEGA48PB-MUR
| Pino 1 | PD3 (PCINT19/OC2B/INT1) — Port D, bit 3 / pin-change interrupt 19 / Timer2 output compare B / external interrupt 1 |
| Pino 2 | PD4 (PCINT20/XCK/T0) — Port D, bit 4 / pin-change interrupt 20 / USART external clock / Timer0 external clock |
| Pino 3 | GND — Ground (PB migration note: if connected to GND, must not be actively driven; ACO must not be enabled) |
| Pino 4 | VCC — Digital supply voltage |
| Pino 5 | GND — Ground |
| Pino 6 | VCC — Digital supply voltage (PB migration note: if connected to VCC, must not be actively driven) |
| Pino 7 | PB6 (PCINT6/XTAL1/TOSC1) — Port B, bit 6 / pin-change interrupt 6 / crystal oscillator input 1 / timer oscillator input 1 |
| Pino 8 | PB7 (PCINT7/XTAL2/TOSC2) — Port B, bit 7 / pin-change interrupt 7 / crystal oscillator output 2 / timer oscillator output 2 |
| Pino 9 | PD5 (PCINT21/OC0B/T1) — Port D, bit 5 / pin-change interrupt 21 / Timer0 output compare B / Timer1 external clock |
| Pino 10 | PD6 (PCINT22/OC0A/AIN0) — Port D, bit 6 / pin-change interrupt 22 / Timer0 output compare A / analog comparator positive input |
| Pino 11 | PD7 (PCINT23/AIN1) — Port D, bit 7 / pin-change interrupt 23 / analog comparator negative input |
| Pino 12 | PB0 (PCINT8/CLKO/ICP1) — Port B, bit 0 / pin-change interrupt 8 / system clock output / Timer1 input capture |
| Pino 13 | PB1 (PCINT9/OC1A) — Port B, bit 1 / pin-change interrupt 9 / Timer1 output compare A |
| Pino 14 | PB2 (PCINT10/OC1B/SS) — Port B, bit 2 / pin-change interrupt 10 / Timer1 output compare B / SPI slave select |
| Pino 15 | PB3 (PCINT11/OC2A/MOSI) — Port B, bit 3 / pin-change interrupt 11 / Timer2 output compare A / SPI master output |
| Pino 16 | PB4 (PCINT12/MISO) — Port B, bit 4 / pin-change interrupt 12 / SPI master input |
| Pino 17 | PB5 (PCINT13/SCK) — Port B, bit 5 / pin-change interrupt 13 / SPI serial clock |
| Pino 18 | AVCC — ADC supply voltage |
| Pino 19 | ADC6 — Analog-to-digital converter input channel 6 |
| Pino 20 | AREF — Analog reference voltage for ADC |
| Pino 21 | GND — Ground |
| Pino 22 | ADC7 — Analog-to-digital converter input channel 7 |
| Pino 23 | PC0 (PCINT14/ADC8) — Port C, bit 0 / pin-change interrupt 14 / ADC channel 8 |
| Pino 24 | PC1 (PCINT15/ADC9) — Port C, bit 1 / pin-change interrupt 15 / ADC channel 9 |
| Pino 25 | PC2 (PCINT16/ADC10) — Port C, bit 2 / pin-change interrupt 16 / ADC channel 10 |
| Pino 26 | PC3 (PCINT17/ADC11) — Port C, bit 3 / pin-change interrupt 17 / ADC channel 11 |
| Pino 27 | PC4 (PCINT18/ADC12/SDA) — Port C, bit 4 / pin-change interrupt 18 / ADC channel 12 / TWI data |
| Pino 28 | PC5 (PCINT19/ADC13/SCL) — Port C, bit 5 / pin-change interrupt 19 / ADC channel 13 / TWI clock |
| Pino 29 | PC6 (RESET/PCINT14) — Reset input / pin-change interrupt |
| Pino 30 | PD0 (PCINT16/RXD) — Port D, bit 0 / pin-change interrupt 16 / USART receive |
| Pino 31 | PD1 (PCINT17/TXD) — Port D, bit 1 / pin-change interrupt 17 / USART transmit |
| Pino 32 | PD2 (PCINT18/INT0) — Port D, bit 2 / pin-change interrupt 18 / external interrupt 0 |
Aplicações típicas
ATMEGA48PB-MUR é adequado para 6 aplicaçãos: Industrial Sensor Nodes, Battery-Powered Portable Devices, LED Lighting and PWM Control, Consumer Appliance Control, Remote Control and IR Receivers, Educational and Hobbyist Embedded Projects.
Industrial Sensor Nodes
The ATMEGA48PB-MUR fits industrial sensor nodes because its 4KB Flash is sufficient for acquisition, filtering, and TWI/SPI sensor-driver code, while picoPower technology keeps standby current low between measurement cycles. The 27 GPIO lines and three timer/counters with PWM support sensor excitation and local actuation. Placed as the node controller reading I2C or SPI sensors and reporting over USART or wireless module, it runs reliably across the -40C to +85C industrial range. The trade-off versus the 8KB ATMEGA88PB is limited headroom for protocol stacks, so keep communication logic lean or select the memory-upgrade drop-in if 4KB proves tight.
Recomendado
Battery-Powered Portable Devices
For battery-powered products such as handheld meters and portable accessories, the ATMEGA48PB-MUR's picoPower technology minimizes current in power-down and standby sleep modes, directly extending battery life. The brown-out detector and power-on reset guarantee safe reset behavior as the battery discharges, and the wide supply range supports direct lithium or dual-alkaline powering. Typical topology: MCU sleeps in power-down with pin-change interrupts waking it on button press, sampling sensors via TWI every few seconds. Using the 20MHz clock only during active bursts keeps average current in the microamp range. Verify sleep currents against the datasheet electrical-characteristics tables for your exact supply voltage.
Recomendado
LED Lighting and PWM Control
In LED lighting drivers and dimmers, the ATMEGA48PB-MUR uses its three flexible timer/counters with compare modes to generate hardware PWM channels without CPU overhead, while the core-independent peripherals of the PB generation offload additional timing tasks. The 27 I/O lines drive LED strings or MOSFET gate drivers directly through the port structure, and the watchdog timer provides fail-safe recovery. Operating from a 5V rail, the outputs meet standard LED-driver logic thresholds. The main design consideration is PWM frequency selection: 8-bit hardware PWM above audibility (>20kHz) limits resolution, so balance flicker, acoustic noise, and dimming granularity in the timer configuration.
Recomendado
Consumer Appliance Control
The ATMEGA48PB-MUR is a cost-effective controller for small appliances - fans, chargers, kettles, and remote controls - where a 4KB program covers user interface, thermal sensing, and simple closed-loop control. Hardware USART handles user-interface communication or external module links, SPI supports EEPROM and display drivers, and the internal oscillator can remove the external crystal in non-timing-critical designs, saving BOM cost. Pricing around $1.28 per unit as of 2026-09-18 keeps it competitive in volume consumer BOMs. For products needing OTA firmware updates over larger protocol stacks, the pin-compatible ATMEGA168PB-MUR provides four times the Flash with no PCB change.
Recomendado
Remote Control and IR Receivers
The ATMEGA48PB-MUR suits infrared remote-control receivers and transmitters because its pin-change interrupts wake the device instantly from power-down, and timer capture modes decode IR carrier bursts with microsecond accuracy. The USART wake-up-on-start-of-transmission feature supports wired IR-extended links, and the compact 32-VFQFN (5x5 mm) package fits slim handheld form factors. The PB pin-functionality changes documented by Microchip (pins 3 and 6) should be checked against legacy PA-based receiver layouts before drop-in migration. Typical design: the MCU sleeps at microamp current, wakes on the IR receiver output edge, decodes the protocol in firmware, and acts via GPIO or USART.
Recomendado
Educational and Hobbyist Embedded Projects
The ATMEGA48PB-MUR is popular in education and prototyping because the AVR architecture is thoroughly documented and supported by the MiniCore Arduino hardware package, enabling Arduino IDE and PlatformIO workflows with an ISP programmer such as Atmel-ICE or USBasp. The 4KB Flash and 512B SRAM teach disciplined embedded C programming, while 27 GPIOs and three timers support robotics, sensor, and display exercises. The 32-VFQFN package is hand-solderable with hot air or a QFN adapter board; students often prototype on the DIP-based ATMEGA48A-CCU or ATMEGA48-20PI and migrate to this QFN part for final PCBs, preserving firmware compatibility across the family.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para ATMEGA48PB-MUR — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | ATMEGA48PA-MUR | ATMEGA48PB-AUR | ATMEGA88PB-MUR | ATMEGA168PB-MUR | ATMEGA328PB-MUR |
|---|---|---|---|---|---|---|
| Package | 32-VFQFN (5x5) Exposed Pad | 32-VFQFN (5x5) Exposed Pad - same | TQFP-32 (7x7) - different footprint | 32-VFQFN (5x5) Exposed Pad - same | 32-VFQFN (5x5) Exposed Pad - same | 32-VFQFN (5x5) Exposed Pad - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Memory | 4 KB (2K x 16) | 4 KB | 4 KB | 8 KB | 16 KB | 16 KB |
| EEPROM | 256 B | 256 B | 256 B | 512 B | 512 B | 512 B |
| SRAM | 512 B | 512 B | 512 B | 1 KB | 1 KB | 1 KB |
| Max Clock Frequency | 20 MHz | 20 MHz | 20 MHz | 20 MHz | 20 MHz | 20 MHz |
| Number of I/O | 27 | 27 | 27 | 27 | 27 | 27 |
| Technology / Special Features | picoPower, PB core-independent peripherals, FuSa-capable | picoPower, PA generation (no PB extras) | picoPower, PB generation - same die | picoPower, PB generation | picoPower, PB generation | picoPower, extra timers, dual TWI/SPI |
Principais diferenciais
- PB-generation core-independent peripherals and latest picoPower silicon (vs ATMEGA48PA-MUR)
- Functional-Safety (FuSa) capable part status (vs ATMEGA48PA-MUR)
- Drop-in memory upgrade path on identical footprint (vs ATMEGA88PB-MUR / ATMEGA168PB-MUR / ATMEGA328PB-MUR)
Notas de projeto
When using the ATMEGA48PB-MUR as a drop-in replacement for ATMEGA48PA layouts, follow Microchip's documented migration cautions exactly: pin 3, when connected to GND, must not be actively driven and the analog comparator output (ACO) must not be enabled; pin 6, when connected to VCC, must not be actively driven. Violating these conditions can cause misoperation. Audit existing PA schematics for external drivers on these pins before swapping the PB in, and review the Added/Modified Pin Functionality section of the ATmega48PB/88PB/168PB online documentation.
The 32-VFQFN exposed-pad package requires the thermal pad to be soldered to a grounded copper pour with an array of thermal vias for reliable grounding and heat dissipation. Decouple each VCC pin (pins 4 and 6) and AVCC (pin 18) with 100 nF ceramic capacitors placed within 2 mm of the pins, plus a bulk 4.7 uF to 10 uF capacitor near the supply entry. Tie AVCC to VCC through an LC filter or low-value resistor when ADC noise performance matters, and keep the AREF (pin 20) trace short with its own decoupling.
Estimated: with 27 GPIOs driven and a 20MHz clock, worst-case active current is on the order of tens of milliamps (verify against the datasheet electrical characteristics table for your exact VCC and frequency). Budget the regulator for peak simultaneous I/O sourcing rather than core current alone. For battery designs, exploit picoPower power-down mode: disable the brown-out detector during deep sleep only if the application tolerates it, and use pin-change interrupts for wake-up. Confirm actual sleep currents from the manufacturer datasheet, as published figures depend on voltage and temperature.
When using an external crystal on XTAL1/XTAL2 (pins 7 and 8), follow the datasheet load-capacitance recommendations and keep the crystal loop traces short and guarded by ground. Unused PB6/PB7 can be reclaimed as GPIO if the internal RC oscillator is selected. For ISP programming, ensure the SPI pins (PB3/PB4/PB5, pins 15-17) and RESET (pin 29) are not loaded by external pull-downs that would defeat in-system programming; a 10 kOhm pull-up on RESET is standard practice.
Informações de conformidade
Mouser lists the part as QFN/MLF GRN (green, RoHS/halogen-free) and FindIC confirms IND TEMP GREEN T&R. REACH and conflict-minerals certificates not stated in provided data.
