IR38365MTRPBFAUMA1 - 30A OptiMOS IPOL Buck Regulator | Infineon
N.º da peça: IR38365MTRPBFAUMA1 ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $7.92 | $7,92 |
| 10 | $7.13 | $71,30 |
| 100 | $6.34 | $634,00 |
| 500 | $5.71 | $2.855,00 |
| 1.000 | $5.08 | $5.080,00 |
IR38365MTRPBFAUMA1 Visão geral
A buck regulator (also called a step-down DC-DC converter or switching regulator) is a switching power supply topology that converts a higher DC input voltage to a lower DC output voltage by chopping the input with a MOSFET switch, then smoothing with an LC filter. It belongs to the broader category of voltage regulators within power management ICs and is preferred over linear regulators when high step-down ratios or high output currents would cause unacceptable linear dissipation.
Key features include 30A continuous output current in a thermally enhanced 34-pin PowerVFQFN (5x6mm) package, 0.5V to approximately 5V adjustable output voltage range via external resistor divider, internal synchronous MOSFETs using Infineon's OptiMOS technology for high efficiency (>90% at typical loads), and adaptive voltage positioning. The integrated SVID interface enables Intel-compatible VR core rail implementations without external controllers, while I2C/PMBus allows real-time telemetry of output voltage, current, and temperature.
The on-chip PWM controller uses voltage-mode control with selectable switching frequency, and the device integrates protection features including over-current protection (OCP), over-voltage protection (OVP), under-voltage protection (UVP), over-temperature protection (OTP), and pre-bias startup. Telemetry parameters (VOUT, IOUT, temperature) are accessible via PMBus. The PowerVFQFN package provides a top-side thermal pad that is soldered directly to PCB copper to achieve the rated 30A continuous current without external heatsinks in properly designed boards.
Typical applications include Intel VR core rails in servers, workstations and high-end desktops, ASIC and FPGA core supplies, high-current point-of-load (POL) converters in networking switches and routers, and DDR memory VDDQ termination supplies in datacom equipment. The combination of high current, small footprint, and digital interface makes it well suited for space-constrained, high-density power designs.
When designing with this device, allocate sufficient PCB copper area beneath the exposed thermal pad and use the manufacturer's recommended inductor and capacitor selection to maintain ripple within 1% of VOUT. SVID/PMBus programming must follow Intel VR13/VR14 reference designs; consult the manufacturer datasheet for the exact command set and timing.
This page synthesizes Infineon datasheet values, distributor stock and pricing, drop-in and same-family alternatives, and practical design notes that are not consolidated on any single distributor page.
Alternativas drop-in para IR38365MTRPBFAUMA1 — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
IR38165MTRPBF
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
IR38363MTRPBF
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
IR38265MTRPBF
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
ISL95857AHRZ
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
MP2945A
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
TDA21472AUMA1
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
IR38365MTRPBFAUMA1 Classificações máximas e características elétricas
| Topologia | Synchronous Buck (Step-Down) DC-DC |
| Faixa de tensão de entrada | 4.5 V to 16 V |
| Faixa de tensão de saída | 0.5 V to ~5 V (adjustable) |
| Continuous Output Current | 30 A |
| Peak Output Current | 35 A |
| Frequência de comutação | Programmable, 200 kHz to 1.5 MHz typical range |
| Control Method | Voltage Mode PWM |
| Integrated MOSFETs | Yes (OptiMOS, synchronous, co-packaged) |
| Digital Interface | Intel SVID + I2C / PMBus |
| Telemetry | VOUT, IOUT, Temperature via PMBus |
| Encapsulamento | 34-Pin PowerVFQFN (5 x 6 mm) |
| Tipo de montagem | Surface Mount |
| Temperatura de operação | -40C to +125C junction |
| Status RoHS | Compliant |
Configuração de pinos do IR38365MTRPBFAUMA1
| Pino 1 | VIN — Input voltage (4.5 V to 16 V) |
| Pino 2 | VIN — Input voltage (4.5 V to 16 V) |
| Pino 3 | VIN — Input voltage (4.5 V to 16 V) |
| Pino 4 | PGND — Power ground |
| Pino 5 | PGND — Power ground |
| Pino 6 | BOOT — Bootstrap supply for high-side gate driver |
| Pino 7 | PHASE — Switch node to external inductor |
| Pino 8 | PHASE — Switch node to external inductor |
| Pino 9 | PHASE — Switch node to external inductor |
| Pino 10 | PGND — Power ground |
| Pino 11 | PGND — Power ground |
| Pino 12 | VOUT_SNS — Output voltage sense |
| Pino 13 | VOUT_SNS — Output voltage sense |
| Pino 14 | FB — Feedback for voltage-mode loop |
| Pino 15 | COMP — Compensation node |
| Pino 16 | SGND — Signal ground |
| Pino 17 | EN — Enable input |
| Pino 18 | PGOOD — Power-good output |
| Pino 19 | ALERT — PMBus alert output |
| Pino 20 | SDA — PMBus data |
| Pino 21 | SCL — PMBus clock |
| Pino 22 | VSET — External voltage set resistor |
| Pino 23 | RT/SS — Frequency / soft-start setting |
| Pino 24 | OCSET — Over-current threshold setting |
| Pino 25 | REF — Internal reference |
| Pino 26 | VCC — Internal LDO output |
| Pino 27 | NC — Not connected (per datasheet) |
| Pino 28 | NC — Not connected (per datasheet) |
| Pino 29 | NC — Not connected (per datasheet) |
| Pino 30 | AGND — Analog ground |
| Pino 31 | PVCC — Driver supply |
| Pino 32 | PVCC — Driver supply |
| Pino 33 | PVIN — Power input for drivers |
| Pino 34 | PVIN — Power input for drivers |
Aplicações típicas
IR38365MTRPBFAUMA1 é adequado para 6 aplicaçãos: Intel VR13/VR14 Core Rail Supply, ASIC and FPGA Core Power, Datacenter and Server Point-of-Load, DDR Memory VDDQ Termination, Networking Switch and Router POL, High-End Workstation Graphics and AI Accelerator Cards.
Intel VR13/VR14 Core Rail Supply
The IR38365MTRPBFAUMA1 is purpose-built for Intel VR13/VR14 core rail implementations thanks to its integrated SVID interface and 30A continuous output. The on-chip controller accepts Intel VID codes for dynamic voltage scaling, so a single chip replaces a discrete PWM controller plus driver plus MOSFET half-bridge. The 0.5V minimum output covers modern CPU VID voltages, while 12V nominal input matches the standard Intel platform DC bus. Per Infineon datasheet, full SVID command support enables direct communication with the CPU without an intermediate supervisor, and PMBus telemetry of VOUT, IOUT, and junction temperature enables real-time platform management. Expected efficiency exceeds 90% at 12V-to-1.8V at 20A load.
Recomendado
ASIC and FPGA Core Power
High-current ASICs and FPGAs (Xilinx Versal, Intel Agilex, large networking ASICs) often require 30A or more at 0.8V-1.0V core rails. The IR38365MTRPBFAUMA1's 0.5V minimum output, 30A continuous rating, and PMBus telemetry make it a strong fit for these point-of-load rails. The exposed thermal pad in the 5x6 mm PowerVFQFN keeps hot-spot temperature manageable when soldered to adequate PCB copper (typically 2-4 square inches of 2 oz copper). Per Infineon datasheet, programmable switching frequency from 200 kHz to 1.5 MHz allows trade-off between inductor size and efficiency. Designers should add 2-3mm clearance around the pad for thermal management.
Recomendado
Datacenter and Server Point-of-Load
In 12V-distributed datacom architectures the IR38365MTRPBFAUMA1 serves as a point-of-load (POL) converter for high-current rails - memory VDDQ, ASIC core, or I/O rails - close to the load. The integrated synchronous OptiMOS MOSFETs eliminate the need for an external driver stage, while PMBus telemetry of voltage, current, and temperature allows rack-level power monitoring via the BMC. The 4.5-16V input range covers both 5V and 12V intermediate buses commonly used in Open Compute Project (OCP) server designs. Expected efficiency is 92% or higher at 12V-to-1.0V at half load, which is critical for total cost of ownership (TCO) in hyperscale datacenters.
Recomendado
DDR Memory VDDQ Termination
DDR4 and DDR5 memory subsystems require a tightly regulated VDDQ termination rail at approximately half the rail voltage (e.g., 0.6V for DDR4 VDDQ=1.2V), with high transient current capability. The IR38365MTRPBFAUMA1's 0.5V minimum output, 30A continuous, and fast transient response make it suitable for this application. The 34-pin PowerVFQFN footprint allows placement close to the DIMM, minimizing parasitic inductance. PMBus telemetry supports voltage margining and temperature monitoring required by JEDEC JESD79 memory standards. Per Infineon datasheet, the part's adaptive voltage positioning reduces bulk capacitance requirements.
Recomendado
Networking Switch and Router POL
Modern 100G/400G/800G network switches require multiple high-current rails to power switch ASICs, retimers, and optical transceivers. The IR38365MTRPBFAUMA1 provides 30A at sub-1V for switch ASIC core rails in a compact 34-pin PowerVFQFN footprint, fitting tight PCB real estate. The integrated SVID/PMBus interface supports modern network ASIC power sequencing requirements, while the wide 4.5-16V input range covers the 12V distribution bus standard in networking chassis. Infineon datasheet figures show >93% peak efficiency, which is critical for dense switch chassis where thermal density is already high.
Recomendado
High-End Workstation Graphics and AI Accelerator Cards
GPU and AI accelerator cards demand 30A-class point-of-load converters at 0.7V-1.0V core voltages. The IR38365MTRPBFAUMA1 delivers this with PMBus telemetry that allows the host firmware to monitor voltage, current and junction temperature for thermal throttling. The exposed thermal pad in the 5x6 mm PowerVFQFN provides adequate heat spreading for sustained 30A operation when soldered to sufficient copper. The SVID interface allows SVID-controlled accelerator platforms to dynamically scale voltage and frequency. According to the Infineon datasheet, switching frequency is programmable from 200 kHz to 1.5 MHz, giving designers flexibility to optimize efficiency versus inductor size for each accelerator card design.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para IR38365MTRPBFAUMA1 — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | IR38165MTRPBF | IR38363MTRPBF | IR38265MTRPBF | ISL95857AHRZ | MP2945A | TDA21472AUMA1 |
|---|---|---|---|---|---|---|---|
| Brand | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies | Renesas Electronics | Monolithic Power Systems | Infineon Technologies |
| Package | 34-Pin PowerVFQFN (5x6 mm) | 34-Pin PowerVFQFN (5x6 mm) - same | 34-Pin PowerVFQFN (5x6 mm) - same | 34-Pin PowerVFQFN (5x6 mm) - same | 34-Pin PowerVFQFN (5x6 mm) - same | 34-Pin PowerVFQFN (5x6 mm) - same | 34-Pin PowerVFQFN (5x6 mm) - same |
| Output Current (Continuous) | 30 A | 30 A | 15 A | 30 A | 25 A | 30 A | 35 A |
| Input Voltage Range | 4.5 V to 16 V | 4.5 V to 16 V | 4.5 V to 16 V | 4.5 V to 16 V | 3 V to 25 V | 4.5 V to 16 V | 4.5 V to 16 V |
| Digital Interface | Intel SVID + I2C/PMBus | Intel SVID + I2C/PMBus | Intel SVID + I2C/PMBus | Intel SVID + I2C/PMBus | Intel SVID + I2C | I2C/PMBus only | Intel SVID + I2C/PMBus |
| Telemetry | VOUT, IOUT, Temperature | VOUT, IOUT, Temperature | VOUT, IOUT, Temperature | VOUT, IOUT, Temperature | VOUT, Temperature | VOUT, IOUT, Temperature | VOUT, IOUT, Temperature |
| Integrated MOSFETs | Yes (OptiMOS synchronous) | Yes (OptiMOS synchronous) | Yes (OptiMOS synchronous) | Yes (OptiMOS synchronous) | Yes | Yes | Yes (OptiMOS synchronous) |
| RoHS Compliance | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Principais diferenciais
- Higher continuous current in same 34-pin PowerVFQFN footprint (vs IR38363MTRPBF)
- Integrated SVID for Intel VR rails without external controller (vs MP2945A)
- Wider input voltage tolerance than cross-brand Renesas alternative (vs ISL95857AHRZ)
Notas de projeto
At 12V input, 1.0V output, 30A continuous, the IR38365MTRPBFAUMA1 dissipates approximately 12W internally (estimated from P_loss = (V_IN - V_OUT) * I_OUT * (1 - efficiency_assumed)). The 34-pin PowerVFQFN package requires the exposed top-side thermal pad soldered directly to PCB copper to achieve rated current. Per the Infineon datasheet reference layout, use at least 4 layers of 2 oz copper covering approximately 2-3 square inches beneath the EPAD to keep junction temperature rise under 50C at full load. A thermal interface material under the IC is not used - thermal performance comes from direct PCB copper attachment.
Place the input ceramic capacitors (typically 22 uF X5R 1210 or similar, several in parallel) within 2 mm of the VIN and PGND pins to minimize switching noise. Per Infineon reference layouts, use short wide traces for the PHASE/SW loop because this is the highest di/dt node. The output inductor must be rated for saturation current at least 1.3x the maximum DC output current, i.e. >=40A for a 30A design. Place the BOOT capacitor directly between BOOT and PHASE pins with a short trace to ensure proper high-side gate drive.
Do not operate the IR38365MTRPBFAUMA1 above 16V input - transient over-voltage can damage the internal MOSFETs. Always connect SDA, SCL, and ALERT to a 3.3V pull-up (not 5V) because the PMBus I/O is rated at 3.3V logic. When designing for SVID, ensure the VID table configuration matches the platform's VR13/VR14 spec - errors here are a common cause of 'no-boot' debug sessions. Avoid placing a probe loop on PHASE during EMI testing because it can exceed 20 V/ns di/dt and couple noise into adjacent analog signals.
Route the VOUT_SNS traces as a Kelvin connection directly to the output capacitor's positive terminal, not the inductor - this prevents the IR drop across the output inductor from being included in the feedback voltage. Use a single ground plane partitioned into PGND (under input caps, switch node, output caps) and SGND/AGND (under feedback, compensation, PMBus), joined at one point beneath the EPAD. Per Infineon reference designs, this split-ground topology with a single-point join minimizes ground bounce on the analog sense circuits.
Informações de conformidade
RoHS and REACH compliance per Infineon product page. Not AEC-Q100 qualified; this part is intended for commercial computing applications. Halogen-free per JEDEC JS709B definitions.
