ISL26104AVZ - 24-Bit 4kSPS 4-Ch Sigma-Delta ADC | Renesas
N.º da peça: ISL26104AVZ ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $12.43 | $12,43 |
| 10 | $11.2 | $112,00 |
| 100 | $9.85 | $985,00 |
| 500 | $8.61 | $4.305,00 |
| 1.000 | $7.74 | $7.740,00 |
ISL26104AVZ Visão geral
A delta-sigma (sigma-delta) ADC is a type of oversampling converter that uses a high-frequency modulator and digital decimation filtering to achieve very high resolution at the cost of absolute input bandwidth. In the broader taxonomy, the ISL26104 belongs to the precision ADC product family, which sits within data converters, a sub-category of mixed-signal integrated circuits. Delta-sigma ADCs are widely used in industrial weighing, process control, temperature measurement, and strain-gauge instrumentation because they trade conversion speed for excellent noise performance and integral linearity.
Key features of the ISL26104AVZ include the on-chip low-noise PGA with gains from 1x to 128x, which allows direct connection of low-amplitude signals such as load cells, thermocouples, and bridge sensors without an external instrumentation amplifier. The device supports an external differential reference and offers a serial SPI-compatible output interface. Its integrated digital filter delivers 50 Hz and 60 Hz mains-rejection at appropriate output data rates, simplifying design for industrial environments with significant line-frequency noise.
The device operates from a single analog supply (typically +5 V) and a digital supply, with an internal clock. The 28-pin TSSOP package provides a small footprint while still allowing hand-soldering for prototypes and small production runs. According to the Renesas datasheet, the ISL26104 also shares pin-out compatibility with the 2-channel ISL26102, giving designers a simple upgrade path when more channels are required.
Typical applications include industrial weighing scales, load-cell signal conditioning, multi-channel temperature acquisition, pressure transducers, and precision weigh-in-motion modules. The combination of an integrated PGA and high-resolution conversion removes most of the analog signal-chain complexity for sensor readout. Designers should note that the PGA gain, output data rate, and digital-filter bandwidth trade off against each other: higher PGA gain reduces input-referred noise but narrows the usable bandwidth, while lower output data rates improve noise-free resolution at the expense of conversion speed.
Alternativas drop-in para ISL26104AVZ — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com ISL26104AVZ (mesmo formato e footprint) — diferindo em Input Type, Interface.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
ISL26104AVZ-T
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
ISL26104AVZ-T7A
✅ Drop-In✓ Em estoque
$9.1 / unidade
Ver ficha técnica →ISL26102AVZ
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
ISL26102AVZ-T
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
ISL26104AVZ Classificações máximas e características elétricas
| Resolução | 24-bit |
| Number of Channels | 4 differential |
| Converter Type | Sigma-Delta (Delta-Sigma) |
| Output Data Rate | 2.5 SPS to 4 kSPS |
| Input Type | Differential, multiplexed |
| Integrated PGA Gain | 1x to 128x (programmable) |
| Number of ADCs | 1 |
| Interface | Serial, SPI-compatible |
| Reference Type | External differential |
| Encapsulamento | 28-pin TSSOP |
| Tipo de montagem | Surface Mount |
| Status RoHS | Compliant |
| Pin/Package Suffix | AVZ (TSSOP-28, lead-free) |
Configuração de pinos do ISL26104AVZ
| Pino 1 | AIN1+ — Analog input 1 positive |
| Pino 2 | AIN1- — Analog input 1 negative |
| Pino 3 | AIN2+ — Analog input 2 positive |
| Pino 4 | AIN2- — Analog input 2 negative |
| Pino 5 | AIN3+ — Analog input 3 positive |
| Pino 6 | AIN3- — Analog input 3 negative |
| Pino 7 | AIN4+ — Analog input 4 positive |
| Pino 8 | AIN4- — Analog input 4 negative |
| Pino 9 | REFIN+ — External reference positive input |
| Pino 10 | REFIN- — External reference negative input |
| Pino 11 | AVSS — Analog ground |
| Pino 12 | AVDD — Analog supply (5V) |
| Pino 13 | NC — Not connected (per datasheet) |
| Pino 14 | NC — Not connected (per datasheet) |
| Pino 15 | GPIO0 — General-purpose I/O 0 |
| Pino 16 | GPIO1 — General-purpose I/O 1 |
| Pino 17 | MODE — Mode select input |
| Pino 18 | DRDY — Data ready output (active low) |
| Pino 19 | DOUT — Serial data output |
| Pino 20 | DIN — Serial data input |
| Pino 21 | SCLK — Serial clock input |
| Pino 22 | CS — Chip select (active low) |
| Pino 23 | SYNC — Synchronization input |
| Pino 24 | RESET — Reset input (active low) |
| Pino 25 | DVDD — Digital supply (3.3V or 5V) |
| Pino 26 | DGND — Digital ground |
| Pino 27 | XIN — External clock input |
| Pino 28 | XOUT — External clock output |
Aplicações típicas
ISL26104AVZ é adequado para 6 aplicaçãos: Industrial Weighing Scales, Load Cell Signal Conditioning, Multi-Channel Temperature Acquisition, Pressure Transducer Readout, Strain Gauge Instrumentation, Process Control Analog Input Modules.
Industrial Weighing Scales
The ISL26104AVZ fits industrial weighing-scale designs because its integrated PGA (1x-128x) and 24-bit sigma-delta core deliver the noise-free resolution required to resolve microvolt-level load-cell signals. Placed between the bridge load-cell and the host MCU via SPI, the part eliminates a separate instrumentation amplifier and precision ADC, shrinking the BOM. With 4 differential input channels, a single IC handles 4 independent load cells, supporting multi-platform truck scales and multi-point hopper scales. At 10 SPS output rate with PGA gain of 128x, the converter typically achieves >20 noise-free bits, sufficient for legal-for-trade weighing classes. The device's selectable output data rate from 2.5 SPS to 4 kSPS lets the engineer trade settling time against noise: slower rates give better mains rejection (50/60 Hz), which is essential in factory environments.
Recomendado
Load Cell Signal Conditioning
For bridge-type load cell readout, the ISL26104AVZ's on-chip low-noise PGA removes the need for an external INA and accepts the millivolt-level differential signal directly. The integrated digital filter provides simultaneous 50 Hz and 60 Hz rejection at appropriate output data rates, critical for global industrial installations. Four differential channels mean a single converter handles quad-axis force platforms or multi-sensor weighing modules. At PGA gain of 64x-128x, the input-referred noise approaches a few nanovolts per root-hertz, allowing microgram resolution in precision balances. The serial SPI interface connects directly to most host microcontrollers and supports read rates up to 4 kSPS for dynamic weighing applications such as checkweighers on production lines.
Recomendado
Multi-Channel Temperature Acquisition
The ISL26104AVZ is well suited to multi-channel thermocouple and RTD temperature acquisition boards because it offers 4 differential inputs with integrated PGA gain that compensates for low-level thermocouple signals (typically 10-50 uV/degC). With PGA gain of 128x and output data rate around 20 SPS, the effective resolution supports 0.01 degC cold-junction-compensated temperature measurements. The TSSOP-28 package and serial interface keep the per-channel PCB footprint small, enabling high-channel-count data acquisition modules. According to the Renesas datasheet, the differential input structure inherently rejects common-mode thermocouple noise from heater lines and motor drives, improving accuracy in industrial temperature monitoring systems.
Recomendado
Pressure Transducer Readout
The ISL26104AVZ works directly with bridge-type pressure transducers where the differential output is typically a few millivolts per psi. Its on-chip PGA amplifies the bridge signal to full-scale ADC range, eliminating external signal conditioning. Four input channels handle multi-port pressure mapping in HVAC, hydraulics, and process-control applications. The 24-bit noise-free resolution at slow data rates supports medical-grade pressure measurement where 0.1% accuracy is required. According to the Renesas datasheet, the integrated PGA temperature coefficient and the low-drift digital filter make the IC suitable for industrial pressure transmitters that must hold calibration over 5-10 year deployment windows.
Recomendado
Strain Gauge Instrumentation
For strain-gauge bridge measurement, the ISL26104AVZ combines a low-noise PGA and 24-bit ADC in one package, allowing direct connection of 120-ohm or 350-ohm gauges. Four input channels support full-bridge, half-bridge, and quarter-bridge configurations on different channels simultaneously. With PGA gain of 128x and output data rate of 10 SPS, the device achieves microstrain resolution in structural-health monitoring applications. The serial SPI output interfaces to low-power MCUs, making the chip appropriate for battery-powered wireless strain nodes on bridges, towers, and pipelines.
Recomendado
Process Control Analog Input Modules
The ISL26104AVZ fits 4-channel analog input modules for PLCs and distributed control systems (DCS) where high common-mode rejection and small PCB footprint matter. Each differential channel accepts +/-10 mV to +/-5 V after PGA gain selection, covering most industrial sensor outputs. The selectable output data rate lets the module trade settling time against 50/60 Hz line noise rejection, essential for process control loops. Renesas documents the pin-out as compatible with the ISL26102 (2-channel), so a single PCB can be configured for either 2 or 4 channels by BOM swap, reducing design variants for module families.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para ISL26104AVZ — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | ISL26104AVZ-T | ISL26104AVZ-T7A | ISL26102AVZ | ISL26102AVZ-T |
|---|---|---|---|---|---|
| Brand | Renesas Electronics | Renesas Electronics - same | Renesas Electronics - same | Renesas Electronics - same | Renesas Electronics - same |
| Package | TSSOP-28 | TSSOP-28 - same | TSSOP-28 - same | TSSOP-28 - same | TSSOP-28 - same |
| Resolution | 24-bit | 24-bit | 24-bit | 24-bit | 24-bit |
| Input Channels | 4 differential | 4 differential | 4 differential | 2 differential | 2 differential |
| Output Data Rate | 2.5 SPS to 4 kSPS | 2.5 SPS to 4 kSPS | 2.5 SPS to 4 kSPS | 2.5 SPS to 4 kSPS | 2.5 SPS to 4 kSPS |
| Integrated PGA | Yes (1x-128x) | Yes (1x-128x) | Yes (1x-128x) | Yes (1x-128x) | Yes (1x-128x) |
| Interface | SPI serial | SPI serial | SPI serial | SPI serial | SPI serial |
| Converter Type | Sigma-Delta | Sigma-Delta | Sigma-Delta | Sigma-Delta | Sigma-Delta |
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant |
Principais diferenciais
- 4-channel integration in a single TSSOP-28 package (vs ISL26102AVZ)
- Integrated low-noise PGA with 1x-128x gain (vs ADS1231)
- Programmable output data rate from 2.5 SPS to 4 kSPS (vs HX711)
Notas de projeto
Place the 10 uF and 0.1 uF decoupling capacitors as close as possible to the AVDD and DVDD pins of the ISL26104AVZ, with the smaller capacitor directly at the pin. Use a solid ground plane under the TSSOP-28 footprint and route analog and digital grounds separately back to a star point at the chip's AVSS/DGND pins. According to the Renesas datasheet, this layout is required to achieve the datasheet's noise and PSRR numbers.
Route the four differential analog inputs (AIN1+/-, AIN2+/-, AIN3+/-, AIN4+/-) as matched-length, parallel-trace pairs with ground shielding. Keep the analog input traces away from digital SPI lines (SCLK, DIN, DOUT, DRDY, CS) to prevent digital noise coupling into the high-impedance front end. Estimated: 1 cm of trace mismatch at 100 Hz contributes negligible error, but at 1 kHz it can degrade effective resolution by 1-2 bits.
Do not exceed the absolute maximum analog input voltage specified in the Renesas datasheet. Always assert the RESET pin or cycle power after changing PGA gain or output data rate to avoid glitches in the digital filter. Estimated: at PGA gain of 128x, the input-referred noise is dominated by the PGA stage; bypassing the PGA (gain = 1x) for verification measurements can help isolate ADC noise from input-referred noise.
Informações de conformidade
RoHS and lead-free confirmed by Renesas AVZ suffix. REACH and AEC-Q100 status not explicitly stated in provided data; AEC-Q100 likely not_applicable for industrial ADC usage. Confirm with Renesas for automotive qualification needs.
