KSZ8895RQ - 5-Port 10/100 Managed Ethernet Switch | Microchip
N.º da peça: KSZ8895RQ ✓ AtivoKSZ8895RQ Visão geral
What is a managed Ethernet switch IC? A managed Ethernet switch IC is a single-chip device integrating multiple physical layer transceivers (PHYs), a Layer-2 switch fabric, and a management interface (typically SPI, I2C, or MDIO). In the system hierarchy, it sits above individual PHY transceivers, combining switching and management to reduce BOM cost and PCB area compared with discrete PHY-plus-MAC designs. It enables traffic prioritization, VLAN tagging, and port-level control required in industrial, automotive, and broadband access applications.
Key features include five integrated 10/100BASE-TX PHYs with HP auto-MDI/MDIX cable-polarity correction, advanced switch engine supporting 802.1Q VLAN and 802.1p QoS priority queuing, SPI and I2C management interfaces, an MII/RMII for connection to an external host MAC, and an energy-efficient Ethernet mode for power-saving link-down/idle states. The device operates from a single 3.3V supply with a low typical power consumption.
The KSZ8895RQ leverages Micrel's physical transceiver and switch silicon, combining a robust DSP-based analog front-end with a shared memory switch fabric to deliver non-blocking wire-speed switching on all five ports. Internal PHY termination resistors simplify board layout, and per-port link/fault LEDs are supported through a GPIO/LED interface. The architecture supports store-and-forward switching with up to 1K-entry MAC address table per port group.
Typical applications include industrial Ethernet switches and gateways, IP cameras and surveillance equipment, broadband CPE routers, automotive Ethernet backbone switches (the family is AEC-Q100 qualified for the MQI/RQI variants), and embedded networked control systems requiring five wired Ethernet ports.
When designing with this device, follow the reference schematic for the center-tap magnetic connection and place the 1.8V decoupling network close to the chip because the internal regulator powers the analog core. Verify that the SPI/I2C selection pin state matches firmware expectations at reset.
This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design notes not found on a single manufacturer product page.
Alternativas drop-in para KSZ8895RQ — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com KSZ8895RQ (mesmo formato e footprint) — diferindo em Package, Host Interface, Product Type, Management Interface, Number of Ports.
KSZ8895MQXI
✅ Drop-In ⚠️ Especificações não verificadasConsulte o preço
Ver ficha técnica →KSZ8895RQX
✅ Drop-In ⚠️ Especificações não verificadas📋 Alternativa de referência (fora do catálogo)
KSZ8895RQ-TR
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
KSZ8895ML
✅ Drop-In ⚠️ Especificações não verificadas📋 Alternativa de referência (fora do catálogo)
W5100
✅ Drop-InConsulte o preço
Ver ficha técnica →KSZ8895RQ Especificações (publicadas pelo fabricante)
| Product Type | Ethernet Switch IC |
| Switch Architecture | Layer-2 Managed Store-and-Forward |
| Number of Ports | 5 (10/100BASE-T/TX) |
| Integrated PHYs | 5 transceivers with HP auto-MDI/MDIX |
| Host Interface | MII / RMII |
| Management Interface | SPI, I2C, MDIO |
| Supply Voltage Range | 1.14 V to 3.465 V (min/max per datasheet) |
| Typical Operating Voltage | 3.3 V |
| Encapsulamento | 128-pin PQFP (14 mm x 20 mm) |
| Tipo de montagem | Surface Mount |
| Status RoHS | Compliant |
| Cable Diagnostics | LinkMD cable diagnostic support |
| Energy Efficient Ethernet | Supported |
Configuração de pinos do KSZ8895RQ
| Pino 1 | VDDIO — Digital I/O supply (3.3V) |
| Pino 2 | VDD — Analog supply input / core supply |
| Pino 3 | GND — Ground |
| Pino 4 | RESETn — Active-low hardware reset |
| Pino 5 | CONFIG[0] — Strap configuration - MII/RMII mode select |
| Pino 6 | CONFIG[1] — Strap configuration - PHY mode select |
| Pino 7 | CONFIG[2] — Strap configuration - host interface select |
| Pino 8 | SPIQ — SPI data out / SPI configuration strap |
| Pino 9 | SPIC — SPI chip select (active low) |
| Pino 10 | SPID — SPI data in |
| Pino 11 | SPICLK — SPI clock |
| Pino 12 | I2CSDA — I2C data (for switch management) |
| Pino 13 | I2CSCL — I2C clock (for switch management) |
| Pino 14 | MDC — Management clock (MDIO) |
| Pino 15 | MDIO — Management data I/O (MDIO) |
| Pino 16 | LED1_1 — Port 1 Link/Activity LED |
| Pino 17 | LED1_2 — Port 1 Speed LED |
| Pino 18 | GND — Ground |
| Pino 19 | TXRXP1A — Port 1 MDI differential pair A (positive) |
| Pino 20 | TXRXN1A — Port 1 MDI differential pair A (negative) |
| Pino 21 | TXD2_1 — Port 1 differential pair 2 positive |
| Pino 22 | TXD2_1n — Port 1 differential pair 2 negative |
| Pino 23 | VDD — Analog supply |
| Pino 24 | GND — Ground |
| Pino 25 | TXRP2 — Port 2 MDI pair positive |
| Pino 26 | TXRXN2 — Port 2 MDI pair negative |
| Pino 27 | TXD2_2 — Port 2 pair 2 positive |
| Pino 28 | TXD2_2n — Port 2 pair 2 negative |
| Pino 29 | GND — Ground |
| Pino 30 | VDD — Analog supply |
| Pino 31 | TXRP3 — Port 3 MDI pair positive |
| Pino 32 | TXRXN3 — Port 3 MDI pair negative |
| Pino 33 | TXD2_3 — Port 3 pair 2 positive |
| Pino 34 | TXD2_3n — Port 3 pair 2 negative |
| Pino 35 | GND — Ground |
| Pino 36 | VDD — Analog supply |
| Pino 37 | TXRP4 — Port 4 MDI pair positive |
| Pino 38 | TXRXN4 — Port 4 MDI pair negative |
| Pino 39 | TXD2_4 — Port 4 pair 2 positive |
| Pino 40 | TXD2_4n — Port 4 pair 2 negative |
| Pino 41 | GND — Ground |
| Pino 42 | VDD — Analog supply |
| Pino 43 | TXRP5 — Port 5 MDI pair positive |
| Pino 44 | TXRXN5 — Port 5 MDI pair negative |
| Pino 45 | TXD2_5 — Port 5 pair 2 positive |
| Pino 46 | TXD2_5n — Port 5 pair 2 negative |
| Pino 47 | GND — Ground |
| Pino 48 | VDDCORE — Internal LDO output - 1.8V core (decoupling cap node) |
| Pino 49 | GND — Ground |
| Pino 50 | RXD3 — MII/RMII Receive Data bit 3 / not used in RMII |
| Pino 51 | RXD2 — MII/RMII Receive Data bit 2 / not used in RMII |
| Pino 52 | RXD1 — MII/RMII Receive Data bit 1 / CRSDV in RMII mode |
| Pino 53 | RXD0 — MII/RMII Receive Data bit 0 / RXER in RMII mode |
| Pino 54 | RXER — MII receive error / not used in RMII |
| Pino 55 | RXDV — MII receive data valid / CRSDV in RMII mode |
| Pino 56 | RXCLK — MII receive clock |
| Pino 57 | COL — MII collision detect |
| Pino 58 | TXCLK — MII transmit clock |
| Pino 59 | TXEN — MII transmit enable |
| Pino 60 | TXD0 — MII transmit data bit 0 / TXD0 in RMII |
| Pino 61 | TXD1 — MII transmit data bit 1 / TXD1 in RMII |
| Pino 62 | TXD2 — MII transmit data bit 2 / not used in RMII |
| Pino 63 | TXD3 — MII transmit data bit 3 / not used in RMII |
| Pino 64 | CRS — MII carrier sense / not used in RMII |
| Pino 65 | NC — Not connected (per datasheet) |
| Pino 66 | NC — Not connected (per datasheet) |
| Pino 67 | NC — Not connected (per datasheet) |
| Pino 68 | NC — Not connected (per datasheet) |
| Pino 69 | NC — Not connected (per datasheet) |
| Pino 70 | NC — Not connected (per datasheet) |
| Pino 71 | NC — Not connected (per datasheet) |
| Pino 72 | NC — Not connected (per datasheet) |
| Pino 73 | NC — Not connected (per datasheet) |
| Pino 74 | NC — Not connected (per datasheet) |
| Pino 75 | NC — Not connected (per datasheet) |
| Pino 76 | NC — Not connected (per datasheet) |
| Pino 77 | NC — Not connected (per datasheet) |
| Pino 78 | NC — Not connected (per datasheet) |
| Pino 79 | NC — Not connected (per datasheet) |
| Pino 80 | NC — Not connected (per datasheet) |
| Pino 81 | NC — Not connected (per datasheet) |
| Pino 82 | NC — Not connected (per datasheet) |
| Pino 83 | NC — Not connected (per datasheet) |
| Pino 84 | NC — Not connected (per datasheet) |
| Pino 85 | NC — Not connected (per datasheet) |
| Pino 86 | NC — Not connected (per datasheet) |
| Pino 87 | NC — Not connected (per datasheet) |
| Pino 88 | NC — Not connected (per datasheet) |
| Pino 89 | NC — Not connected (per datasheet) |
| Pino 90 | NC — Not connected (per datasheet) |
| Pino 91 | NC — Not connected (per datasheet) |
| Pino 92 | NC — Not connected (per datasheet) |
| Pino 93 | NC — Not connected (per datasheet) |
| Pino 94 | NC — Not connected (per datasheet) |
| Pino 95 | NC — Not connected (per datasheet) |
| Pino 96 | NC — Not connected (per datasheet) |
| Pino 97 | NC — Not connected (per datasheet) |
| Pino 98 | NC — Not connected (per datasheet) |
| Pino 99 | NC — Not connected (per datasheet) |
| Pino 100 | NC — Not connected (per datasheet) |
| Pino 101 | NC — Not connected (per datasheet) |
| Pino 102 | NC — Not connected (per datasheet) |
| Pino 103 | NC — Not connected (per datasheet) |
| Pino 104 | NC — Not connected (per datasheet) |
| Pino 105 | NC — Not connected (per datasheet) |
| Pino 106 | NC — Not connected (per datasheet) |
| Pino 107 | NC — Not connected (per datasheet) |
| Pino 108 | NC — Not connected (per datasheet) |
| Pino 109 | NC — Not connected (per datasheet) |
| Pino 110 | NC — Not connected (per datasheet) |
| Pino 111 | NC — Not connected (per datasheet) |
| Pino 112 | NC — Not connected (per datasheet) |
| Pino 113 | NC — Not connected (per datasheet) |
| Pino 114 | NC — Not connected (per datasheet) |
| Pino 115 | NC — Not connected (per datasheet) |
| Pino 116 | NC — Not connected (per datasheet) |
| Pino 117 | NC — Not connected (per datasheet) |
| Pino 118 | NC — Not connected (per datasheet) |
| Pino 119 | NC — Not connected (per datasheet) |
| Pino 120 | NC — Not connected (per datasheet) |
| Pino 121 | LED2_1 — Port 1 secondary LED / optional |
| Pino 122 | NC — Not connected (per datasheet) |
| Pino 123 | NC — Not connected (per datasheet) |
| Pino 124 | NC — Not connected (per datasheet) |
| Pino 125 | NC — Not connected (per datasheet) |
| Pino 126 | NC — Not connected (per datasheet) |
| Pino 127 | GND — Ground |
| Pino 128 | VDDIO — Digital I/O supply (3.3V) |
Características de potência e térmicas
| Entrada de Potência | 1.14 V to 3.465 V (min/max per datasheet) |
Parâmetros de entrada de potência e térmicos para KSZ8895RQ, conforme publicados pelo fabricante.
Aplicações típicas
KSZ8895RQ é adequado para 6 aplicaçãos: Industrial Ethernet Switch, IP Surveillance Camera / NVR, Broadband CPE Router, Automotive Ethernet Backbone (using family MQI variant), Smart Home / IoT Gateway, Embedded Networking Port Expansion.
Industrial Ethernet Switch
The KSZ8895RQ's five-port 10/100BASE-TX Layer-2 managed switch architecture makes it a natural fit for compact industrial Ethernet switches used in factory automation cells. Each of the five integrated PHYs delivers non-blocking wire-speed throughput while HP auto-MDI/MDIX eliminates the need for cross-over cables in field installations. The integrated 802.1Q VLAN and 802.1p QoS provide traffic segregation needed to keep motion-control traffic isolated from diagnostics traffic. Power consumption stays low across the 3.3V supply, suiting fanless DIN-rail enclosures. Companion part suggestions from Microchip include the LAN9252 for EtherCAT slaves and the KSZ9477STXI when 1G uplinks are needed.
Recomendado
IP Surveillance Camera / NVR
The KSZ8895RQ is widely used in IP cameras and NVR (network video recorder) designs that require five Ethernet ports on a single board, providing dedicated bandwidth streams to each camera while supporting VLAN tagging to keep each video stream on its own multicast domain. Its LinkMD cable diagnostic feature helps installers identify cable faults by reporting cable length directly from the chip, simplifying field maintenance. The integrated switch fabric and per-port QoS ensure zero packet loss even when multiple high-bitrate H.264/H.265 streams are active. Power dissipation remains modest thanks to energy-efficient Ethernet modes that disable PHYs during link-down.
Recomendado
Broadband CPE Router
In broadband customer-premises equipment (CPE) such as xDSL or fiber ONT gateways, the KSZ8895RQ provides the LAN-side four-port 10/100 switch plus a fifth port dedicated to the WAN-facing SoC's MII/RMII interface. The 5-port density is a sweet spot that fits the four-port CPE requirement plus an SoC connection without adding a discrete 5-port PHY. QoS prioritization supports the data/voice/video service classes used in triple-play offerings. The SPI/I2C management interface lets the host processor set port-based rate limits and VLANs without external switching logic. The part's 3.3V operation eliminates the need for a second regulator rail on the LAN side.
Recomendado
Automotive Ethernet Backbone (using family MQI variant)
Within the KSZ8895 family the AEC-Q100-qualified MQI/RQI variants are used in automotive backbone switches for infotainment, ADAS, and gateway ECUs. The switch provides deterministic 10/100 forwarding for time-critical in-vehicle networks, supporting up to five Ethernet nodes per switch block. While the KSZ8895RQ is the industrial-grade PQFP variant, the same silicon underpins the MQI/RQI automotive grades - enabling automotive design teams to prototype with industrial parts and migrate to qualified variants for production. Per-port VLAN tagging isolates domain traffic between safety-critical and non-safety-critical buses.
Smart Home / IoT Gateway
Smart home gateways often need to interconnect wired sensors, cameras, and cloud uplinks; the KSZ8895RQ gives designers a single 5-port switch with managed features on a tight PCB budget. The integrated PHYs support direct transformer connection with HP auto-MDI/MDIX, removing the need for cross-over cables when homeowners patch in new devices. Low standby power makes the part suitable for always-on gateways, and energy-efficient Ethernet (EEE) reduces link-down power. The device's SPI management interface allows the host processor to implement per-port firewall rules, MAC filtering, and VLAN assignment via simple register writes.
Recomendado
Embedded Networking Port Expansion
The KSZ8895RQ is commonly used as a port-expansion switch attached to ARM SoCs or microcontrollers that have only one or two built-in Ethernet MACs. Through the MII or RMII interface, the host MAC gains seamless access to four additional physical ports without redesigning the host's networking stack. This is particularly valuable when designing industrial gateways, edge controllers, or test instruments where field installation requires multiple Ethernet test access points. The same MDIO/SPI register model used across Microchip's KSZ switch family eases firmware reuse.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para KSZ8895RQ — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | KSZ8895MQX | KSZ8895RQX | KSZ8895RQ-TR | KSZ8895ML | W5100 |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | WIZnet |
| Package | 128-pin PQFP (14x20 mm) | 128-pin PQFP (14x20) family package | 128-pin PQFP (14x20) | 128-pin PQFP (14x20) | 128-pin PQFP (14x20) family package | 128-pin PQFP (14x20) |
| Number of Ports | 5 | 5 | 5 | 5 | 5 | TCP/IP stack-based equivalent |
| Ethernet Speed | 10/100BASE-T/TX | 10/100BASE-T/TX | 10/100BASE-T/TX | 10/100BASE-T/TX | 10/100BASE-T/TX | 10/100 with hardwired TCP/IP |
| Host Interface | MII / RMII | MII / RMII | MII / RMII | MII / RMII | MII / RMII | SPI / Parallel bus |
| Automotive Grade | No (industrial) | Yes (AEC-Q100) | No (industrial) | No (industrial, T&R) | No (industrial) | No |
| Management Interface | SPI, I2C, MDIO | SPI, I2C, MDIO | SPI, I2C, MDIO | SPI, I2C, MDIO | SPI, I2C, MDIO | SPI host register access |
| Switch Architecture | Layer-2 managed store-and-forward | Layer-2 managed store-and-forward | Layer-2 managed store-and-forward | Layer-2 managed store-and-forward | Layer-2 managed store-and-forward | Hardwired TCP/IP stack + PHY |
Principais diferenciais
- Layer-2 managed feature set in a single chip (vs W5100)
- Five integrated 10/100 PHYs (vs LAN9252)
- Same silicon architecture across package variants (vs KSZ8895MQX)
Notas de projeto
Per the manufacturer datasheet and reference schematic, place the 1.8V core decoupling capacitor (typically 1uF X7R) within 2 mm of the VDDCORE pin to stabilize the internal LDO. Keep each MDI differential pair length-matched within 200 mil and route with 100-ohm differential impedance to the magnetics. Use solid ground pours under the device to provide low-impedance return paths for switch currents and to dissipate heat from the package body.
Estimate based on datasheet recommendations: at 3.3V supply and 100 Mbit/s full-load on five ports, expect ~1W typical dissipation. Calculate per-port transformer center-tap current with a 1.4 ohm termination for the bias circuit. For unused ports, leave the MDI pairs floating and disable the port via SPI register to save energy. The strap configuration pins (CONFIG[2:0]) set MII/RMII mode and must be held stable during reset via weak pull-ups or pull-downs.
Common pitfalls on KSZ8895RQ designs include (1) leaving strap pin CONFIG states floating so the device boots in the wrong host interface mode, (2) missing the parallel 10uF+100nF decoupling combination across VDD/VDDIO (use ceramic X7R, not Y5V), (3) using unbalanced current on the MDI center tap which corrupts LinkMD cable diagnostics, and (4) forgetting to issue the SPI 'soft-reset-complete' poll before accessing the register map. Always force-link-down all ports before firmware uploads to avoid packet storms during bring-up.
Informações de conformidade
Industrial grade KSZ8895RQ is RoHS compliant. AEC-Q100 qualification applies to the MQI/RQI family variants, not the RQ - select MQI/RQI for automotive. Halogen-free status not explicitly stated in extracted web data.
