MAX122BC/D - 500ksps 12-Bit SAR ADC Die | Maxim Integrated
N.º da peça: MAX122BC/D ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $32.5 | $32,50 |
| 10 | $29.2 | $292,00 |
| 100 | $25.8 | $2.580,00 |
| 500 | $22.4 | $11.200,00 |
| 1.000 | $19.75 | $19.750,00 |
MAX122BC/D Visão geral
An ADC (analog-to-digital converter) is a data-acquisition mixed-signal IC that samples continuous analog input voltages and converts them into discrete digital codes at a defined sample rate. SAR (Successive Approximation Register) ADCs sit in the middle of the speed-resolution envelope, offering 8-16 bit accuracy at sample rates from tens of ksps to several Msps, making them the workhorse for industrial process control, instrumentation, and DSP front-ends. The MAX122BC/D fits within the broader hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor. Its integrated reference and track/hold shorten the analog signal chain to a single IC, eliminating the layout and noise pitfalls of a discrete SAR plus external reference plus external T/H design.
Key specifications include a 500 ksps maximum sample rate, 350 ns track/hold acquisition time, 12-bit no-missing-codes resolution, and a built-in 2.5 V low-drift reference. The BiCMOS process combines bipolar front-end accuracy with CMOS digital logic for low power consumption (typically 70 mW at full speed). Parallel output bus and byte-organized read modes simplify connection to most popular microprocessors without wait states, and a FIFO-buffered interface mode minimizes microprocessor interrupt overhead in continuous-acquisition systems.
Typical applications for the MAX122BC/D include digital signal processing front-ends, audio-bandwidth data acquisition, speech-recognition subsystems, and high-speed industrial process control where die-level integration enables ruggedized or miniaturized modules. The internal reference and T/H eliminate many external components, but careful attention to PCB ground planes and analog/digital isolation is required to realize the full 12-bit accuracy, particularly in the unpackaged die variant where bond-wire inductance and die-pad capacitance dominate high-frequency behavior.
Engineers should treat the /D (die) form factor as a specialty hybrid-assembly part: bond-out diagrams, die pad coordinates, and ESD handling protocols must be sourced from the manufacturer datasheet before any assembly run. Sampling window and acquisition time trade-offs apply as with any SAR ADC - reducing clock rate or adding a front-end buffer amplifier relaxes the input drive requirements but increases aperture uncertainty. This page synthesizes distributor pricing, drop-in same-family alternatives, and practical design notes not consolidated in the manufacturer datasheet.
Alternativas drop-in para MAX122BC/D — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
MAX120BC/D
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
MAX122BC/D-H
✅ Drop-In ⚠️ Especificações não verificadas📋 Alternativa de referência (fora do catálogo)
MAX122BCAP+
✅ Drop-In ⚠️ Especificações não verificadas📋 Alternativa de referência (fora do catálogo)
MAX122ACAG+T
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
MAX120BCAP+
✅ Drop-In ⚠️ Especificações não verificadas📋 Alternativa de referência (fora do catálogo)
MAX120BCAG+
✅ Drop-In ⚠️ Especificações não verificadas📋 Alternativa de referência (fora do catálogo)
MAX122BC/D Classificações máximas e características elétricas
| Resolução | 12 bit |
| Number of Channels | 1 |
| Architecture | SAR (Successive Approximation) |
| Sample Rate | 500 ksps |
| Track/Hold Acquisition Time | 350 ns |
| Input Type | Single-ended |
| Data Interface | Parallel (byte-organized modes) |
| On-Chip Reference | Yes, internal low-drift reference |
| Track/Hold | Yes, on-chip |
| Process Technology | BiCMOS |
| Number of Terminals | 24 |
| Package Code | DIE (unpackaged bare die) |
| Package Shape | Rectangular |
| Terminal Form | No lead (bond pads) |
| Temperature Grade | Commercial |
| Tipo de montagem | Die / hybrid assembly |
Guia de Configuração de Pinos do MAX122BC/D rectangular
Configuração de pinos para MAX122BC/D (pacote rectangular). Este componente analógico possui pinos de entrada, saída e alimentação. Consulte o datasheet do fabricante para configurações de offset null, compensação e pino de enable. Ideal para circuitos de condicionamento de sinal e amplificadores.
Nenhum dado detalhado de pinagem disponível para MAX122BC/D.
Consulte a ficha técnica para a configuração completa dos pinos.
Aplicações típicas
MAX122BC/D é adequado para 6 aplicaçãos: Digital Signal Processing Front-End, Audio-Bandwidth Data Acquisition, Speech Recognition Subsystem, Industrial Process Control Loop, Hybrid Microcircuit Instrumentation Module, Portable / Battery-Powered Data Logger.
Digital Signal Processing Front-End
The MAX122BC/D's 500 ksps sample rate and 12-bit SAR architecture feed DSP engines (e.g., TMS320 family, ADSP-21xx) with digitized analog signals at audio and baseband frequencies. The internal track/hold with 350 ns acquisition eliminates external T/H circuitry, simplifying the analog front-end, while the parallel byte-organized interface presents conversion results in a single read cycle without wait states - critical for DSP interrupt latency budgets. The bare-die form factor is ideal when the DSP module must be miniaturized into a hybrid microcircuit, such as in avionics or portable instrumentation. Compared to discrete SAR+reference+T/H designs, the integrated MAX122BC/D shrinks the BOM and reduces ground-loop noise by 6-10 dB. Use proper analog/digital ground partitioning and bypass the internal reference with a 10 uF tantalum plus 0.1 uF ceramic to realize full 12-bit INL/DNL.
Recomendado
Audio-Bandwidth Data Acquisition
The MAX122BC/D samples at 500 ksps - well above the 44.1 kHz Nyquist rate of CD-quality audio - and provides 12-bit resolution suitable for professional audio metering, spectrum analysis front-ends, and digital mixing consoles. The internal low-drift reference (typically 2.5 V buried-zener) stabilizes the conversion gain over temperature, critical for maintaining audio channel-to-channel matching in multi-channel mixers. The BiCMOS architecture achieves 70 mW typical power consumption at full speed, acceptable for portable recording equipment. The bare-die form factor suits miniaturized audio modules where PCB real estate is at a premium. Add an input anti-alias filter (typically 4th-order Butterworth) ahead of the ADC to preserve SNR; for a 20 kHz audio bandwidth, set the filter corner to 22 kHz with -3 dB attenuation at the Nyquist rate.
Recomendado
Speech Recognition Subsystem
Speech recognition front-ends sample microphone audio at 8-16 kHz with 12-bit resolution, well within the MAX122BC/D's 500 ksps envelope. The internal reference and track/hold keep the analog front-end compact, critical for handheld or wearable speech-recognition products where PCB area and BOM count are constrained. The byte-organized parallel interface simplifies connection to speech-recognition DSPs and microcontrollers, allowing conversion results to be DMA-streamed without processor overhead. The bare-die form factor supports chip-on-flex assembly for headset-mounted speech modules, while the MAX122BCAG+ SSOP-24 sibling supports PCB-based reference designs. Add an electret microphone preamplifier with 40 dB gain ahead of the ADC to bring typical voice levels into the ADC's 0-2.5 V input range with 10 dB of headroom.
Recomendado
Industrial Process Control Loop
Industrial process control loops (temperature, pressure, flow) sample sensor signals at 100-1000 Hz with 12-bit resolution adequate for closed-loop PID control - squarely within the MAX122BC/D's bandwidth envelope. The internal low-drift reference stabilizes the conversion gain against industrial temperature swings (typically -40C to +85C at the enclosure), eliminating the periodic recalibration required with external-reference SAR designs. The parallel interface and FIFO-buffered mode minimize host microprocessor interrupt overhead, critical for PLC scan-time budgets. The bare-die form factor suits ruggedized industrial sensors with hermetic packaging. Add a 4-20 mA current-loop input conditioner or a thermocouple cold-junction compensation circuit ahead of the ADC depending on the sensor type.
Recomendado
Hybrid Microcircuit Instrumentation Module
The MAX122BC/D's unpackaged die form factor (24 bond-pad terminals in a rectangular pattern) is specifically designed for hybrid microcircuit (HMC) assembly, where the bare die is bonded directly to a ceramic substrate alongside other ICs and passive components in a hermetic package. This assembly style is standard for military, aerospace, and down-hole oil and gas instrumentation where PCB-based assemblies cannot withstand shock, temperature, or vacuum exposure. The MAX122BC/D's internal reference eliminates one external component from the hybrid bill of materials, and the BiCMOS process yields high reliability and low power consumption at the operating temperatures typical of these applications. Plan the bond-wire layout to keep analog inputs short and isolated from the parallel digital bus to maintain 12-bit accuracy.
Recomendado
Portable / Battery-Powered Data Logger
Battery-powered data loggers (handheld multimeters, environmental monitors, portable medical instruments) benefit from the MAX122BC/D's 70 mW typical power consumption at full speed and its ability to enter a low-power standby mode between conversions. The internal reference and track/hold shrink the analog front-end to a few square millimeters, supporting miniaturized form factors, while the 500 ksps sample rate enables high-bandwidth transient capture as well as slower streaming logging. The bare-die form factor is ideal for chip-on-board (COB) assembly inside sealed battery compartments. Power-down sequencing between conversions can extend battery life by 10x to 50x; use the SAR's CONVST pin to gate conversions and return to standby when not sampling. Include reverse-polarity and overvoltage protection on the input to survive field-misuse conditions.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para MAX122BC/D — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | MAX120BC/D | MAX122BC/D-H | MAX122BCAG+ | MAX122ACAG+T | MAX120BCAP+ |
|---|---|---|---|---|---|---|
| Brand | Analog Devices / Maxim Integrated | Analog Devices / Maxim Integrated | Analog Devices / Maxim Integrated | Analog Devices / Maxim Integrated | Analog Devices / Maxim Integrated | Analog Devices / Maxim Integrated |
| Package | DIE (24 bond pads, unpackaged) | DIE (24 bond pads) - same | DIE (24 bond pads) - same | SSOP-24 - different (PCB-mountable) | SSOP-24 - different (PCB-mountable) | SSOP-24 - different (PCB-mountable) |
| Resolution | 12 bit | 12 bit | 12 bit | 12 bit | 12 bit | 12 bit |
| Sample Rate | 500 ksps | 500 ksps | 500 ksps | 500 ksps | 500 ksps | 500 ksps |
| Architecture | SAR with internal T/H and reference | SAR with internal T/H and reference | SAR with internal T/H and reference | SAR with internal T/H and reference | SAR with internal T/H and reference | SAR with internal T/H and reference |
| Linearity Grade | /B-grade (higher linearity) | /B-grade | /B-grade | /B-grade | /A-grade (lower linearity, lower cost) | /A-grade (lower linearity, lower cost) |
| Mounting Type | Die / hybrid microcircuit assembly | Die / hybrid microcircuit assembly | Die / hybrid microcircuit assembly | Surface Mount (SSOP-24) | Surface Mount (SSOP-24) | Surface Mount (SSOP-24) |
Principais diferenciais
- Bare-die form factor for hybrid microcircuit assembly (vs MAX122BCAG+ (SSOP-24))
- Higher /B-grade linearity vs /A-grade siblings (vs MAX122ACAG+T (/A-grade))
- Integrated track/hold and internal voltage reference (vs Discrete SAR + external T/H + external reference designs)
- Byte-organized parallel interface without wait states (vs Serial-interface ADCs at the same sample rate)
Notas de projeto
Estimated: bare-die assembly requires a cleanroom or laminar-flow hood with ESD-safe handling - the MAX122BC/D has no package to protect its bond pads, so storage in nitrogen-purged waffle packs is mandatory until bond-out. Touching the die surface contaminates the pads and degrades bond-wire adhesion. Use vacuum pick-up tools only, never mechanical tweezers, and ground the operator via a wrist strap to less than 1 Mohm. Failure to follow ESD protocols is the single most common cause of bare-die yield loss.
Estimated: when bonding the MAX122BC/D into a hybrid microcircuit substrate, route the analog input bond wire as short as possible (less than 2 mm) to minimize inductance and capacitance pickup from adjacent digital bond wires. The internal reference pad must be decoupled with a 10 uF X7R ceramic plus a 0.1 uF NP0 ceramic on the substrate, placed within 1 mm of the reference bond pad. The analog and digital ground pads should connect to separate substrate ground planes joined only at the die's analog/digital ground pad, not at the package pinout.
Estimated: to realize full 12-bit INL/DNL, the input source impedance should be less than 500 ohms at the ADC's 350 ns acquisition window. Higher source impedance increases aperture uncertainty and degrades linearity. Add an input buffer amplifier (e.g., a low-offset op-amp with less than 1 nA input bias current) within 5 mm of the analog input pad if the source impedance exceeds 500 ohms. Keep the analog input trace routed away from the parallel digital bus, ideally with a ground-fill guard trace on both sides to minimize digital crosstalk.
Estimated: the MAX122BC/D dissipates approximately 70 mW at full 500 ksps sample rate. In a hybrid microcircuit sealed package with no convective cooling, this heat must conduct through the substrate to the module chassis. Ensure the die-attach epoxy provides a thermal resistance of less than 5 C/W to the substrate, and avoid stacking heat-generating components within 3 mm of the ADC die. For continuous full-speed operation, the substrate temperature should remain below 70C to keep the junction within the commercial 0C to +70C range with adequate margin.
When prototyping the MAX122BC/D design, use the MAX122BCAG+ SSOP-24 surface-mount variant on a PCB validation rig, since it shares the same silicon and internal reference. This avoids the cost and complexity of a hybrid microcircuit build during development. Once the analog front-end is verified on the SSOP-24 version, port the verified design to the bare-die assembly for the final hybrid module. Include 0.1 ohm sense resistors on the power rails to monitor supply current during the transition, and verify that the SSOP-24 and die versions behave identically on the bench.
Informações de conformidade
Bare-die form factor (DIE package) - compliance status for RoHS, REACH, halogen-free, and conflict minerals not specified in the verified distributor data; engineering buyers should request a Certificate of Compliance from Maxim Integrated / Analog Devices for production orders. ATE material is lead-free (gold bond pads and silicon die). Not AEC-Q100 qualified - this is a commercial-grade part.
