PIC18LF66K80T-I/PT - 64KB Flash, 64MHz 8-bit MCU | Microchip
N.º da peça: PIC18LF66K80T-I/PT ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $6.5 | $6,50 |
| 10 | $5.85 | $58,50 |
| 100 | $5.2 | $520,00 |
| 500 | $4.65 | $2.325,00 |
| 1.000 | $4.1 | $4.100,00 |
PIC18LF66K80T-I/PT Visão geral
An 8-bit PIC microcontroller is a Harvard-architecture RISC device with separate program and data buses, optimized for deterministic interrupt response and low-power operation. It belongs to the broader category of microcontrollers -> microcontrollers (MCU) -> integrated circuits, and is part of the Microchip PIC18F "K80" family which adds an automotive-grade CAN peripheral to the standard PIC18 instruction set. This places the part in a hierarchy of MCU -> 8-bit MCU -> PIC18 -> PIC18F66K80 family.
Key features of the PIC18LF66K80T-I/PT include nanoWatt XLP sleep currents as low as sub-1µA in deep sleep, 64KB self-programmable Flash with 1KB EEPROM, 4KB SRAM, two Enhanced USART modules, two MSSP (SPI/I2C) peripherals, an Enhanced CAN 2.0B module, an 8-channel 12-bit ADC, CTMU for capacitive touch or precise time measurement, and a 16-bit timer/counter. The 64-pin TQFP provides up to 53 digital I/O pins, suiting complex peripheral-rich designs.
The architecture combines a RISC core with C-compiler-friendly instructions, dual-bus Harvard memory, and configurable peripherals routed through Peripheral Pin Select (PPS), simplifying PCB layout. The integrated ECAN 2.0B controller offloads CAN protocol handling from the CPU, enabling deterministic real-time automotive and industrial networking. The CTMU adds hardware-timed current sources for cap-touch, IR remote decoding, or temperature compensation without external analog circuitry.
Typical applications include automotive body and comfort networks (CAN nodes, BCM), industrial CAN-bus sensor hubs, low-power battery telemetry devices, HVAC controller boards, and ECAN-controlled lighting controllers. The wide voltage range and nanoWatt XLP sleep currents also suit handheld instrumentation where standby life on a single CR2032 cell is critical.
When designing with this MCU, plan I/O and PPS assignments before PCB layout because PPS mappings are not reversible on hardware. Decouple VDD/VSS pairs with at least 100nF ceramic capacitors close to each pin pair, and place the ECAN bus transceiver's split termination within 10mm of the bus pins to meet CAN signal-integrity requirements.
Alternativas drop-in para PIC18LF66K80T-I/PT — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com PIC18LF66K80T-I/PT (mesmo formato e footprint) — diferindo em Package, ADC, Communication Peripherals, Mounting Type, Data EEPROM.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
PIC18LF46K80T-I/PT
✅ Drop-In✓ Em estoque
$4.05 / unidade
Ver ficha técnica →PIC18F66K80T-I/PT
✅ Drop-In✓ Em estoque
$4.65 / unidade
Ver ficha técnica →PIC18LF66K80-I/PT
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
PIC18LF47K40T-I/PT
✅ Drop-In✓ Em estoque
$2.46 / unidade
Ver ficha técnica →PIC18LF66K80T-I/PT Classificações máximas e características elétricas
| Core | PIC18 8-bit RISC, Harvard architecture |
| Program Memory (Flash) | 64 KB (32K x 16) |
| Data EEPROM | 1 KB |
| SRAM | 4 KB |
| Maximum CPU Speed | 64 MHz (16 MIPS) |
| Supply Voltage (VDD) | 1.8 V to 5.5 V |
| Temperatura de operação | -40 C to +85 C (Industrial, 'I') |
| Encapsulamento | 64-pin TQFP (PT), 10 x 10 x 1 mm |
| Tipo de montagem | Surface Mount, Tape & Reel ('T') |
| I/O Pins | Up to 53 (multi-tasked) |
| ADC | 12-bit, 8 channels |
| CAN Module | ECAN 2.0B active |
| Communication Peripherals | 2x EUSART, 2x MSSP (SPI/I2C) |
| Timers | 16-bit and 8-bit, plus CTMU |
| Low-Power Technology | nanoWatt XLP |
| Status RoHS | Compliant |
Configuração de pinos do PIC18LF66K80T-I/PT
| Pino 1 | RC0 — Digital I/O / PWM1 / T3CKI |
| Pino 2 | RC1 — Digital I/O / CCP2 / T2CKI |
| Pino 3 | RC2 — Digital I/O / AN14 / CTMUI |
| Pino 4 | RC3 — Digital I/O / SCL1 / AN15 |
| Pino 5 | RC4 — Digital I/O / SDA1 |
| Pino 6 | RC5 — Digital I/O / SDO1 |
| Pino 7 | RC6 — Digital I/O / TX1 |
| Pino 8 | RC7 — Digital I/O / RX1 |
| Pino 9 | RE0 — Digital I/O / AN5 |
| Pino 10 | RE1 — Digital I/O / AN6 |
| Pino 11 | RE2 — Digital I/O / AN7 |
| Pino 12 | RE3 — Digital I/O |
| Pino 13 | AVDD — Analog supply |
| Pino 14 | AVSS — Analog ground |
| Pino 15 | RA0 — Digital I/O / AN0 / ULPWU |
| Pino 16 | RA1 — Digital I/O / AN1 |
| Pino 17 | RA2 — Digital I/O / AN2 / VREF- |
| Pino 18 | RA3 — Digital I/O / AN3 / VREF+ |
| Pino 19 | RA4 — Digital I/O / T0CKI |
| Pino 20 | RA5 — Digital I/O / AN4 / SS1 |
| Pino 21 | VDD — Digital supply (1.8-5.5 V) |
| Pino 22 | VSS — Digital ground |
| Pino 23 | RA6 — Digital I/O / OSC2 |
| Pino 24 | RA7 — Digital I/O / OSC1 / CLKI |
| Pino 25 | RB0 — Digital I/O / INT0 / FLT0 |
| Pino 26 | RB1 — Digital I/O / INT1 |
| Pino 27 | RB2 — Digital I/O / INT2 / CANRX |
| Pino 28 | RB3 — Digital I/O / INT3 / CANTX |
| Pino 29 | RB4 — Digital I/O / KBI0 |
| Pino 30 | RB5 — Digital I/O / KBI1 / PGM |
| Pino 31 | RB6 — Digital I/O / KBI2 / PGC (ICSP clock) |
| Pino 32 | RB7 — Digital I/O / KBI3 / PGD (ICSP data) |
| Pino 33 | VDD — Digital supply |
| Pino 34 | VSS — Digital ground |
| Pino 35 | RD0 — Digital I/O / PSP0 |
| Pino 36 | RD1 — Digital I/O / PSP1 |
| Pino 37 | RD2 — Digital I/O / PSP2 |
| Pino 38 | RD3 — Digital I/O / PSP3 |
| Pino 39 | RD4 — Digital I/O / PSP4 / SDO2 |
| Pino 40 | RD5 — Digital I/O / PSP5 / SDI2 |
| Pino 41 | RD6 — Digital I/O / PSP6 / SCK2 |
| Pino 42 | RD7 — Digital I/O / PSP7 / SS2 |
| Pino 43 | VDDCORE — Internal core regulator output (10 µF cap) |
| Pino 44 | RF0 — Digital I/O / AN16 |
| Pino 45 | RF1 — Digital I/O / AN17 |
| Pino 46 | RF2 — Digital I/O / AN18 |
| Pino 47 | RF3 — Digital I/O / AN19 |
| Pino 48 | RF4 — Digital I/O / AN20 |
| Pino 49 | RF5 — Digital I/O / AN21 / C2OUT |
| Pino 50 | RF6 — Digital I/O / AN22 / C1OUT |
| Pino 51 | RF7 — Digital I/O / AN23 / SS3 |
| Pino 52 | RG0 — Digital I/O / CCP3 |
| Pino 53 | RG1 — Digital I/O / TX2 / CK2 |
| Pino 54 | RG2 — Digital I/O / RX2 / DT2 |
| Pino 55 | RG3 — Digital I/O / CCP4 |
| Pino 56 | RG4 — Digital I/O / CCP5 / T7CKI |
| Pino 57 | VDD — Digital supply |
| Pino 58 | VSS — Digital ground |
| Pino 59 | RH0 — Digital I/O / AN23 alt |
| Pino 60 | RH1 — Digital I/O |
| Pino 61 | RH2 — Digital I/O |
| Pino 62 | RH3 — Digital I/O |
| Pino 63 | MCLR — Master clear (reset, active low) |
| Pino 64 | NC — Not connected (per datasheet) |
Aplicações típicas
PIC18LF66K80T-I/PT é adequado para 6 aplicaçãos: Automotive CAN Body Control Nodes, Industrial CAN-Bus Sensor Hubs, Low-Power Battery Telemetry Devices, HVAC Climate Control Boards, ECAN-Controlled Lighting Controllers, Handheld Diagnostic Instruments.
Automotive CAN Body Control Nodes
The PIC18LF66K80T-I/PT is well suited for non-safety automotive body and comfort networks such as window lifters, mirror controllers, ambient lighting and seat modules. Its integrated ECAN 2.0B controller offloads CAN protocol filtering from the CPU, while the 64 MHz / 16 MIPS core easily handles the 500 kbps class-C CAN traffic typical of body networks. The 1.8 V to 5.5 V VDD range accommodates both 12 V-derived 5 V rails and 3.3 V sensor nodes, and the nanoWatt XLP sleep currents below 1 µA keep quiescent draw under 100 µA on parked vehicles.
Recomendado
Industrial CAN-Bus Sensor Hubs
For industrial sensor concentrators on CANopen or DeviceNet segments, the PIC18LF66K80T-I/PT combines the ECAN 2.0B controller with a 12-bit ADC and the CTMU for precise time-of-flight measurements. The 4 KB SRAM is sufficient for CANopen SDO buffering and cyclic PDO handling on a 1 Mbps bus, and the wide 1.8-5.5 V supply tolerates long industrial cables with significant ground-bounce. The 64-pin TQFP exposes up to 53 I/O, leaving headroom for digital sensors, keypad inputs and isolated UART pass-through to upstream PLCs.
Recomendado
Low-Power Battery Telemetry Devices
The PIC18LF66K80T-I/PT's nanoWatt XLP technology delivers sub-1 µA deep-sleep currents while RAM retention preserves context across wake events, ideal for battery telemetry sensors on a single CR2032 coin cell. The 64 KB Flash stores 30+ days of timestamped telemetry at 1 sample/minute, and the 12-bit ADC with CTMU drives battery voltage and temperature monitoring with no external analog ICs. The 1.8 V minimum VDD extends usable runtime below 2.0 V coin-cell cut-off, squeezing out an extra 20% of usable capacity compared to non-LF parts.
Recomendado
HVAC Climate Control Boards
In residential and light-commercial HVAC wall thermostats, the PIC18LF66K80T-I/PT drives the user interface (LCD + capacitive touch via CTMU), reads thermistor inputs through the 12-bit ADC, and communicates with indoor and outdoor units via ECAN or RS-485 through the EUSART. The 16 MIPS core easily runs proportional-integral control loops at 100 Hz with margin for UI graphics. Its wide 1.8-5.5 V supply accepts 24 VAC-derived 5 V rails directly without extra regulation.
Recomendado
ECAN-Controlled Lighting Controllers
Architectural and stage lighting controllers networked over CAN benefit from the PIC18LF66K80T-I/PT's ECAN 2.0B module and PWM-driven LED dimming. The 16-bit timers plus PWM mode generate up to 4 independent 16-bit PWM channels for flicker-free dimming down to 0.1% duty cycle, while 4 KB SRAM buffers DMX-over-CAN cue lists. The PPS-remappable EUSART also allows a parallel RS-485 DMX passthrough for hybrid DMX/CAN fixtures.
Recomendado
Handheld Diagnostic Instruments
Portable service tools and CAN bus analyzers benefit from the PIC18LF66K80T-I/PT's combination of ECAN 2.0B, USB-via-UART bridges, and sub-1 µA sleep for handheld battery life. The 64 KB Flash stores CANopen EDS profiles and OEM fault-code libraries, while the CTMU drives touch-button input on ruggedized keypads. The 1.8-5.5 V supply accepts single-cell Li-ion (4.2 V to 3.0 V) directly, eliminating boost regulators in slim-form-factor designs.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para PIC18LF66K80T-I/PT — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | PIC18LF46K80T-I/PT | PIC18F66K80T-I/PT | PIC18LF66K80-I/PT | PIC18LF47K40T-I/PT |
|---|---|---|---|---|---|
| Package | TQFP-64 (PT) 10x10 mm | TQFP-64 (PT) - same | TQFP-64 (PT) - same | TQFP-64 (PT) - same | TQFP-64 (PT) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Memory | 64 KB | 32 KB (-50%) | 64 KB (same) | 64 KB (same) | 128 KB (+100%) |
| SRAM | 4 KB | 4 KB (same) | 4 KB (same) | 4 KB (same) | 8 KB (+100%) |
| Min VDD | 1.8 V | 1.8 V (same) | 2.0 V (+11% floor) | 1.8 V (same) | 1.8 V (same) |
| CAN Module | ECAN 2.0B active | ECAN 2.0B active (same) | ECAN 2.0B active (same) | ECAN 2.0B active (same) | No CAN (K40 family) |
| Max CPU Speed | 64 MHz (16 MIPS) | 64 MHz (same) | 64 MHz (same) | 64 MHz (same) | 64 MHz (same) |
| Packaging | Tape & Reel | Tape & Reel | Tape & Reel | Tray | Tape & Reel |
| Operating Temp | -40 to +85 C | -40 to +85 C (same) | -40 to +85 C (same) | -40 to +85 C (same) | -40 to +85 C (same) |
Principais diferenciais
- Integrated ECAN 2.0B with deeper acceptance-filter FIFO than competing 8-bit MCUs (vs PIC18LF47K40T-I/PT)
- Lowest VDD in 64-pin K80 family at 1.8 V vs 2.0 V competitors (vs PIC18F66K80T-I/PT)
- Larger Flash (64 KB) than the pin-compatible 32 KB K80 variant (vs PIC18LF46K80T-I/PT)
Notas de projeto
Place a 100 nF ceramic decoupling capacitor within 5 mm of every VDD/VSS pin pair on the PIC18LF66K80T-I/PT. The TQFP-64 has four VDD/VSS pairs, plus a separate AVDD/AVSS for the ADC; each analog pair must have its own 100 nF + 10 µF bulk capacitor. The VDDCORE pin (43) requires a 10 µF low-ESR ceramic to ground; failure to provide this decoupling will cause erratic ECAN communication and ADC drift. Estimated: at 64 MHz the part draws ~15 mA typical and ~30 mA peak, so a 100 mA LDO budget is adequate.
Route the ECAN CANTX/CANRX pair (RB3/RB2) as a short differential-style 100 Ω-impedance trace to the MCP2551 or TJA1050 transceiver, with the transceiver's CANH/CANL bus pins routed through a split 60 Ω (30 Ω + 30 Ω + 4.7 nF) termination as per CAN bus standards. Keep the transceiver within 10 mm of the MCU and isolate the bus from switching converters by at least 20 mm. The ECAN bit-timing register values must be recalculated when changing FOSC from 64 MHz to a different oscillator; Microchip application note AN1079 provides a spreadsheet calculator for this.
The ICSP pins PGD (RB7) and PGC (RB6) double as KBI3/KBI2 and may be repurposed in firmware via PPS; if your firmware reassigns these pins the in-circuit debugger will lose contact. Always reserve PGD/PGC in their default pin positions for programming and only move them with PPS on a design that exposes both default and remapped functions. The MCLR pin (64) cannot be disabled by software but can be configured as an input-only GPIO on K80-family parts; do not leave MCLR floating - tie it to VDD through a 10 kΩ pull-up for normal operation.
Informações de conformidade
RoHS and REACH compliant per Microchip product page; the 'I' grade (-40 to +85 C) is industrial, not AEC-Q100 qualified - choose PIC18F66K80-E/PT variants for automotive.
