PIC24FJ64GA110-I/PF - 16-bit MCU, 64KB Flash, 100-TQFP | Microchip
N.º da peça: PIC24FJ64GA110-I/PF ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $9.86 | $9,86 |
| 10 | $8.91 | $89,10 |
| 100 | $7.62 | $762,00 |
| 500 | $6.85 | $3.425,00 |
| 1.000 | $6.1 | $6.100,00 |
PIC24FJ64GA110-I/PF Visão geral
Background knowledge - what is a PIC24F microcontroller? The PIC24F is a 16-bit modified-Harvard RISC microcontroller family from Microchip Technology, sitting between the 8-bit PIC16/PIC18 families and the 16-bit dsPIC families in the Microchip portfolio. PIC24F devices use a 16-bit instruction word with 24-bit instruction encoding, deliver up to 16 MIPS performance, and are recognized for eXtreme Low Power (XLP) technology with nanoWatt sleep currents. They target the same role in the system hierarchy as Cortex-M0/M0+ parts from other vendors: low-power, cost-sensitive, connectivity-rich embedded control where an 8-bit core is too constrained but a full Cortex-M3/M4 is overkill.
Key features include 64 KB (22K x 24) self-programmable Flash, 16 KB SRAM, a hardware Real-Time Clock and Calendar (RTCC) with calendar mode, a 16-channel 10-bit ADC with 500 ksps conversion rate, and the Peripheral Pin Select (PPS) remapping system that allows flexible assignment of digital peripherals to I/O pins. The device supports 2.0V to 3.6V single-supply operation and offers four power-managed modes: Run, Idle, Sleep with RTCC, and Deep Sleep.
The PIC24FJ64GA110 uses a modified-Harvard architecture with separate 24-bit program and 16-bit data paths, hardware multiply/divide, and a 16-element working register array. The PPS subsystem maps digital peripheral functions (UART, SPI, I2C, timer outputs, interrupt inputs) onto selected RPn pins via configuration bits, simplifying PCB routing. The integrated RTCC with timestamp and tamper-detection features is uncommon in this class and reduces external RTC component count.
Typical applications include low-power IoT sensor nodes, industrial HMI panels, USB-less consumer devices, motor control reference designs (with companion dsPIC), and connectivity-rich embedded control (UART/SPI/I2C bridges). The combination of 23 timers and four UARTs makes it well suited to multi-protocol gateway applications. The 100-TQFP package exposes all 85 I/O pins, enabling direct bus or parallel-master-port interfaces to external peripherals or external memory.
Design consideration - when designing with this device, leverage the Peripheral Pin Select system to optimize PCB layout flexibility, but be aware that PPS remapping is set at runtime and must be re-initialized on every reset. For battery-powered applications, the Deep Sleep mode with RTCC retention provides the lowest quiescent current and is preferable over Idle or Run modes. The 100-TQFP package has a larger footprint than 64-pin variants - choose the 100-pin device only when its 85 I/O pins are genuinely required.
This page synthesizes distributor pricing, drop-in same-family alternatives, and practical design notes not found in the manufacturer datasheet alone, supporting component selection for both new designs and legacy system maintenance.
Alternativas drop-in para PIC24FJ64GA110-I/PF — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com PIC24FJ64GA110-I/PF (mesmo formato e footprint) — diferindo em Timers, Package, ADC, Core Architecture, Program Memory (Flash).
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
PIC24FJ128GA110-I/PF
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
PIC24FJ256GA110-I/PF
✅ Drop-In✓ Em estoque
$5.7 / unidade
Ver ficha técnica →PIC24FJ128GA310-I/PT
✅ Drop-In✓ Em estoque
$4.85 / unidade
Ver ficha técnica →PIC24FJ128GB110-I/PF
✅ Drop-In✓ Em estoque
$4.05 / unidade
Ver ficha técnica →PIC24FJ256GB110-I/PF
✅ Drop-In✓ Em estoque
$5.73 / unidade
Ver ficha técnica →PIC24FJ64GA010-I/PF
✅ Drop-In✓ Em estoque
$5.1 / unidade
Ver ficha técnica →PIC24FJ64GA110-I/PF Classificações máximas e características elétricas
| Core Architecture | PIC24F 16-bit RISC (modified Harvard) |
| Program Memory (Flash) | 64 KB (22K x 24 words) |
| Data RAM | 16 KB |
| Maximum CPU Speed | 32 MHz (16 MIPS) |
| Operating Voltage Range | 2.0 V to 3.6 V |
| I/O Pins | 85 |
| ADC | 10-bit, 16 channels, 500 ksps |
| UART Modules | 4 |
| SPI Modules | 3 |
| I2C Modules | 3 |
| Timers | 23 independent (16-bit / 32-bit mixed) |
| RTCC | Hardware Real-Time Clock and Calendar with timestamp |
| Standby Current (XLP) | < 100 nA (Deep Sleep with RTCC) |
| Encapsulamento | 100-pin TQFP (14x14 mm) |
| Tipo de montagem | Surface Mount |
| Temperatura de operação | -40 C to +85 C (Industrial, -I suffix) |
| Status RoHS | ROHS3 Compliant |
| Programming Interface | ICSP (In-Circuit Serial Programming) / JTAG |
| Peripheral Pin Select | Yes (PPS remapping) |
| Parallel Master Port | Yes (PMP) |
Configuração de pinos do PIC24FJ64GA110-I/PF
| Pino 1 | RP15/PMA0/AN15/OCFAn — I/O pin / Parallel Master Port Address bit / ADC input / Output Compare |
| Pino 2 | RP14/PMA1/AN14 — I/O pin / PMP Address / ADC input |
| Pino 3 | VDD — Positive supply voltage (2.0V to 3.6V) |
| Pino 4 | RP13/PMBE/AN13 — I/O pin / PMP byte enable / ADC input |
| Pino 5 | RP12/PMWR/AN12 — I/O pin / PMP write strobe / ADC input |
| Pino 6 | RP11/PMRD/AN11 — I/O pin / PMP read strobe / ADC input |
| Pino 7 | VSS — Ground reference |
| Pino 8 | RP10/AN10/CVREF — I/O pin / ADC input / Comparator voltage reference |
| Pino 9 | RP9/AN9 — I/O pin / ADC input |
| Pino 10 | RP8/AN8 — I/O pin / ADC input |
| Pino 11 | RP7/AN7 — I/O pin / ADC input |
| Pino 12 | RP6/AN6 — I/O pin / ADC input |
| Pino 13 | RP5/AN5 — I/O pin / ADC input |
| Pino 14 | RP4/AN4 — I/O pin / ADC input |
| Pino 15 | RP3/AN3 — I/O pin / ADC input |
| Pino 16 | RP2/AN2 — I/O pin / ADC input |
| Pino 17 | RP1/AN1 — I/O pin / ADC input |
| Pino 18 | RP0/AN0 — I/O pin / ADC input |
| Pino 19 | AVDD — Analog positive supply |
| Pino 20 | AVSS — Analog ground |
| Pino 21 | OSC1/CLKI — Crystal oscillator input / external clock input |
| Pino 22 | OSC2/CLKO — Crystal oscillator output / clock output |
| Pino 23 | SOSCI/RPC0 — Secondary oscillator crystal input / I/O pin |
| Pino 24 | SOSCO/RPC1 — Secondary oscillator crystal output / I/O pin |
| Pino 25 | MCLR — Master Clear (reset) input, active-low |
| Pino 26 | PGEC1/AN6 — ICSP programming clock / alternate ADC input |
| Pino 27 | PGED1/AN7 — ICSP programming data / alternate ADC input |
| Pino 28 | PGEC2/RP27 — Alternate ICSP programming clock / I/O |
| Pino 29 | PGED2/RP26 — Alternate ICSP programming data / I/O |
| Pino 30 | TCK — JTAG Test Clock |
| Pino 31 | TDI — JTAG Test Data In |
| Pino 32 | TDO — JTAG Test Data Out |
| Pino 33 | TMS — JTAG Test Mode Select |
| Pino 34 | VDD — Positive supply voltage |
| Pino 35 | VSS — Ground reference |
| Pino 36 | RP25/PMD7 — I/O pin / PMP data bit 7 |
| Pino 37 | RP24/PMD6 — I/O pin / PMP data bit 6 |
| Pino 38 | RP23/PMD5 — I/O pin / PMP data bit 5 |
| Pino 39 | RP22/PMD4 — I/O pin / PMP data bit 4 |
| Pino 40 | RP21/PMD3 — I/O pin / PMP data bit 3 |
| Pino 41 | RP20/PMD2 — I/O pin / PMP data bit 2 |
| Pino 42 | RP19/PMD1 — I/O pin / PMP data bit 1 |
| Pino 43 | RP18/PMD0 — I/O pin / PMP data bit 0 |
| Pino 44 | RP17/PMA15 — I/O pin / PMP address bit 15 |
| Pino 45 | RP16/PMA14 — I/O pin / PMP address bit 14 |
| Pino 46 | VDD — Positive supply voltage |
| Pino 47 | VSS — Ground reference |
| Pino 48 | PMCS1/PMA13 — PMP chip select 1 / PMP address 13 |
| Pino 49 | PMCS2/PMA12 — PMP chip select 2 / PMP address 12 |
| Pino 50 | RD10/PMCS — I/O port / PMP chip select |
| Pino 51 | RD9/PMA9 — I/O port / PMP address 9 |
| Pino 52 | RD8/PMA8 — I/O port / PMP address 8 |
| Pino 53 | RD7/PMA7 — I/O port / PMP address 7 |
| Pino 54 | RD6/PMA6 — I/O port / PMP address 6 |
| Pino 55 | RD5/PMA5 — I/O port / PMP address 5 |
| Pino 56 | RD4/PMA4 — I/O port / PMP address 4 |
| Pino 57 | RD3/PMA3 — I/O port / PMP address 3 |
| Pino 58 | RD2/PMA2 — I/O port / PMP address 2 |
| Pino 59 | RD1/PMA1 — I/O port / PMP address 1 |
| Pino 60 | RD0/PMA0 — I/O port / PMP address 0 |
| Pino 61 | RC15 — I/O port bit 15 |
| Pino 62 | RC14 — I/O port bit 14 |
| Pino 63 | RC13 — I/O port bit 13 |
| Pino 64 | RC12 — I/O port bit 12 |
| Pino 65 | VDD — Positive supply voltage |
| Pino 66 | VSS — Ground reference |
| Pino 67 | RC11 — I/O port bit 11 |
| Pino 68 | RC10 — I/O port bit 10 |
| Pino 69 | RC9 — I/O port bit 9 |
| Pino 70 | RC8 — I/O port bit 8 |
| Pino 71 | RC7 — I/O port bit 7 |
| Pino 72 | RC6 — I/O port bit 6 |
| Pino 73 | RC5 — I/O port bit 5 |
| Pino 74 | RC4 — I/O port bit 4 |
| Pino 75 | RC3 — I/O port bit 3 |
| Pino 76 | RC2 — I/O port bit 2 |
| Pino 77 | RC1 — I/O port bit 1 |
| Pino 78 | RC0 — I/O port bit 0 |
| Pino 79 | RB15 — I/O port bit 15 |
| Pino 80 | RB14 — I/O port bit 14 |
| Pino 81 | RB13/AN15 — I/O port / ADC input |
| Pino 82 | RB12/AN14 — I/O port / ADC input |
| Pino 83 | RB11/AN13 — I/O port / ADC input |
| Pino 84 | RB10/AN12 — I/O port / ADC input |
| Pino 85 | RB9/AN11 — I/O port / ADC input |
| Pino 86 | RB8/AN10 — I/O port / ADC input |
| Pino 87 | RB7/AN9 — I/O port / ADC input |
| Pino 88 | RB6/AN8 — I/O port / ADC input |
| Pino 89 | RB5/AN7 — I/O port / ADC input |
| Pino 90 | RB4/AN6 — I/O port / ADC input |
| Pino 91 | RB3/AN5 — I/O port / ADC input |
| Pino 92 | RB2/AN4 — I/O port / ADC input |
| Pino 93 | RB1/AN3 — I/O port / ADC input |
| Pino 94 | RB0/AN2 — I/O port / ADC input |
| Pino 95 | RA15 — I/O port bit 15 |
| Pino 96 | RA14 — I/O port bit 14 |
| Pino 97 | RA9 — I/O port bit 9 |
| Pino 98 | RA8 — I/O port bit 8 |
| Pino 99 | RA7 — I/O port bit 7 |
| Pino 100 | RA6 — I/O port bit 6 |
Aplicações típicas
PIC24FJ64GA110-I/PF é adequado para 6 aplicaçãos: Low-Power IoT Sensor Nodes, Industrial HMI and Display Controllers, Multi-Protocol Connectivity Gateways, Medical Patient Monitoring Devices, Automotive Body and Comfort Modules, Consumer Appliance Control Boards.
Low-Power IoT Sensor Nodes
The PIC24FJ64GA110-I/PF is well-matched to battery-powered wireless sensor nodes where its <100 nA Deep Sleep current with RTCC retention enables multi-year coin-cell operation. The 16 KB SRAM buffers sensor telemetry between radio transmissions, the 3x I2C / 3x SPI interface count supports multi-sensor and external-radio connectivity, and the 32 MHz (16 MIPS) core processes local edge analytics without waking the radio. In a typical deployment the MCU stays in Deep Sleep with RTCC wake-up, samples sensors on demand via I2C, then transmits via an SPI-controlled LoRa or BLE module. The 64 KB Flash accommodates Microchip's MLA or Harmony 3 peripheral libraries alongside application code. Designers should leverage the four UART channels for concurrent connectivity to a primary radio, a debug port, and two sensor peripherals.
Recomendado
Industrial HMI and Display Controllers
The 100-TQFP package of the PIC24FJ64GA110-I/PF exposes the Parallel Master Port (PMP), 85 I/O pins, and sufficient RAM for driving small TFT displays without an external graphics controller. The Peripheral Pin Select system simplifies PCB routing when mapping PMP data lines, SPI touch-controller interface, and UART debug port. With 16 KB of RAM, the device can hold a small double-buffered frame buffer and run Microchip's MLA graphics primitives. Typical systems combine a 3.5-inch QVGA TFT over PMP, a resistive touch controller over SPI, and a UART connection to a host PLC. The 23 timers handle backlight PWM, scan timing, and debounced keypad scanning simultaneously.
Recomendado
Multi-Protocol Connectivity Gateways
The 4x UART / 3x SPI / 3x I2C peripheral complement of the PIC24FJ64GA110-I/PF makes it a natural fit for protocol-bridging gateways that aggregate RS-232, RS-485, SPI peripherals, and I2C sensors into a single host interface. The 32 MHz CPU can run Modbus RTU master, parse incoming ASCII commands, and forward data over UART, SPI, or I2C without external bus controller chips. Industrial gateway designs typically dedicate one UART to RS-485, one to RS-232 console, one to a cellular modem, and one to a Bluetooth module, while the SPI/I2C buses connect to local sensors or expansion boards. The 64 KB Flash is sufficient for command parsers, protocol stacks, and configuration storage.
Recomendado
Medical Patient Monitoring Devices
The PIC24FJ64GA110-I/PF is appropriate for non-life-support medical devices such as bedside patient monitors, infusion pump controllers, and portable pulse oximeters where its low sleep current extends battery life and its 16 MIPS throughput handles signal conditioning and display refresh. The hardware RTCC with calendar mode provides reliable timestamped data logging, required for medical device data integrity. The 10-bit 16-channel ADC at 500 ksps digitizes multiple analog sensor channels including temperature, SpO2 photodiode signals, and pressure transducers. The 23 timers manage ADC sampling rate, audio cue generation, and watchdog supervision simultaneously. Use the PIC24FJ128GA110-I/PF variant for designs requiring additional firmware features.
Recomendado
Automotive Body and Comfort Modules
The PIC24FJ64GA110-I/PF handles automotive body-electronics sub-modules such as seat controllers, mirror modules, HVAC blend-door actuators, and interior lighting controllers, where 85 I/O pins drive multiple loads and 4x UARTs support LIN-bus stacking. The industrial -40C to +85C temperature range covers most cabin-mounted modules, while the 32 MHz core provides sufficient throughput for multi-channel PWM generation and CAN/LIN message filtering when paired with an external CAN transceiver. The PPS feature simplifies PCB layout in space-constrained modules. For under-hood or AEC-Q100-grade automotive designs, migrate to a PIC24HJ or dsPIC33EP automotive variant rather than the -I industrial grade of this device.
Recomendado
Consumer Appliance Control Boards
The PIC24FJ64GA110-I/PF is widely deployed in consumer appliance controllers for washing machines, dishwashers, refrigerators, and microwave ovens, where its 23 timers handle motor PWM, buzzer tones, and sensor sampling, and its 4x UARTs interface to inverter boards, display modules, and external sensors. The 64 KB Flash is sufficient for user-interface state machines, fault detection algorithms, and remote-service diagnostic protocols. The hardware RTCC enables accurate scheduling for delayed-start, defrost cycles, and energy-save modes. The 16 KB RAM supports storing user preferences, fault logs, and diagnostic data without external EEPROM.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para PIC24FJ64GA110-I/PF — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | PIC24FJ128GA110-I/PF | PIC24FJ256GA110-I/PF | PIC24FJ128GA310-I/PT | PIC24FJ128GB110-I/PF | PIC24FJ256GB110-I/PF | PIC24FJ64GA010-I/PF |
|---|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 100-TQFP (14x14 mm) | 100-TQFP (14x14 mm) - same | 100-TQFP (14x14 mm) - same | 100-TQFP (14x14 mm) - same | 100-TQFP (14x14 mm) - same | 100-TQFP (14x14 mm) - same | 100-TQFP (14x14 mm) - same |
| Program Flash | 64 KB | 128 KB | 256 KB | 128 KB | 128 KB | 256 KB | 64 KB |
| Data RAM | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB | 8 KB |
| Maximum CPU Speed | 32 MHz (16 MIPS) | 32 MHz (16 MIPS) | 32 MHz (16 MIPS) | 32 MHz (16 MIPS) | 32 MHz (16 MIPS) | 32 MHz (16 MIPS) | 16 MHz (8 MIPS) |
| USB | No | No | No | No | Yes (USB 2.0 OTG) | Yes (USB 2.0 OTG) | No |
| Peripheral Pin Select (PPS) | Yes | Yes | Yes | Yes | Yes | Yes | No |
| Operating Voltage | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V |
| Automotive Grade (AEC-Q100) | No (-I industrial grade) | No (-I industrial grade) | No (-I industrial grade) | No (-I industrial grade) | No (-I industrial grade) | No (-I industrial grade) | No (-I industrial grade) |
Principais diferenciais
- Highest Flash density in the 64 KB part family with full 32 MHz (16 MIPS) performance (vs PIC24FJ64GA010-I/PF)
- Drop-in path to higher Flash capacity on the same PCB (vs PIC24FJ128GA110-I/PF)
- Migration path to integrated USB on the same footprint (vs PIC24FJ128GB110-I/PF)
Notas de projeto
The PIC24FJ64GA110-I/PF operates from a single 2.0V to 3.6V supply with multiple VDD/VSS pins distributed across the 100-TQFP package. Decouple each VDD pin with a 100 nF ceramic capacitor placed within 5 mm of the pin, and add a single 10 uF bulk capacitor near the device. Place AVDD and AVSS decoupling (100 nF + 10 uF) close to the analog supply pins when using the ADC; sharing the analog and digital ground planes with a single star-point connection beneath the MCU reduces ADC noise by typically 1-2 LSB. Estimated: junction temperature rise = 0 (the device's quiescent current is the dominant thermal factor, not switching losses).
Peripheral Pin Select (PPS) remapping is configured at runtime via SFR writes and is reset to default on every device reset, so the PPS configuration routine must be re-executed at the beginning of every firmware boot. Failure to do so will leave all remapped peripherals non-functional even though the firmware continues to run. Also note that PPS input and output pin selections are stored in separate registers (RPINRxx for inputs, RPORxx for outputs) - designers must configure both directions. For new designs, prefer to dedicate standard (non-PPS) peripheral pins to fixed functions to simplify firmware debug.
Route the 32 MHz primary oscillator traces as short as possible, symmetrically balanced, and guarded by a ground pour on both sides of the traces. Place the crystal/oscillator within 5 mm of the OSC1/OSC2 pins. Avoid routing high-frequency signals (SPI clocks, parallel PMP data) across the OSC1/OSC2 area to prevent coupling into the clock reference. Use a four-layer PCB with dedicated ground and power planes; on a two-layer board, ensure a continuous ground pour surrounds the clock traces. The JTAG TMS/TCK/TDO/TDI pins should be brought out to a compact 0.1-inch header for debugger access.
When driving parallel displays or external memory via the Parallel Master Port (PMP), add 22-47 ohm series resistors on the PMP data and strobe lines to dampen ringing on the heavily-loaded bus. Trace lengths should be matched within 5 mm across the data bus to preserve setup/hold margins. For I2C buses above 400 kHz, verify that the Rp pull-up resistor value accounts for the cumulative capacitance of all devices on the bus; 100 kHz operation tolerates higher capacitance than 400 kHz or 1 MHz operation.
Informações de conformidade
RoHS3 Compliant per MicrochipUSA listing. Lead-free per besenchips listing. -I suffix indicates industrial temperature grade -40C to +85C; not AEC-Q100 qualified for automotive use. Use -E extended or -AEC-Q100 variants for automotive designs.
