PIC32MX764F128HT-V/PT - 80MHz 32-bit MCU 128KB Flash USB-OTG | Microchip
N.º da peça: PIC32MX764F128HT-V/PT ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $6.85 | $6,85 |
| 10 | $6.15 | $61,50 |
| 100 | $5.45 | $545,00 |
| 500 | $4.92 | $2.460,00 |
| 1.000 | $4.48 | $4.480,00 |
PIC32MX764F128HT-V/PT Visão geral
A 32-bit microcontroller (MCU) is an integrated circuit that combines a CPU core, program memory (Flash), data memory (SRAM), and a configurable set of on-chip peripherals into one device. The PIC32MX family implements the MIPS32 M4K core architecture - a RISC-style Harvard pipeline that delivers roughly 1.5 DMIPS/MHz, running here at 80 MHz for an effective throughput of ~120 DMIPS. It belongs to the broader taxonomy: MCU -> 32-bit MCU -> PIC32 family -> PIC32MX5/6/7 sub-family -> microcontrollers -> semiconductors. This hierarchy matters for engineers because peripheral selection, memory map and toolchain support are inherited from the family above.
Key features include a 10-bit 1 MSPS ADC with up to 16 channels, five 16-bit timers/counters, two I2C, two SPI and two UART interfaces, a Parallel Master Port (PMP) for graphics or external memory, and DMA for offloading CPU data movement. The on-chip USB-OTG controller supports both host and device roles, while the integrated 10/100 Ethernet MAC pairs with an external PHY for networked designs. Hardware CRC, RTCC and a 16-bit parallel capture/comapture/PWM block round out the on-chip peripheral set.
Architecturally, the device is built on a low-power CMOS process with multiple power-management modes (Run, Idle, Sleep) and a dedicated low-voltage detect (LVD) block. The Harvard split-bus Flash/SRAM architecture permits simultaneous instruction fetch and data access, and the configurable instruction cache accelerates Flash execution to near zero-wait-state performance. The 64-pin TQFP package exposes a generous pin count for parallel bus, PMP and analog channels while keeping the footprint small enough for cost-sensitive industrial designs.
Typical applications include industrial control with Ethernet connectivity, USB-OTG peripherals such as data loggers and instrumentation, CAN-based automotive subsystems, low-cost graphical HMI with PMP-driven LCDs, and connected consumer devices where the PIC32's mature Harmony/PIC32 toolchain and broad peripheral integration reduce BOM and firmware risk.
When designing in this part, plan for the external 8 MHz primary oscillator required to drive the 80 MHz system clock via the on-chip PLL, and budget 2.5 mA/MHz active plus 30-50 uA/MHz sleep for power budget calculations. Note that the 'V' suffix extends the operating temperature range to +105C but does not reach automotive -40C to +125C - select an 'I' suffix variant only if lower temperature operation is sufficient.
Alternativas drop-in para PIC32MX764F128HT-V/PT — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com PIC32MX764F128HT-V/PT (mesmo formato e footprint) — diferindo em ADC, Package, Operating Temperature, Timers, MSL Level.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
PIC32MX764F128H-V/PT
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
PIC32MX764F128HT-I/PT
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
PIC32MX764F128HT-V/MR
✅ Drop-In✓ Em estoque
$4.75 / unidade
Ver ficha técnica →PIC32MX564F128HT-V/PT
✅ Drop-In✓ Em estoque
$6.1 / unidade
Ver ficha técnica →PIC32MX675F512H-80I/PT
✅ Drop-In✓ Em estoque
$8.42 / unidade
Ver ficha técnica →PIC32MX764F128HT-I/MR
✅ Drop-In ⚠️ Especificações não verificadas✓ Em estoque
$6.04 / unidade
Ver ficha técnica →PIC32MX764F128HT-V/PT Classificações máximas e características elétricas
| Core Architecture | MIPS32 M4K |
| Core Count | 1 (Single-Core) |
| Maximum CPU Clock | 80 MHz |
| Program Memory (Flash) | 128 KB (128K x 8) |
| Data Memory (SRAM) | 32 KB |
| Operating Voltage (VDD) | 2.3 V to 3.6 V |
| I/O Pins | 53 |
| ADC | 10-bit, up to 16 channels |
| ADC Sample Rate | 1 MSPS |
| USB | USB 2.0 Full-Speed OTG |
| Ethernet | 10/100 Mbit MAC (external PHY) |
| Timers | 5 x 16-bit |
| UART | 2 |
| SPI | 2 |
| I2C | 2 |
| Parallel Master Port (PMP) | Yes |
| Temperatura de operação | -40C to +105C (V suffix) |
| Encapsulamento | 64-TQFP (10x10 mm) |
| Tipo de montagem | Surface Mount |
| Nível MSL | 3 (168 hours) |
| Status RoHS | Compliant |
| Lead-Free | Yes |
| Software Framework | MPLAB Harmony |
Configuração de pinos do PIC32MX764F128HT-V/PT
| Pino 1 | RP15/RD11 — Remappable I/O or PMP data |
| Pino 2 | RP14/RD10 — Remappable I/O or PMP data |
| Pino 3 | VSS — Ground reference |
| Pino 4 | VDD — Core logic supply 2.3-3.6V |
| Pino 5 | RP13/PMRD/RD9 — Remappable I/O or PMP read strobe |
| Pino 6 | RP12/PMWR/RD8 — Remappable I/O or PMP write strobe |
| Pino 7 | RP11/RC15 — Remappable I/O |
| Pino 8 | RP10/RC13 — Remappable I/O |
| Pino 9 | RP9/RC14 — Remappable I/O |
| Pino 10 | RP8/PMD0/RE0 — Remappable I/O or PMP data |
| Pino 11 | RP7/PMD1/RE1 — Remappable I/O or PMP data |
| Pino 12 | RP6/PMD2/RE2 — Remappable I/O or PMP data |
| Pino 13 | RP5/PMD3/RE3 — Remappable I/O or PMP data |
| Pino 14 | RP4/PMD4/RE4 — Remappable I/O or PMP data |
| Pino 15 | RP3/PMD5/RE5 — Remappable I/O or PMP data |
| Pino 16 | RP2/PMD6/RE6 — Remappable I/O or PMP data |
| Pino 17 | RP1/PMD7/RE7 — Remappable I/O or PMP data |
| Pino 18 | VDD — I/O supply 2.3-3.6V |
| Pino 19 | VSS — Ground reference |
| Pino 20 | PGEC1/AN0/RPB0 — Programming clk/Analog input/Remappable I/O |
| Pino 21 | PGED1/AN1/RPB1 — Programming data/Analog input/Remappable I/O |
| Pino 22 | AN2/C1IND/RPB2 — Analog input/Comparator input/Remappable I/O |
| Pino 23 | AN3/C1INC/RPB3 — Analog input/Comparator input/Remappable I/O |
| Pino 24 | AN4/C2IND/RPB4 — Analog input/Comparator input/Remappable I/O |
| Pino 25 | AN5/C2INC/RPB5 — Analog input/Comparator input/Remappable I/O |
| Pino 26 | AN6/RPB6 — Analog input/Remappable I/O |
| Pino 27 | AN7/RPB7 — Analog input/Remappable I/O |
| Pino 28 | AN8/RPB8 — Analog input/Remappable I/O |
| Pino 29 | AN9/RPB9 — Analog input/Remappable I/O |
| Pino 30 | AN10/RPB10 — Analog input/Remappable I/O |
| Pino 31 | AN11/RPB11 — Analog input/Remappable I/O |
| Pino 32 | VSS — Ground reference |
| Pino 33 | VDD — I/O supply 2.3-3.6V |
| Pino 34 | AN12/RPB12 — Analog input/Remappable I/O |
| Pino 35 | AN13/RPB13 — Analog input/Remappable I/O |
| Pino 36 | AN14/RPB14 — Analog input/Remappable I/O |
| Pino 37 | AN15/OCFB/RPB15 — Analog input/Comparator output/Remappable I/O |
| Pino 38 | OSC1/RA0 — Crystal oscillator input/Remappable I/O |
| Pino 39 | OSC2/RA1 — Crystal oscillator output/Remappable I/O |
| Pino 40 | SOSCI/RA3 — Secondary oscillator input |
| Pino 41 | SOSCO/RA4 — Secondary oscillator output |
| Pino 42 | VREF-/RA2 — ADC reference negative |
| Pino 43 | VREF+/RA5 — ADC reference positive |
| Pino 44 | D-/RG3 — USB D- data line |
| Pino 45 | D+/RG2 — USB D+ data line |
| Pino 46 | VBUS/RG1 — USB VBUS sense |
| Pino 47 | VDD — USB transceiver supply 3.3V |
| Pino 48 | VSS — USB transceiver ground |
| Pino 49 | RF6/SCK1 — Remappable I/O/SPI clock |
| Pino 50 | RF7/SDI1 — Remappable I/O/SPI data in |
| Pino 51 | RF8/SDO1 — Remappable I/O/SPI data out |
| Pino 52 | RF2/SDA1 — Remappable I/O/I2C data |
| Pino 53 | RF3/SCL1 — Remappable I/O/I2C clock |
| Pino 54 | RF4/U1RX0 — Remappable I/O/UART1 RX |
| Pino 55 | RF5/U1TX0 — Remappable I/O/UART1 TX |
| Pino 56 | RG6/PMD12 — Remappable I/O or PMP data |
| Pino 57 | RG7/PMD13 — Remappable I/O or PMP data |
| Pino 58 | RG8/PMD14 — Remappable I/O or PMP data |
| Pino 59 | RG9/PMD15 — Remappable I/O or PMP data |
| Pino 60 | AERXCLK/RG0 — Ethernet REFCLK input (MII/RMII) |
| Pino 61 | AERXD0/RG12 — Ethernet RX data 0 |
| Pino 62 | AERXD1/RG13 — Ethernet RX data 1 |
| Pino 63 | AERXERR/RG15 — Ethernet RX error |
| Pino 64 | MCLR — Master clear reset (active low) |
Aplicações típicas
PIC32MX764F128HT-V/PT é adequado para 6 aplicaçãos: Industrial Ethernet Gateway, USB-OTG Data Logger, CAN-Based Automotive Subsystem, Graphical HMI with PMP LCD, Connected Sensor Edge Node, Motor Control with PWM and Quadrature Encoder.
Industrial Ethernet Gateway
The PIC32MX764F128HT-V/PT's integrated 10/100 Ethernet MAC combined with 80 MHz MIPS M4K performance makes it well-suited to industrial protocol gateways bridging Modbus TCP, EtherNet/IP or PROFINET networks. Placed on the gateway main board with an external PHY (e.g., KSZ8041), the MCU handles TCP/IP stack in Harmony while dedicating DMA channels to packet buffer movement, offloading the CPU. The 128 KB Flash accommodates a full Microchip Harmony TCP/IP lite stack with TLS client and PPP, and the 32 KB SRAM keeps ~5 simultaneous sockets resident without external memory. The +105C operating range from the 'V' suffix supports unconditioned cabinet mounting typical of factory floors. Designers should add an external 25 MHz Ethernet reference clock for PHY synchronisation and follow Microchip AN833 - the Ethernet PHY configuration guide - to validate MII/RMII timing.
Recomendado
USB-OTG Data Logger
The PIC32MX764F128HT-V/PT's USB 2.0 Full-Speed OTG module and 1 MSPS ADC suit it to portable data loggers that stream recorded samples to a USB host or accept configuration from a USB stick. Using the on-chip 10-bit ADC with DMA, up to 1 MSPS throughput can be sustained without CPU intervention, freeing the MIPS M4K core for FAT32 file-system management on removable media. The 128 KB Flash holds USB Host + MSD + File System libraries from Harmony, while 32 KB SRAM buffers incoming ADC blocks before write-out. The 'V' temperature grade (-40C to +105C) supports outdoor and automotive-cabinet applications, and the 64-TQFP's generous pin count exposes the PMP for optional LCD attachment. Recommended external components include the USBLC6-2SC6 for ESD protection on VBUS and a low-dropout regulator such as MCP1700 for clean analog supply to the ADC.
Recomendado
CAN-Based Automotive Subsystem
The PIC32MX764F128HT-V/PT supports CAN connectivity through an external MCP2515 SPI-to-CAN controller paired with an MCP2551 CAN transceiver, making it a low-cost node for body-electronics and OBD-II peripherals. With 80 MHz MIPS performance, the firmware can handle OBD-II PID polling at 500 kbps while maintaining a USB diagnostic interface - useful for aftermarket scan tools. The 128 KB Flash accommodates a CANopen or J1939 stack plus USB CDC device class, and the DMA channels drive SPI-to-CAN message queues in the background. The 64-TQFP's 53 I/O pins leave headroom for sensor inputs, H-bridge control, and a PMP-driven character LCD. Note that the +105C max of this 'V' variant is adequate for cabin environments but not under-hood; for under-hood designs select an AEC-Q100 qualified PIC32 variant or add thermal management.
Recomendado
Graphical HMI with PMP LCD
The PIC32MX764F128HT-V/PT's Parallel Master Port (PMP) drives graphical LCDs up to QVGA resolution for low-cost HMI panels, while the 80 MHz core delivers enough throughput for simple UI animations and touch-button debouncing. The DMA-driven PMP transfers framebuffer data to the LCD without CPU overhead, leaving MIPS budget for graphics primitives and event handling. The 128 KB Flash fits the Harmony Graphics library plus a moderately complex menu tree, and 32 KB SRAM can hold a small framebuffer for low-color QVGA screens. The 64-TQFP package exposes all required PMP, SPI (for touch controller) and GPIO pins with comfortable routing margin. Designers should add a charge-pump DC-DC such as MCP16301 for LCD bias voltages and place a 32.768 kHz crystal for RTCC-based UI timeouts.
Recomendado
Connected Sensor Edge Node
For IoT edge nodes aggregating analog and digital sensors, the PIC32MX764F128HT-V/PT combines a 10-bit ADC with 1 MSPS throughput, multiple I2C/SPI buses for sensor interfacing, and the Ethernet MAC for uplink connectivity. The DMA channels allow the ADC to continuously fill sample arrays in the background while the CPU runs the MQTT-SN or CoAP protocol stack over Ethernet. With 128 KB Flash and 32 KB SRAM, the firmware fits a Harmony TCP/IP lite stack plus TLS client and several sensor drivers, with comfortable margin for over-the-air (OTA) update bootloaders. The 'V' temperature grade supports outdoor and industrial deployments. Recommended design practice: dedicate one I2C bus to a temperature/humidity sensor (e.g., HDC2021), one SPI bus to an SPI Flash for OTA staging, and add an external watchdog (e.g., MCP1316) for unattended edge reliability.
Recomendado
Motor Control with PWM and Quadrature Encoder
The PIC32MX764F128HT-V/PT provides sufficient peripherals for low-cost BLDC or DC motor control: five 16-bit timers enable multi-channel PWM generation, the PMP can drive LCD tachometers, and 53 I/O pins handle quadrature encoder inputs plus Hall-sensor feedback. The 80 MHz MIPS core executes field-oriented control (FOC) loops at update rates suitable for sub-kW drives, and DMA transfers encoder captures without jitter. The 128 KB Flash fits a small motor-control library plus CANopen DS402 profile, while 32 KB SRAM accommodates modest control histories. The 64-TQFP's exposed analog channels enable current-sensing via the on-chip 10-bit ADC. Note: for FOC above 20 kHz PWM rates on multi-axis drives, the PIC32MX7 family can be tight - benchmark your control loop before finalising the BOM. Add an isolated gate driver (e.g., MCP1515) for safety.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para PIC32MX764F128HT-V/PT — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | PIC32MX764F128H-V/PT | PIC32MX764F128HT-I/PT | PIC32MX764F128HT-V/MR | PIC32MX564F128HT-V/PT | PIC32MX675F512H-80I/PT |
|---|---|---|---|---|---|---|
| Package | 64-TQFP (10x10 mm) | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same | 64-QFN (MR) - different package | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same |
| Brand | Microchip Technology | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same |
| Core | MIPS32 M4K 32-bit | MIPS32 M4K 32-bit | MIPS32 M4K 32-bit | MIPS32 M4K 32-bit | MIPS32 M4K 32-bit | |
| Max Clock | 80 MHz | 80 MHz | 80 MHz | 80 MHz | 80 MHz | |
| Flash | 128 KB | 128 KB | 128 KB | 128 KB | 512 KB (+300%) | |
| SRAM | 32 KB | 32 KB | 32 KB | 32 KB | 64 KB (+100%) | |
| USB | USB OTG FS | USB OTG FS | USB OTG FS | USB OTG FS | USB OTG FS | |
| Ethernet MAC | Yes (10/100) | Yes | Yes | No (PIC32MX5 sub-family) | No (PIC32MX6 sub-family) | |
| Operating Temperature | -40C to +105C | -40C to +105C | -40C to +85C (narrower) | -40C to +105C | -40C to +85C (I grade) |
Principais diferenciais
- Higher operating temperature range for industrial cabinets (vs PIC32MX764F128HT-I/PT)
- Integrated Ethernet MAC vs Ethernet-less sub-families (vs PIC32MX564F128HT-V/PT)
- Smaller Flash than PIC32MX6 with same package (vs PIC32MX675F512H-80I/PT)
Notas de projeto
Estimated: Decouple every VDD/VSS pair with 100 nF ceramic placed within 2 mm of the pin. Add one 4.7 uF bulk capacitor per VDD domain (core and I/O). The PIC32MX764F128HT-V/PT typically draws 2.5 mA/MHz active and 30-50 uA/MHz in sleep; budget at least 200 mA headroom in the 3.3V regulator (e.g., MCP1700-3302 rated 250 mA) for transient peaks. Place a 10 uF tantalum or ceramic on AVdd if the ADC is used at high sample rates.
Estimated: Route the 80 MHz system clock traces first, kept short and matched within 1 mm. Maintain a continuous ground plane under the MCU with stitched vias around the TQFP perimeter. Keep USB D+/D- traces to 90 ohms differential, length-matched within 2 mm. Place the secondary 32.768 kHz crystal close to SOSCI/SOSCO with traces guarded by a ground ring to minimise RTCC jitter.
Do not leave MCLR floating - tie to VDD via a 10 kohm resistor with a 100 nF cap for noise immunity, or to a debug header. The PIC32MX764F128HT-V/PT requires configuration bits to be set in code via #pragma config; the default MPLAB Harmony project templates include safe defaults. When using Ethernet, configure the alternate pin function register (AERPINS) before enabling the MAC to avoid spurious pulses on MII/RMII lines. Always lock the PLL after configuration - a common boot error is running at 8 MHz instead of 80 MHz when SYSKEY unlock is missed.
For 80 MHz operation the PLL multiplies the primary 8 MHz crystal; ensure the crystal has 20 pF load capacitance matching and is placed within 5 mm of OSC1/OSC2. Use an external Ethernet PHY with the 25 MHz reference clock fed from PHY to AERXCLK pin to synchronise MII/RMII timing. Add a 100 ohm differential termination on the USB D+/D- lines if the cable length exceeds 1 m, and place the common-mode choke within 5 mm of the connector.
Informações de conformidade
RoHS and lead-free confirmed by Microchip product page. AEC-Q100 qualification is NOT applicable for this 'V' suffix variant - select AEC-Q100 qualified PIC32 variants for under-hood automotive.
