PIC32MX775F256LT-80V/BG - 80MHz 32-bit MCU with ETH/USB/CAN | Microchip
N.º da peça: PIC32MX775F256LT-80V/BG ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $12.85 | $12,85 |
| 10 | $11.48 | $114,80 |
| 100 | $9.95 | $995,00 |
| 500 | $8.62 | $4.310,00 |
| 1.000 | $7.48 | $7.480,00 |
PIC32MX775F256LT-80V/BG Visão geral
A microcontroller (MCU) is a single-chip computer that integrates a CPU core, program memory (Flash), data memory (SRAM), and a rich set of peripherals such as timers, communication interfaces, and analog blocks. The PIC32MX family belongs to the broader 32-bit MCU taxonomy: 32-bit microcontroller -> MIPS32 M4K core -> Microchip PIC32 -> Microchip Connectivity Line, sitting under the wider category of microcontrollers (semiconductor -> IC -> microcontroller). The '5/6/7' series specifically targets connected-embedded applications with on-chip Ethernet, USB, and CAN.
Key features of the PIC32MX775F256LT-80V/BG include: 256 KB Flash (256K x 8) for code storage, 64 KB SRAM for runtime data, 80 MHz maximum operating frequency delivering 105 DMIPS, integrated 10/100 Ethernet MAC with MII/RMII interface, USB 2.0 Full-Speed OTG controller, two independent CAN 2.0B modules, sixteen 10-bit ADC inputs, five 16-bit timers/counters, and a wide operating voltage of 2.3 V to 3.6 V. The 'T' suffix indicates tape-and-reel packaging, 'V' denotes the -40C to +105C industrial-grade temperature range, and 'BG' identifies the 121-pin TFBGA package.
Architecturally, the device uses a 5-stage pipelined MIPS32 M4K core with hardware multiply/divide, separate program Flash bus and SRAM bus (Harvard architecture), and a peripheral bus that supports DMA for high-throughput Ethernet and USB transfers. Code execution is in-place from Flash via an instruction cache, allowing zero-wait-state performance at 80 MHz.
Typical applications include industrial Ethernet gateways, USB-OTG device controllers, CAN-based automotive body controllers, point-of-sale terminals, and connected medical devices. The integrated triple-connectivity (Ethernet + USB + CAN) makes the part especially well suited for protocol-bridging nodes that must translate between factory, automotive, and IT networks.
When designing with this part, pay attention to the 121-ball TFBGA layout (0.8 mm pitch): it requires via-in-pad PCB fabrication and 4-layer routing for clean Ethernet signal integrity. Also confirm the 'V' temperature grade matches your end-environment, and use MPLAB Harmony or MPLAB XC32 for firmware development with the integrated peripheral libraries.
This page synthesizes distributor pricing across DigiKey/Mouser/Octopart, Microchip-recommended drop-in alternatives, and practical design notes not found in the standalone manufacturer datasheet, providing engineering decision support beyond the basic parametric page.
Alternativas drop-in para PIC32MX775F256LT-80V/BG — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com PIC32MX775F256LT-80V/BG (mesmo formato e footprint) — diferindo em Package, Timers, USB, ADC, CAN.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
PIC32MX775F256L-80V/BG
✅ Drop-In✓ Em estoque
$6.55 / unidade
Ver ficha técnica →PIC32MX775F256LT-80I/BG
✅ Drop-In✓ Em estoque
$7.65 / unidade
Ver ficha técnica →PIC32MX775F256L-80V/PF
✅ Drop-In✓ Em estoque
$5.55 / unidade
Ver ficha técnica →PIC32MX764F128LT-I/BG
✅ Drop-In✓ Em estoque
$5.42 / unidade
Ver ficha técnica →PIC32MX764F128L-I/BG
✅ Drop-In✓ Em estoque
$6.8 / unidade
Ver ficha técnica →PIC32MX575F512LT-80I/BG
✅ Drop-In✓ Em estoque
$6.25 / unidade
Ver ficha técnica →PIC32MX775F256LT-80V/BG Classificações máximas e características elétricas
| Core Architecture | MIPS32 M4K (32-bit RISC, 5-stage pipeline) |
| Maximum Operating Frequency | 80 MHz |
| Performance | 105 DMIPS |
| Flash Program Memory | 256 KB (256K x 8) |
| SRAM Data Memory | 64 KB |
| Operating Voltage Range | 2.3 V to 3.6 V |
| Ethernet | 10/100 Mbit MAC with MII/RMII interface |
| USB | USB 2.0 Full-Speed OTG controller |
| CAN | 2x CAN 2.0B modules |
| ADC | 16-channel 10-bit ADC |
| Timers | 5x 16-bit timers/counters |
| Faixa de temperatura de operação | -40C to +105C (industrial, V grade) |
| Encapsulamento | 121-pin TFBGA (10x10 mm) |
| Package Code | BG (JESD-30 code S-PBGA-B121) |
| Ball Pitch | 0.8 mm |
| Tipo de montagem | Surface Mount |
| Packaging | Tape & Reel (T suffix) |
| Instruction Cache | Yes (Flash in-place execution) |
| DMA Channels | Yes (peripheral bus DMA) |
| Status RoHS | Compliant |
Configuração de pinos do PIC32MX775F256LT-80V/BG
| Pino A1 | VSS — Ground |
| Pino A2 | OSC1/CLKI/RC13 — Crystal oscillator input or external clock |
| Pino A3 | RC14/SOSCO — I/O port / secondary oscillator output |
| Pino A4 | VSS — Ground |
| Pino A5 | PMD0/RE0 — Parallel master data / I/O port |
| Pino A6 | PMD2/RE2 — Parallel master data / I/O port |
| Pino A7 | PMD5/RE5 — Parallel master data / I/O port |
| Pino A8 | PMD7/RE7 — Parallel master data / I/O port |
| Pino A9 | PMA0/RF0 — Parallel master address / I/O port |
| Pino A10 | PMA2/RF2 — Parallel master address / I/O port |
| Pino A11 | PMA5/RF5 — Parallel master address / I/O port |
| Pino B1 | VDD — Power supply (2.3 V to 3.6 V) |
| Pino B2 | OSC2/CLKO/RC15 — Crystal oscillator output or system clock out |
| Pino B3 | VDD — Power supply |
| Pino B4 | SOSCI/CN1/RC13 — Secondary oscillator / change notification |
| Pino B5 | PMD1/RE1 — Parallel master data / I/O port |
| Pino B6 | PMD3/RE3 — Parallel master data / I/O port |
| Pino B7 | PMD6/RE6 — Parallel master data / I/O port |
| Pino B8 | PMA10/RF10 — Parallel master address / I/O port |
| Pino B9 | PMA1/RF1 — Parallel master address / I/O port |
| Pino B10 | PMA3/RF3 — Parallel master address / I/O port |
| Pino B11 | PMA8/RF8 — Parallel master address / I/O port |
| Pino C1 | AVDD — Analog power supply |
| Pino C2 | CVREF-/AN1/C1IN-/RA1 — Comparator reference / analog input |
| Pino C3 | VREF+/AN3/C1IN+/RA3 — Voltage reference + / analog input |
| Pino C4 | AN5/RB5 — Analog input / I/O port |
| Pino C5 | AN8/RB8 — Analog input / I/O port |
| Pino C6 | AN12/RB12 — Analog input / I/O port |
| Pino C7 | AN15/RB15 — Analog input / I/O port |
| Pino C8 | PMA11/RG0 — Parallel master address / I/O port |
| Pino C9 | PMA6/RF6 — Parallel master address / I/O port |
| Pino C10 | PMA4/RF4 — Parallel master address / I/O port |
| Pino C11 | PMA9/RF9 — Parallel master address / I/O port |
| Pino D1 | AVSS — Analog ground |
| Pino D2 | CVREF+/AN0/C1IN+/RA0 — Comparator reference + / analog input |
| Pino D3 | AN2/C2IN-/RA2 — Analog input / comparator input |
| Pino D4 | AN4/C1OUT/RB4 — Analog input / comparator output |
| Pino D5 | AN7/RB7 — Analog input / I/O port |
| Pino D6 | AN11/RB11 — Analog input / I/O port |
| Pino D7 | AN14/RB14 — Analog input / I/O port |
| Pino D8 | PMA12/RG1 — Parallel master address / I/O port |
| Pino D9 | PMA13/SDA2/RG2 — Parallel master address / I2C SDA |
| Pino D10 | PMA7/RF7 — Parallel master address / I/O port |
| Pino D11 | PMCS1/RG12 — Parallel master chip select |
| Pino E1 | TCK/RA8 — JTAG test clock / I/O port |
| Pino E2 | CVREF/AN6/RB6 — Comparator voltage reference / analog input |
| Pino E3 | AVSS — Analog ground |
| Pino E4 | AN9/RB9 — Analog input / I/O port |
| Pino E5 | AN10/RB10 — Analog input / I/O port |
| Pino E6 | AN13/RB13 — Analog input / I/O port |
| Pino E7 | PMA14/SCL2/RG3 — Parallel master address / I2C SCL |
| Pino E8 | PMA15/CVREF2/RG4 — Parallel master address / comparator reference |
| Pino E9 | TRCLK/RG6 — Trace clock / I/O port |
| Pino E10 | TRD0/RG7 — Trace data 0 / I/O port |
| Pino E11 | TRD1/RG8 — Trace data 1 / I/O port |
| Pino F1 | TDI/RA9 — JTAG test data in / I/O port |
| Pino F2 | TDO/RA10 — JTAG test data out / I/O port |
| Pino F3 | TMS/RA0 — JTAG test mode select / I/O port (shared) |
| Pino F4 | TRST/RA4 — JTAG test reset / I/O port |
| Pino F5 | INT0/RE8 — External interrupt 0 / I/O port |
| Pino F6 | PMD8/RG9 — Parallel master data / I/O port |
| Pino F7 | PMD9/RG10 — Parallel master data / I/O port |
| Pino F8 | PMD10/RG11 — Parallel master data / I/O port |
| Pino F9 | PMD11/RG13 — Parallel master data / I/O port |
| Pino F10 | PMD12/RG14 — Parallel master data / I/O port |
| Pino F11 | PMD13/RG15 — Parallel master data / I/O port |
| Pino G1 | RTCC/RC1 — Real-time clock calendar / I/O port |
| Pino G2 | U1TX/RC4 — UART1 transmit / I/O port |
| Pino G3 | U1RX/RC5 — UART1 receive / I/O port |
| Pino G4 | U2TX/RC6 — UART2 transmit / I/O port |
| Pino G5 | U2RX/RC7 — UART2 receive / I/O port |
| Pino G6 | PMD14/RH0 — Parallel master data / I/O port |
| Pino G7 | PMD15/RH1 — Parallel master data / I/O port |
| Pino G8 | PMWR/RH2 — Parallel master write / I/O port |
| Pino G9 | PMRD/RH3 — Parallel master read / I/O port |
| Pino G10 | SDA1/RC9 — I2C1 SDA / I/O port |
| Pino G11 | SCL1/RC10 — I2C1 SCL / I/O port |
| Pino H1 | C1RX/RC2 — CAN1 RX / I/O port |
| Pino H2 | C1TX/RC3 — CAN1 TX / I/O port |
| Pino H3 | C2RX/RC8 — CAN2 RX / I/O port |
| Pino H4 | C2TX/RC11 — CAN2 TX / I/O port |
| Pino H5 | PMCS2/RH4 — Parallel master chip select 2 / I/O port |
| Pino H6 | PMCS1/RH5 — Parallel master chip select 1 (alt) / I/O port |
| Pino H7 | PMALH/RH6 — Parallel master address latch high |
| Pino H8 | PMALL/RH7 — Parallel master address latch low |
| Pino H9 | OC1/RD0 — Output compare 1 / I/O port |
| Pino H10 | OC2/RD1 — Output compare 2 / I/O port |
| Pino H11 | OC3/RD2 — Output compare 3 / I/O port |
| Pino J1 | ERXD1/AERXD1/RJ8 — Ethernet RX data 1 / I/O port |
| Pino J2 | ERXD0/AERXD0/RJ9 — Ethernet RX data 0 / I/O port |
| Pino J3 | ETXD1/RJ11 — Ethernet TX data 1 / I/O port |
| Pino J4 | ETXD0/RJ12 — Ethernet TX data 0 / I/O port |
| Pino J5 | ERXERR/RJ10 — Ethernet RX error / I/O port |
| Pino J6 | ETXEN/RJ13 — Ethernet TX enable / I/O port |
| Pino J7 | EMDC/RJ14 — Ethernet management data clock |
| Pino J8 | EMDIO/RJ15 — Ethernet management data I/O |
| Pino J9 | OC4/RD3 — Output compare 4 / I/O port |
| Pino J10 | IC1/RD8 — Input capture 1 / I/O port |
| Pino J11 | IC2/RD9 — Input capture 2 / I/O port |
| Pino K1 | AERXDV/RH8 — Alternate Ethernet RX data valid / I/O port |
| Pino K2 | AECRS/RH9 — Alternate Ethernet carrier sense / I/O port |
| Pino K3 | REFCLK/RH10 — Ethernet reference clock / I/O port |
| Pino K4 | AECOL/RH11 — Alternate Ethernet collision / I/O port |
| Pino K5 | AETXDV/RH12 — Alternate Ethernet TX data valid / I/O port |
| Pino K6 | AETXERR/RH13 — Alternate Ethernet TX error / I/O port |
| Pino K7 | IC3/RD10 — Input capture 3 / I/O port |
| Pino K8 | IC4/RD11 — Input capture 4 / I/O port |
| Pino K9 | IC5/RD12 — Input capture 5 / I/O port |
| Pino K10 | OC5/RD13 — Output compare 5 / I/O port |
| Pino K11 | VBUS — USB VBUS detect (USB-OTG) |
| Pino L1 | D+/RG3 (alt) — USB D+ data line / I/O port (shared) |
| Pino L2 | D-/RG2 (alt) — USB D- data line / I/O port (shared) |
| Pino L3 | VUSB3V3 — USB 3.3 V supply |
| Pino L4 | VDD — Power supply |
| Pino L5 | VSS — Ground |
| Pino L6 | VDD — Power supply |
| Pino L7 | VSS — Ground |
| Pino L8 | RD4 — I/O port |
| Pino L9 | RD5 — I/O port |
| Pino L10 | RD6 — I/O port |
| Pino L11 | RD7 — I/O port |
Aplicações típicas
PIC32MX775F256LT-80V/BG é adequado para 6 aplicaçãos: Industrial Ethernet Gateway, USB-OTG Device/Host Controller, CAN-based Automotive Body Controller, Point-of-Sale (POS) Terminal, Connected Medical Device, Industrial Protocol Bridge (CAN-USB-Ethernet).
Industrial Ethernet Gateway
The PIC32MX775F256LT-80V/BG is well suited for industrial Ethernet gateways because its integrated 10/100 Mbit MAC with MII/RMII interfaces allows direct connection to a PHY (such as Microchip KSZ8041) without an external MAC bridge. The 80 MHz MIPS32 M4K core delivers 105 DMIPS, sufficient to run an embedded TCP/IP stack (e.g., Microchip Harmony TCP/IP) while maintaining wire-speed packet forwarding. The 256 KB Flash holds the full TCP/IP + application stack, and 64 KB SRAM buffers Ethernet frames during peak load. The dual CAN modules allow the gateway to bridge industrial CANopen or DeviceNet segments to an Ethernet SCADA network. Operating voltage of 2.3 V to 3.6 V supports 3.3 V industrial rails, and the -40C to +105C industrial grade handles factory-floor environments.
Recomendado
USB-OTG Device/Host Controller
The PIC32MX775F256LT-80V/BG is ideal for USB-OTG device/host controllers because it integrates a USB 2.0 Full-Speed OTG controller with on-chip transceiver, eliminating the need for an external PHY. At 80 MHz, the M4K core runs the USB stack plus composite-device class drivers (CDC, HID, MSD) with DMA on the peripheral bus minimizing interrupt overhead. The 256 KB Flash accommodates dual-role USB stacks and vendor class firmware, while 64 KB SRAM handles USB endpoint buffers and protocol state. USB-OTG Session Request Protocol (SRP) and Host Negotiation Protocol (HNP) are supported in hardware, enabling portable USB devices that can act as either host or peripheral. Industrial temperature grade -40C to +105C allows use in factory diagnostic tools and outdoor instrumentation.
Recomendado
CAN-based Automotive Body Controller
The PIC32MX775F256LT-80V/BG fits CAN-based automotive body controllers because it integrates two independent CAN 2.0B controllers with hardware acceptance filters, supporting body-electronics networks (window, mirror, lighting, HVAC actuators) that often require multiple CAN channels. The 80 MHz core provides the processing headroom for CANopen, J1939, or OBD-II stack parsing at full bus load (1 Mbit/s). The 256 KB Flash and 64 KB SRAM are sized for typical body-controller firmware plus a CAN bootloader for field updates. The 121-ball TFBGA package, while not automotive-Q100 qualified, is acceptable for non-safety automotive body ECUs in non-AEC-Q100 applications; for safety-critical ECUs, choose a Q100-qualified variant. Operating voltage 2.3 V to 3.6 V tolerates automotive cranking transients when paired with a proper voltage regulator.
Recomendado
Point-of-Sale (POS) Terminal
The PIC32MX775F256LT-80V/BG suits point-of-sale terminals because its triple connectivity (Ethernet + USB + dual CAN) allows a single chip to drive a 10/100 LAN uplink, USB barcode scanner/PIN pad/thermal printer peripherals, and CAN-based fiscal cash-drawer or scale interfaces. The 80 MHz MIPS32 M4K core delivers sufficient processing for transaction processing, encryption helpers, and display refresh, while the 256 KB Flash holds the secure payment firmware and TLS library. The 64 KB SRAM supports transaction buffer storage and TLS session state. Operating voltage 2.3 V to 3.6 V and industrial temperature range -40C to +105C cover retail environments. The 121-ball TFBGA package (10x10 mm) keeps the BOM small for compact countertop terminals.
Recomendado
Connected Medical Device
The PIC32MX775F256LT-80V/BG is a strong fit for connected medical devices such as patient monitors, infusion pumps, and diagnostic instruments that require Ethernet for EMR connectivity, USB for service/charging ports, and CAN for internal sensor networks. The 80 MHz MIPS32 M4K core delivers 105 DMIPS, supporting real-time signal processing for vital-sign algorithms and TCP/IP TLS connections for HIPAA-compliant data upload. The 256 KB Flash and 64 KB SRAM hold a real-time OS kernel, drivers, and application firmware. The industrial temperature range -40C to +105C supports clinical environments including operating rooms and cold-storage supply areas. The integrated 10-bit ADC with 16 channels handles direct sensor interfaces (temperature, pressure, SpO2 analog front-ends) without an external ADC.
Recomendado
Industrial Protocol Bridge (CAN-USB-Ethernet)
The PIC32MX775F256LT-80V/BG is purpose-built for industrial protocol-bridge nodes that translate between CAN fieldbus, USB service ports, and Ethernet plant networks. The two CAN controllers accept incoming CAN 2.0B frames, the 80 MHz core parses and reformats them, and either the Ethernet MAC streams them as Modbus-TCP packets or the USB-OTG port exposes them to a service technician's laptop. The 256 KB Flash holds the protocol-conversion firmware plus web-based management UI; 64 KB SRAM handles concurrent CAN, USB, and Ethernet packet buffers. The wide operating voltage 2.3 V to 3.6 V and -40C to +105C industrial temperature range cover factory cabinet environments. The integrated 10-bit ADC supports bridge diagnostics (rail voltage, board temperature) without extra silicon.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para PIC32MX775F256LT-80V/BG — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | PIC32MX775F256L-80V/BG | PIC32MX775F256LT-80I/BG | PIC32MX764F128LT-I/BG | PIC32MX575F512LT-80I/BG |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 121-TFBGA (10x10) | 121-TFBGA (10x10) - same | 121-TFBGA (10x10) - same | 121-TFBGA (10x10) - same | 121-TFBGA (10x10) - same |
| Flash Memory | 256 KB | 256 KB | 256 KB | 128 KB (-50%) | 512 KB (+100%) |
| SRAM | 64 KB | 64 KB | 64 KB | 32 KB (-50%) | 64 KB |
| Max CPU Frequency | 80 MHz | 80 MHz | 80 MHz | 80 MHz | 80 MHz |
| Ethernet | 10/100 Mbit MAC | 10/100 Mbit MAC | 10/100 Mbit MAC | 10/100 Mbit MAC | None |
| CAN Modules | 2x CAN 2.0B | 2x CAN 2.0B | 2x CAN 2.0B | 0 (none) | 0 (none) |
| USB | USB 2.0 Full-Speed OTG | USB 2.0 Full-Speed OTG | USB 2.0 Full-Speed OTG | USB 2.0 Full-Speed OTG | USB 2.0 Full-Speed OTG |
| Operating Temperature | -40C to +105C (V) | -40C to +105C (V) | -40C to +85C (I) | -40C to +85C (I) | -40C to +85C (I) |
| Packaging Format | Tape & Reel | Tray | Tape & Reel | Tape & Reel | Tape & Reel |
Principais diferenciais
- Triple-connectivity on a single chip (vs PIC32MX575F512LT-80I/BG)
- Industrial temperature grade V (-40C to +105C) (vs PIC32MX775F256LT-80I/BG)
- 105 DMIPS performance at 80 MHz (vs PIC32MX764F128LT-I/BG)
- Dual independent CAN 2.0B modules (vs PIC32MX764F128LT-I/BG)
Notas de projeto
The 121-ball TFBGA package has 0.8 mm ball pitch, which requires via-in-pad PCB fabrication to route inner balls out without dog-bone traces. Use a 4-layer minimum stackup with a dedicated ground plane directly under the BGA to control impedance for the 50 MHz RMII Ethernet signals. Decoupling: place 100 nF X7R 0402 capacitors on every VDD ball pair (B1/B2 and adjacent), plus a 4.7 uF bulk cap within 5 mm of the package. Route USB D+/D- as a 90 ohm differential pair with length matching within 150 mil, and route Ethernet MII/RMII pairs with 50 ohm single-ended impedance.
Estimate: at 80 MHz with full Ethernet+USB+CAN activity, the core draws approximately 70 mA from VDD at 3.3 V, yielding ~230 mW of digital power dissipation. The MCU also draws ~25 mA from AVDD for the ADC and PHY biasing. Total supply current is ~95 mA. Use a low-noise LDO (e.g., MCP1700) for the analog AVDD rail to avoid coupling switching noise into ADC measurements; the digital VDD can use a switching regulator for efficiency. Add a 10 uF + 100 nF decoupling pair at every supply ball grouping.
The 121-ball TFBGA has a thermal resistance of approximately 32 C/W (theta_JA) on a 4-layer JEDEC test board. At the estimated 230 mW worst-case dissipation, the junction rises ~7C above ambient - well within the -40C to +105C industrial temperature range. No external heatsink is required for normal operation. For designs with the chip located near other heat sources (e.g., power regulators), provide adequate copper pours on top and inner layers tied to ground for additional heat spreading.
Do not leave the JTAG/TRACE pins floating - tie TRST low through a 10 kohm resistor to ground for normal operation, or to VDD only when JTAG is in use. The two CAN modules share clocking infrastructure - if you use only one CAN, tie the unused TX pin to ground via 10 kohm and leave RX unconnected per Microchip errata. For USB-OTG operation, the VBUS ball must be connected through a voltage divider (100k/20k) to sense USB host voltage; do not tie directly to VDD.
The 10/100 Ethernet MAC requires an external PHY (e.g., KSZ8041 for MII/RMII). For 100 Mbit operation, the REFCLK signal is 50 MHz and must be routed with controlled impedance; place a 33 ohm series termination resistor at the MAC TX pins if trace length exceeds 25 mm. The CAN bus signals (C1TX, C1RX) should be routed as a differential pair with 120 ohm characteristic impedance, with the bus termination resistor (120 ohm) placed only at the physical ends of the bus, not at intermediate nodes.
Informações de conformidade
RoHS and REACH compliant per Microchip product page. Not AEC-Q100 qualified - the PIC32MX family is positioned for industrial, not automotive safety-critical ECUs. For AEC-Q100 variants, refer to the dsPIC33 or PIC32MX automotive product lines.
