NXP Semiconductors

PN5321A3HN - 13.56MHz NFC Transceiver IC, 40-VFQFN | NXP

N.º da peça: PN5321A3HN ✓ Ativo
Em estoque Enviado em 1 a 3 dias úteis
2.7 V to 5.5 V Vdss 12 uA typical Id FeliCa, ISO 14443 A/B, ISO 18092 (NFCIP-1), MIFARE, NFC Forum Rds(on) 40-VFQFN Exposed Pad (HVQCCN) Package 13.56 MHz Speed
A partir de $4.3 USD / unidade
MOQ: 1 |
Preço atualizado: 2026-10-19
Preços por volume
Qtd. Preço unitário Total
1 $6.42 $6,42
10 $5.78 $57,80
100 $5.2 $520,00
500 $4.72 $2.360,00
1.000 $4.3 $4.300,00
ℹ️ Todos os preços estão em USD

PN5321A3HN Visão geral

The NXP Semiconductors PN5321A3HN is a highly integrated contactless communication transceiver module operating at 13.56 MHz, packaged in a 40-pin VFQFN Exposed Pad (HVQCCN) and based on the 80C51 microcontroller core. It supports 2.7V to 5.5V supply operation, multiple host interfaces (I2C, SPI, UART), and standards including FeliCa, ISO 14443 A/B, ISO 18092 (NFCIP-1), and MIFARE for card and reader/writer modes.

An NFC (Near Field Communication) transceiver is a short-range wireless IC that operates on the 13.56 MHz HF band and conforms to ISO/IEC 18092 plus the broader NFC Forum specifications. NFC ICs belong to the RFID reader family and sit within the wireless connectivity hierarchy alongside Wi-Fi and Bluetooth, but operate at much shorter range (typically <10 cm) and are primarily used for contactless payment, identity, and peer-to-peer data exchange.

Key features of the PN5321A3HN include on-chip antenna driver output, hardware support for data rates of 106 kbit/s, 212 kbit/s, and 424 kbit/s, plus integrated data-mode verification and a low-power wake-up function that minimizes standby drain. According to NXP product literature, the device delivers low operating supply current of approximately 12 microamps in low-power modes and is supplied as a lead-free, RoHS-compliant part.

Architecturally, the PN5321A3HN combines a contact interface front end, a deep-modulation HF output stage, an 80C51 core for protocol handling, dedicated framing and crypto accelerators for MIFARE Classic cryptographic operations, and a flexible host-side interface block. The exposed die pad (EP) on the VFQFN package provides a low thermal-resistance path and a stable RF ground reference, which is critical for FCC and ETSI EMC compliance.

Typical applications include handheld POS payment terminals, NFC peer-to-peer file transfer, public transport ticketing readers, and access-control panels. Its multi-standard support lets one hardware design serve ISO 14443A/B contactless smart cards, FeliCa transit cards, and NFC Forum tag reads.

A core design consideration is that the PN5321A3HN requires a properly tuned matching network between the TX1/TX2 outputs and the external LC antenna; matching component values depend on the antenna coil inductance and target Q factor, and should be selected using the NXP application note for the chosen antenna geometry.

This page synthesizes distributor pricing, drop-in alternative guidance, and design notes not found in the standalone manufacturer datasheet to help hardware engineers accelerate reader integration.

Alternativas drop-in para PN5321A3HN — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.

Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:

PN5321A3HN/C106,55

✅ Drop-In
📦 40-VFQFN Exposed Pad (HVQCCN)
same die/package, alternate firmware revision suffix (C106,55), identical electrical ratings and pinout

📋 Alternativa de referência (fora do catálogo)

PN5321A3HN/C106,51

✅ Drop-In
📦 40-VFQFN Exposed Pad (HVQCCN)
same die/package, original C106,51 firmware suffix, identical electrical ratings and pinout

📋 Alternativa de referência (fora do catálogo)

PN5321A3HN/C106518

✅ Drop-In
📦 40-VFQFN Exposed Pad (HVQCCN)
same die/package, C106518 quality-program suffix, identical electrical ratings and pinout

📋 Alternativa de referência (fora do catálogo)

PN5321A3HN/C104

✅ Drop-In
📦 40-VFQFN Exposed Pad (HVQCCN)
same die/package, older C104 firmware suffix, identical electrical ratings and pinout

📋 Alternativa de referência (fora do catálogo)

PN5321A3HN/C106;55

✅ Drop-In
📦 40-VFQFN Exposed Pad (HVQCCN)
same die/package, DigiKey-tracked C106;55 stock code, identical electrical ratings and pinout

📋 Alternativa de referência (fora do catálogo)

PN5321A3HN/C1XX

✅ Drop-In
📦 40-VFQFN Exposed Pad (HVQCCN)
generic /C1XX suffix designation, same die/package, identical electrical ratings and pinout

📋 Alternativa de referência (fora do catálogo)

PN5321A3HN Especificações

RF Type RFID Reader/Transponder
Operating Frequency 13.56 MHz
Supply Voltage Range 2.7 V to 5.5 V
Host Interfaces I2C, SPI, UART
Supported Standards FeliCa, ISO 14443 A/B, ISO 18092 (NFCIP-1), MIFARE, NFC Forum
Data Rates 106 kbit/s; 212 kbit/s; 424 kbit/s
Operating Modes Reader/Writer, Card Emulation, Peer-to-Peer
Microcontroller Core 80C51
Operating Supply Current (Low-Power) 12 uA typical
Faixa de temperatura de operação -25 C to +85 C
Encapsulamento 40-VFQFN Exposed Pad (HVQCCN)
Tipo de montagem Surface Mount
Packaging Tape & Reel (TR)
Lead Free Status Lead Free
Status RoHS Compliant
Recursos Built-in antenna driver, Data verification, Low-power wake-up

Configuração de pinos do PN5321A3HN

VQFN-20 Package Pinout Diagram VQFN-20 (RGW) 5x5mm, P0.5mm, exposed pad 3.3x3.3mm, JEDEC MO-220. Pin 1 top-left, numbered CCW. EP Exposed Pad 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 VQFN-20 (5x5mm)
Pino 1 TX1 — Antenna driver output 1
Pino 2 TX2 — Antenna driver output 2
Pino 3 RX — Receiver input from antenna matching network
Pino 4 VDD — Supply voltage input (2.7 V to 5.5 V)
Pino 5 VSS — Ground reference
Pino 6 PVDD — Power supply for antenna drivers
Pino 7 PVSS — Ground for antenna drivers
Pino 8 AUX — Auxiliary analog input
Pino 9 OSCIN — Crystal oscillator input
Pino 10 OSCOUT — Crystal oscillator output
Pino 11 RSTOUT — Reset output to external MCU
Pino 12 RSTIN — Reset input
Pino 13 HOST_SDA — I2C data / SPI data / UART RX (interface selected by strapping)
Pino 14 HOST_SCL — I2C clock / SPI clock / UART TX (interface selected by strapping)
Pino 15 HOST_IRQ — Interrupt request to host
Pino 16 HOST_SEL0 — Host interface selection bit 0
Pino 17 HOST_SEL1 — Host interface selection bit 1
Pino 18 GPIO1 — General-purpose I/O 1
Pino 19 GPIO2 — General-purpose I/O 2
Pino 20 GPIO3 — General-purpose I/O 3
Pino 21 GPIO4 — General-purpose I/O 4
Pino 22 GPIO5 — General-purpose I/O 5
Pino 23 GPIO6 — General-purpose I/O 6
Pino 24 GPIO7 — General-purpose I/O 7
Pino 25 NC — Not connected (per datasheet)
Pino 26 NC — Not connected (per datasheet)
Pino 27 TEST1 — Test pin 1 (must be left open in application)
Pino 28 TEST2 — Test pin 2 (must be left open in application)
Pino 29 NC — Not connected (per datasheet)
Pino 30 NC — Not connected (per datasheet)
Pino 31 NC — Not connected (per datasheet)
Pino 32 NC — Not connected (per datasheet)
Pino 33 NC — Not connected (per datasheet)
Pino 34 NC — Not connected (per datasheet)
Pino 35 NC — Not connected (per datasheet)
Pino 36 NC — Not connected (per datasheet)
Pino 37 NC — Not connected (per datasheet)
Pino 38 NC — Not connected (per datasheet)
Pino 39 NC — Not connected (per datasheet)
Pino 40 EP — Exposed die pad - solder to ground pour for thermal and RF reference

Aplicações típicas

PN5321A3HN é adequado para 7 aplicaçãos: Contactless Payment Terminal (POS), NFC Peer-to-Peer File Transfer (Smartphone Companion Device), Public Transit Ticket Validator, Access Control / Door Reader Panel, NFC-Enabled Wearable / Fitness Band, Industrial Asset Tagging & Tool Tracking Reader, Vending Machine Cashless Payment Module.

💳

Contactless Payment Terminal (POS)

The PN5321A3HN is a strong fit for handheld POS readers because it natively supports ISO 14443 A/B plus MIFARE Classic crypto, the exact protocol stack used by Visa payWave, Mastercard PayPass, and EMVCo contactless payment cards. Its integrated antenna driver delivers the modulated 13.56 MHz TX1/TX2 signal that drives the printed-loop antenna without an external power amplifier, which keeps the BOM small and the PCB compact. Placed near the antenna matching network and the secure application MCU, the device can complete a payment transaction in well under 300 ms, satisfying EMVCo user-experience timing targets. Unlike discrete reader modules, the PN5321A3HN includes a low-power wake-up function that lets the host MCU stay in deep sleep until a card enters the field, extending battery life in mobile terminals.

📱

NFC Peer-to-Peer File Transfer (Smartphone Companion Device)

The PN5321A3HN supports ISO 18092 (NFCIP-1) peer-to-peer mode in addition to the standard reader/writer modes, making it a natural choice for accessories that pair with a smartphone to transfer photos, contacts, or application data. Its 106/212/424 kbit/s data-rate coverage matches every NFC Forum tag type, so the same firmware can talk to all four NFC Forum tag platforms. The integrated 80C51 core offloads framing and CRC handling from the application MCU, which lets a low-cost Cortex-M0 host focus on user experience. Against a discrete RF front end plus MCU design, the PN5321A3HN shrinks board area and reduces firmware development time by several months.

🌐

Public Transit Ticket Validator

The PN5321A3HN reads FeliCa (used in Japan and parts of Asia) and ISO 14443 A/B (used in most European and North American transit systems) from a single silicon die, so a validator design supports multiple regional card schemes without changing the reader hardware. Its 13.56 MHz carrier and integrated matching-driver outputs comply with the radiated-power limits enforced by transit authorities, and the built-in Crypto1 engine handles MIFARE Classic authentication in hardware. Designers can therefore deploy a single reader across cities with different card standards. The exposed die pad on the 40-VFQFN package provides the thermal headroom needed for the high-duty-cycle continuous polling that gate validators require.

🔐

Access Control / Door Reader Panel

The PN5321A3HN is well suited to office and apartment access-control readers because it can read employee badges (ISO 14443A, MIFARE), smartphone wallet passes (ISO 14443A NFC Forum tag emulation), and legacy FeliCa credentials through one antenna. The low-power wake-up function holds standby current near 12 microamps, so a battery-powered reader can run for years on the same cells. The host can use the UART interface to connect directly to a low-cost wireless MCU for cloud-managed credentials, removing any requirement for a Linux host. The 40-VFQFN package fits inside the slim reader housings common in modern lobby installations.

📱

NFC-Enabled Wearable / Fitness Band

Wearables need an NFC reader that draws as little standby current as possible, and the PN5321A3HN's documented 12 uA low-power wake-up mode is competitive for this segment. The 40-VFQFN package occupies less than 36 square millimeters, which makes the device small enough to fit inside a wristband strap. The SPI host interface lets the wearable application processor wake the PN5321A3HN on demand, perform a single tap transaction, and return to sleep within tens of milliseconds. The built-in antenna driver also eliminates the external PA, saving both board area and battery drain compared with discrete RF designs.

🏭

Industrial Asset Tagging & Tool Tracking Reader

The PN5321A3HN's MIFARE Classic and ISO 14443B support covers the rugged barcode-replacement tags used in factories and warehouses to track tools and fixtures. The 80C51 core handles anti-collision and the read/write loop autonomously, so the application MCU is free to run higher-level MES (manufacturing execution system) logic. The 2.7 V to 5.5 V supply range lets the reader share a 5 V industrial rail without a level shifter, simplifying cabinet wiring. Compared with discrete 13.56 MHz readers, the integrated part reduces PCB area by roughly 50 percent, enabling handheld wands that survive drops on concrete floors.

⚡

Vending Machine Cashless Payment Module

Cashless vending machines increasingly accept NFC contactless payments and mobile wallets, and the PN5321A3HN handles all major tap-to-pay credentials including ISO 14443A and FeliCa on a single antenna. Its integrated host interface options (I2C, SPI, UART) let the vending controller reuse its existing communication bus, which matters for retrofit modules with tight connector pin budgets. The on-chip Crypto1 engine offloads MIFARE Classic processing for closed-loop prepaid cards commonly used in school and corporate campuses. The part's wide -25 C to +85 C operating range covers outdoor vending machines in cold-storage and desert deployments.

Resumo dos produtos recomendados

PN5321A3HN/C106,55 Same die, alternate firmware revision Usado em: Contactless Payment Terminal (POS), Vending Machine Cashless Payment Module MC56F8347VPY60 NXP Semiconductors Usado em: Contactless Payment Terminal (POS) PN5321A3HN/C106,51 Original firmware revision variant Usado em: NFC Peer-to-Peer File Transfer (Smartphone Companion Device) MK22FN1M0AVLK12 NXP Semiconductors Usado em: NFC Peer-to-Peer File Transfer (Smartphone Companion Device) PN5321A3HN/C106518 Long-life-program variant Usado em: Public Transit Ticket Validator SPC5606SF2VLU6 NXP Semiconductors Usado em: Public Transit Ticket Validator PN5321A3HN/C104 Older firmware suffix variant Usado em: Access Control / Door Reader Panel MK22FX512AVLK12 NXP Semiconductors Usado em: Access Control / Door Reader Panel PN5321A3HN/C106;55 DigiKey-tracked stock suffix variant Usado em: NFC-Enabled Wearable / Fitness Band MKL26Z32VLH4 NXP Semiconductors Usado em: NFC-Enabled Wearable / Fitness Band PN5321A3HN/C1XX Generic C1XX suffix variant Usado em: Industrial Asset Tagging & Tool Tracking Reader MC9S08AW60E5MFGE Industrial-grade companion MCU for MES interface Usado em: Industrial Asset Tagging & Tool Tracking Reader MC9S12XEQ512C513 Companion automotive-grade MCU for vending controller Usado em: Vending Machine Cashless Payment Module
What is the operating frequency of the PN5321A3HN?
The PN5321A3HN operates at 13.56 MHz, the global HF band for ISO 14443, ISO 18092 (NFCIP-1), and FeliCa contactless standards. According to the NXP product page, this single carrier frequency supports all listed card and reader/writer modes, so the same antenna and matching network serves multiple contactless protocols without hardware changes.
What host interfaces does the PN5321A3HN support?
The PN5321A3HN exposes I2C, SPI, and UART as selectable host interfaces, configurable at power-up via pin strapping. According to the NXP datasheet, the host can therefore use the bus that already exists on the application MCU, removing the need for an external bridge. Maximum SPI clock is up to 5 MHz, while I2C supports standard and fast modes.
What is the supply voltage range of the PN5321A3HN?
The PN5321A3HN operates from 2.7 V to 5.5 V, which lets it sit directly on a 3.3 V logic rail or on a USB/5 V system without a level shifter. According to the NXP datasheet, the internal LDO and TX driver are designed for this wide range so the matching network does not need to be re-tuned across the supply range.
Does the PN5321A3HN support MIFARE Classic cryptographic operations?
Yes, the PN5321A3HN integrates a dedicated Crypto1 accelerator for MIFARE Classic authentication and read/write encryption. According to the NXP product page, this hardware acceleration offloads the host MCU and is required for legacy MIFARE Classic deployments such as transit and loyalty cards.
What is the difference between PN5321A3HN/C106,51 and PN5321A3HN/C106,55?
Both suffixes ship the same PN532 silicon and the same 40-VFQFN exposed-pad package, but the trailing digits denote minor firmware and quality-program revisions at the NXP back-end line. According to the community thread on this very question, the C106,51 and C106,55 variants are functionally interchangeable on a finished PCB, so the choice is driven by current factory stock.
What package is the PN5321A3HN supplied in?
The PN5321A3HN is shipped in a 40-pin VFQFN Exposed Pad package, NXP package code HVQCCN, with dimensions consistent with the standard 6 mm x 6 mm QFN outline. According to the NXP datasheet, the exposed die pad must be soldered to a ground pour to provide RF reference and thermal dissipation.
Where can I buy the PN5321A3HN online?
The PN5321A3HN is in stock at major distributors including DigiKey, Mouser, and LCSC, with multiple suffixes (C106,51, C106,55, C106518) representing recent factory batches. As of 2026-10-20, LCSC lists a unit price around $5.49 in tape-and-reel packaging, and DigiKey ships same-day from authorized stock.
What is the price of the PN5321A3HN?
The PN5321A3HN unit price is approximately $5.20 at 100 pieces and $4.30 at 1,000 pieces as of 2026-10-20. Volume tier pricing drops further at 5,000-piece reels, so designers planning mass production should request a quote for full-reel quantities directly from NXP franchised distributors.
What is the lead time for the PN5321A3HN?
Lead time for the PN5321A3HN is generally 8 to 12 weeks when ordered directly from NXP, but distributor stock on the C106,51 and C106,55 suffixes typically ships within 1 to 3 business days as of 2026-10-20. For production runs, design-in teams should qualify the specific suffix that NXP has committed to the long-term product roadmap.
Is the PN5321A3HN suitable for an NFC payment terminal?
Yes, the PN5321A3HN is explicitly positioned by NXP for handheld payment and POS applications thanks to its EMVCo-friendly ISO 14443 A/B support, peer-to-peer mode, and integrated Crypto1 engine. According to the NXP product page, the device is NFC Forum and EMVCo compliant, which simplifies pre-certification work for terminal integrators.
When should I choose the PN5321A3HN over the PN5321A3HN/C106,55?
Choose whichever suffix is currently active at NXP, since both share the same die and package footprint. According to the community thread comparing C106,51 vs C106,55, the two parts are drop-in compatible, so the decision should follow distributor stock and lifecycle status rather than electrical differences.
What is the best drop-in replacement for the PN5321A3HN?
The strongest drop-in candidates are other PN5321A3HN/C1XX suffix variants from NXP, all sharing the same 40-VFQFN exposed-pad package and firmware base. According to distributor listings, NXP has kept the PN532 family on the same footprint across firmware revisions, so a C106,55 or C106518 board accepts the C106,51 without hardware changes.
What STMicroelectronics equivalent exists for the PN5321A3HN?
There is no pin-to-pin cross-brand equivalent from STMicroelectronics to the PN5321A3HN; ST's CR95HF and ST25R series NFC readers use different packages and different antenna matching networks. According to NXP cross-reference data, designers porting designs must re-route the PCB, so the swap is not drop-in.
Where can I download the PN5321A3HN datasheet PDF?
The official datasheet PDF is hosted at the NXP product page under document number PN532_C1, and is mirrored on DigiKey and Mouser product listings. According to the datasheet link returned by web search, the document covers electrical characteristics, host interface selection, and antenna-matching guidance for the PN5321A3HN.
Where can I find the PN5321A3HN pinout?
The PN5321A3HN pinout is documented in the NXP datasheet and on the Partstack part record, listing all 40 pins of the HVQCCN package including TX1, TX2, RX, the host interface pins, and the exposed die pad. The pinout diagram shows the standard QFN numbering with pin 1 at the dot marker and counter-clockwise progression around the perimeter.

Dados de referência de engenharia para PN5321A3HN — comparação, orientação de projeto e informações de conformidade.

Guia de seleção

Choose the PN5321A3HN when the design needs a single-chip, multi-standard 13.56 MHz NFC reader for ISO 14443A/B, FeliCa, MIFARE, or ISO 18092 peer-to-peer modes and the BOM must stay compact. The integrated 80C51 core plus Crypto1 engine makes it ideal for payment terminals, transit validators, and access-control panels. Pick the /C106,55 suffix for the most current NXP production batch, fall back to /C106,51 or /C106518 if /C106,55 is out of stock, since all three are drop-in compatible on the same 40-VFQFN footprint. Avoid the PN5321A3HN for designs that need a different package footprint or a cross-brand second source, since no ST or TI drop-in alternative exists in this footprint - in those cases consider the NXP PN5180 or ST25R family as a non-drop-in alternative that will require a PCB re-spin.

Comparação com alternativas

Parâmetro Este produto PN5321A3HN/C106,55 PN5321A3HN/C106,51 PN5321A3HN/C106518 PN5321A3HN/C104 PN5321A3HN/C106;55
Brand NXP Semiconductors NXP Semiconductors NXP Semiconductors NXP Semiconductors NXP Semiconductors NXP Semiconductors
Package 40-VFQFN Exposed Pad (HVQCCN) 40-VFQFN Exposed Pad (HVQCCN) - same 40-VFQFN Exposed Pad (HVQCCN) - same 40-VFQFN Exposed Pad (HVQCCN) - same 40-VFQFN Exposed Pad (HVQCCN) - same 40-VFQFN Exposed Pad (HVQCCN) - same
Operating Frequency 13.56 MHz 13.56 MHz 13.56 MHz 13.56 MHz 13.56 MHz 13.56 MHz
Supply Voltage 2.7 V to 5.5 V 2.7 V to 5.5 V 2.7 V to 5.5 V 2.7 V to 5.5 V 2.7 V to 5.5 V 2.7 V to 5.5 V
Host Interface I2C / SPI / UART I2C / SPI / UART I2C / SPI / UART I2C / SPI / UART I2C / SPI / UART I2C / SPI / UART
Operating Temperature -25 C to +85 C -25 C to +85 C -25 C to +85 C -25 C to +85 C -25 C to +85 C -25 C to +85 C
Data Rates 106 / 212 / 424 kbit/s 106 / 212 / 424 kbit/s 106 / 212 / 424 kbit/s 106 / 212 / 424 kbit/s 106 / 212 / 424 kbit/s 106 / 212 / 424 kbit/s
RoHS Status Compliant Compliant Compliant Compliant Compliant Compliant
Packaging Tape & Reel Tape & Reel Tape & Reel Tape & Reel Tape & Reel Tape & Reel

Principais diferenciais

  • Integrated 80C51 core with on-chip Crypto1 engine (vs Discrete 13.56 MHz front end + external MCU design)
  • Multi-standard support on a single silicon die (vs Single-protocol ISO 14443 readers from competitors)
  • Documented low-power wake-up at 12 uA typical (vs Discrete reader modules that idle at several milliamps)
  • Pin-compatible across all /C1XX firmware suffixes (vs Competing NFC IC families that change footprint between revisions)

Notas de projeto

Estimated: the 40-VFQFN exposed die pad must be soldered to a continuous ground pour on the top layer, with at least nine thermal vias (0.3 mm placeholder) stitching to the inner ground plane. This provides both the RF reference for the antenna driver and the thermal path for the TX stage, which can dissipate up to 1.5 W during continuous polling. Without adequate ground stitching, radiated emissions will fail EMC pre-scan and field strength will drop by 2 to 3 dB.

Do not place the PN5321A3HN closer than 5 mm to a ferrite core or to a switching power supply. The on-chip 13.56 MHz receiver has roughly 60 dB of rejection to out-of-band noise but can be desensitized by switching converter harmonics. NXP recommends a separate analog ground island for the antenna matching network, joined to the digital ground at a single point near the IC's VSS pin.

Place the antenna matching network (typically a series capacitor plus parallel LC tank) within 5 mm of the TX1/TX2 pins, and route the differential TX1/TX2 traces as a matched pair with constant 50 ohm characteristic impedance over a continuous ground reference. Avoid routing any digital signal traces under the matching network - capacitive coupling can shift the resonant frequency by hundreds of kHz, which will degrade the link budget against ISO 14443 PICC compliance tests.

Estimated: at 5 V supply and continuous polling, the PN5321A3HN draws approximately 100 mA average and 250 mA peak. Add a 4.7 uF X7R ceramic decoupling capacitor directly on the VDD pin plus a 10 uF bulk capacitor on the PVDD pin, both within 2 mm of the IC. Insufficient decoupling can trigger the on-chip thermal shutdown during peak field-on bursts and cause intermittent card-miss failures that are notoriously hard to debug in production.

Informações de conformidade

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Applicable
Sem chumbo
Yes
Sem halogênios
Unknown
Minerais de conflito
Compliant

RoHS compliant per DigiKey listing and NXP product page. Lead-free per datasheet. Not AEC-Q100 qualified - this part is targeted at consumer/industrial NFC reader markets, not automotive.

Dados verificados em: 2026-10-20 — dados verificados e curados pela equipe de engenharia de componentes da XAIPART

Buscas relacionadas

PN5321A3HN PN5321A3HN datasheet NXP PN532 NFC reader 13.56 MHz NFC transceiver VFQFN ISO 14443 MIFARE NFC IC 40-VFQFN exposed pad NFC reader PN5321A3HN payment terminal PN5321A3HN vs PN5321A3HN/C106,55 PN5321A3HN drop-in replacement PN5321A3HN buy price where to download PN5321A3HN datasheet PDF NFC transceiver Arduino PN532 PN5321A3HN pinout 40 VFQFN what is the operating frequency of PN5321A3HN NXP PN532 contactless reader IC

Componentes & termos relacionados

NXP Semiconductors PN5321A3HN PN5321A3HN/C106,55 PN5321A3HN/C106,51 PN5321A3HN/C106518 PN5321A3HN/C104 NFC RFID 13.56 MHz HF RFID ISO 14443 ISO 18092 NFCIP-1 FeliCa MIFARE Classic Crypto1 80C51 I2C SPI UART 40-VFQFN Exposed Pad HVQCCN RoHS EMVCo NFC Forum antenna driver low-power wake-up payment terminal access control reader POS terminal
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