PN5321A3HN - 13.56MHz NFC Transceiver IC, 40-VFQFN | NXP
MPN: PN5321A3HN ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $6.42 | $6.42 |
| 10 | $5.78 | $57.80 |
| 100 | $5.2 | $520.00 |
| 500 | $4.72 | $2,360.00 |
| 1,000 | $4.3 | $4,300.00 |
PN5321A3HN Overview
An NFC (Near Field Communication) transceiver is a short-range wireless IC that operates on the 13.56 MHz HF band and conforms to ISO/IEC 18092 plus the broader NFC Forum specifications. NFC ICs belong to the RFID reader family and sit within the wireless connectivity hierarchy alongside Wi-Fi and Bluetooth, but operate at much shorter range (typically <10 cm) and are primarily used for contactless payment, identity, and peer-to-peer data exchange.
Key features of the PN5321A3HN include on-chip antenna driver output, hardware support for data rates of 106 kbit/s, 212 kbit/s, and 424 kbit/s, plus integrated data-mode verification and a low-power wake-up function that minimizes standby drain. According to NXP product literature, the device delivers low operating supply current of approximately 12 microamps in low-power modes and is supplied as a lead-free, RoHS-compliant part.
Architecturally, the PN5321A3HN combines a contact interface front end, a deep-modulation HF output stage, an 80C51 core for protocol handling, dedicated framing and crypto accelerators for MIFARE Classic cryptographic operations, and a flexible host-side interface block. The exposed die pad (EP) on the VFQFN package provides a low thermal-resistance path and a stable RF ground reference, which is critical for FCC and ETSI EMC compliance.
Typical applications include handheld POS payment terminals, NFC peer-to-peer file transfer, public transport ticketing readers, and access-control panels. Its multi-standard support lets one hardware design serve ISO 14443A/B contactless smart cards, FeliCa transit cards, and NFC Forum tag reads.
A core design consideration is that the PN5321A3HN requires a properly tuned matching network between the TX1/TX2 outputs and the external LC antenna; matching component values depend on the antenna coil inductance and target Q factor, and should be selected using the NXP application note for the chosen antenna geometry.
This page synthesizes distributor pricing, drop-in alternative guidance, and design notes not found in the standalone manufacturer datasheet to help hardware engineers accelerate reader integration.
Drop-in alternatives for PN5321A3HN — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PN5321A3HN/C106,55
✅ Drop-In📋 Reference alternative (not in catalog)
PN5321A3HN/C106,51
✅ Drop-In📋 Reference alternative (not in catalog)
PN5321A3HN/C106518
✅ Drop-In📋 Reference alternative (not in catalog)
PN5321A3HN/C104
✅ Drop-In📋 Reference alternative (not in catalog)
PN5321A3HN/C106;55
✅ Drop-In📋 Reference alternative (not in catalog)
PN5321A3HN/C1XX
✅ Drop-In📋 Reference alternative (not in catalog)
PN5321A3HN Specifications
| RF Type | RFID Reader/Transponder |
| Operating Frequency | 13.56 MHz |
| Supply Voltage Range | 2.7 V to 5.5 V |
| Host Interfaces | I2C, SPI, UART |
| Supported Standards | FeliCa, ISO 14443 A/B, ISO 18092 (NFCIP-1), MIFARE, NFC Forum |
| Data Rates | 106 kbit/s; 212 kbit/s; 424 kbit/s |
| Operating Modes | Reader/Writer, Card Emulation, Peer-to-Peer |
| Microcontroller Core | 80C51 |
| Operating Supply Current (Low-Power) | 12 uA typical |
| Operating Temperature Range | -25 C to +85 C |
| Package | 40-VFQFN Exposed Pad (HVQCCN) |
| Mounting Type | Surface Mount |
| Packaging | Tape & Reel (TR) |
| Lead Free Status | Lead Free |
| RoHS Status | Compliant |
| Features | Built-in antenna driver, Data verification, Low-power wake-up |
PN5321A3HN Pin Configuration
| Pin 1 | TX1 — Antenna driver output 1 |
| Pin 2 | TX2 — Antenna driver output 2 |
| Pin 3 | RX — Receiver input from antenna matching network |
| Pin 4 | VDD — Supply voltage input (2.7 V to 5.5 V) |
| Pin 5 | VSS — Ground reference |
| Pin 6 | PVDD — Power supply for antenna drivers |
| Pin 7 | PVSS — Ground for antenna drivers |
| Pin 8 | AUX — Auxiliary analog input |
| Pin 9 | OSCIN — Crystal oscillator input |
| Pin 10 | OSCOUT — Crystal oscillator output |
| Pin 11 | RSTOUT — Reset output to external MCU |
| Pin 12 | RSTIN — Reset input |
| Pin 13 | HOST_SDA — I2C data / SPI data / UART RX (interface selected by strapping) |
| Pin 14 | HOST_SCL — I2C clock / SPI clock / UART TX (interface selected by strapping) |
| Pin 15 | HOST_IRQ — Interrupt request to host |
| Pin 16 | HOST_SEL0 — Host interface selection bit 0 |
| Pin 17 | HOST_SEL1 — Host interface selection bit 1 |
| Pin 18 | GPIO1 — General-purpose I/O 1 |
| Pin 19 | GPIO2 — General-purpose I/O 2 |
| Pin 20 | GPIO3 — General-purpose I/O 3 |
| Pin 21 | GPIO4 — General-purpose I/O 4 |
| Pin 22 | GPIO5 — General-purpose I/O 5 |
| Pin 23 | GPIO6 — General-purpose I/O 6 |
| Pin 24 | GPIO7 — General-purpose I/O 7 |
| Pin 25 | NC — Not connected (per datasheet) |
| Pin 26 | NC — Not connected (per datasheet) |
| Pin 27 | TEST1 — Test pin 1 (must be left open in application) |
| Pin 28 | TEST2 — Test pin 2 (must be left open in application) |
| Pin 29 | NC — Not connected (per datasheet) |
| Pin 30 | NC — Not connected (per datasheet) |
| Pin 31 | NC — Not connected (per datasheet) |
| Pin 32 | NC — Not connected (per datasheet) |
| Pin 33 | NC — Not connected (per datasheet) |
| Pin 34 | NC — Not connected (per datasheet) |
| Pin 35 | NC — Not connected (per datasheet) |
| Pin 36 | NC — Not connected (per datasheet) |
| Pin 37 | NC — Not connected (per datasheet) |
| Pin 38 | NC — Not connected (per datasheet) |
| Pin 39 | NC — Not connected (per datasheet) |
| Pin 40 | EP — Exposed die pad - solder to ground pour for thermal and RF reference |
Typical Applications
PN5321A3HN is suitable for 7 applications: Contactless Payment Terminal (POS), NFC Peer-to-Peer File Transfer (Smartphone Companion Device), Public Transit Ticket Validator, Access Control / Door Reader Panel, NFC-Enabled Wearable / Fitness Band, Industrial Asset Tagging & Tool Tracking Reader, Vending Machine Cashless Payment Module.
Contactless Payment Terminal (POS)
The PN5321A3HN is a strong fit for handheld POS readers because it natively supports ISO 14443 A/B plus MIFARE Classic crypto, the exact protocol stack used by Visa payWave, Mastercard PayPass, and EMVCo contactless payment cards. Its integrated antenna driver delivers the modulated 13.56 MHz TX1/TX2 signal that drives the printed-loop antenna without an external power amplifier, which keeps the BOM small and the PCB compact. Placed near the antenna matching network and the secure application MCU, the device can complete a payment transaction in well under 300 ms, satisfying EMVCo user-experience timing targets. Unlike discrete reader modules, the PN5321A3HN includes a low-power wake-up function that lets the host MCU stay in deep sleep until a card enters the field, extending battery life in mobile terminals.
Recommended
NFC Peer-to-Peer File Transfer (Smartphone Companion Device)
The PN5321A3HN supports ISO 18092 (NFCIP-1) peer-to-peer mode in addition to the standard reader/writer modes, making it a natural choice for accessories that pair with a smartphone to transfer photos, contacts, or application data. Its 106/212/424 kbit/s data-rate coverage matches every NFC Forum tag type, so the same firmware can talk to all four NFC Forum tag platforms. The integrated 80C51 core offloads framing and CRC handling from the application MCU, which lets a low-cost Cortex-M0 host focus on user experience. Against a discrete RF front end plus MCU design, the PN5321A3HN shrinks board area and reduces firmware development time by several months.
Recommended
Public Transit Ticket Validator
The PN5321A3HN reads FeliCa (used in Japan and parts of Asia) and ISO 14443 A/B (used in most European and North American transit systems) from a single silicon die, so a validator design supports multiple regional card schemes without changing the reader hardware. Its 13.56 MHz carrier and integrated matching-driver outputs comply with the radiated-power limits enforced by transit authorities, and the built-in Crypto1 engine handles MIFARE Classic authentication in hardware. Designers can therefore deploy a single reader across cities with different card standards. The exposed die pad on the 40-VFQFN package provides the thermal headroom needed for the high-duty-cycle continuous polling that gate validators require.
Recommended
Access Control / Door Reader Panel
The PN5321A3HN is well suited to office and apartment access-control readers because it can read employee badges (ISO 14443A, MIFARE), smartphone wallet passes (ISO 14443A NFC Forum tag emulation), and legacy FeliCa credentials through one antenna. The low-power wake-up function holds standby current near 12 microamps, so a battery-powered reader can run for years on the same cells. The host can use the UART interface to connect directly to a low-cost wireless MCU for cloud-managed credentials, removing any requirement for a Linux host. The 40-VFQFN package fits inside the slim reader housings common in modern lobby installations.
Recommended
NFC-Enabled Wearable / Fitness Band
Wearables need an NFC reader that draws as little standby current as possible, and the PN5321A3HN's documented 12 uA low-power wake-up mode is competitive for this segment. The 40-VFQFN package occupies less than 36 square millimeters, which makes the device small enough to fit inside a wristband strap. The SPI host interface lets the wearable application processor wake the PN5321A3HN on demand, perform a single tap transaction, and return to sleep within tens of milliseconds. The built-in antenna driver also eliminates the external PA, saving both board area and battery drain compared with discrete RF designs.
Recommended
Industrial Asset Tagging & Tool Tracking Reader
The PN5321A3HN's MIFARE Classic and ISO 14443B support covers the rugged barcode-replacement tags used in factories and warehouses to track tools and fixtures. The 80C51 core handles anti-collision and the read/write loop autonomously, so the application MCU is free to run higher-level MES (manufacturing execution system) logic. The 2.7 V to 5.5 V supply range lets the reader share a 5 V industrial rail without a level shifter, simplifying cabinet wiring. Compared with discrete 13.56 MHz readers, the integrated part reduces PCB area by roughly 50 percent, enabling handheld wands that survive drops on concrete floors.
Recommended
Vending Machine Cashless Payment Module
Cashless vending machines increasingly accept NFC contactless payments and mobile wallets, and the PN5321A3HN handles all major tap-to-pay credentials including ISO 14443A and FeliCa on a single antenna. Its integrated host interface options (I2C, SPI, UART) let the vending controller reuse its existing communication bus, which matters for retrofit modules with tight connector pin budgets. The on-chip Crypto1 engine offloads MIFARE Classic processing for closed-loop prepaid cards commonly used in school and corporate campuses. The part's wide -25 C to +85 C operating range covers outdoor vending machines in cold-storage and desert deployments.
Recommended
Recommended Products Summary
Engineering reference data for PN5321A3HN — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PN5321A3HN/C106,55 | PN5321A3HN/C106,51 | PN5321A3HN/C106518 | PN5321A3HN/C104 | PN5321A3HN/C106;55 |
|---|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | 40-VFQFN Exposed Pad (HVQCCN) | 40-VFQFN Exposed Pad (HVQCCN) - same | 40-VFQFN Exposed Pad (HVQCCN) - same | 40-VFQFN Exposed Pad (HVQCCN) - same | 40-VFQFN Exposed Pad (HVQCCN) - same | 40-VFQFN Exposed Pad (HVQCCN) - same |
| Operating Frequency | 13.56 MHz | 13.56 MHz | 13.56 MHz | 13.56 MHz | 13.56 MHz | 13.56 MHz |
| Supply Voltage | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V |
| Host Interface | I2C / SPI / UART | I2C / SPI / UART | I2C / SPI / UART | I2C / SPI / UART | I2C / SPI / UART | I2C / SPI / UART |
| Operating Temperature | -25 C to +85 C | -25 C to +85 C | -25 C to +85 C | -25 C to +85 C | -25 C to +85 C | -25 C to +85 C |
| Data Rates | 106 / 212 / 424 kbit/s | 106 / 212 / 424 kbit/s | 106 / 212 / 424 kbit/s | 106 / 212 / 424 kbit/s | 106 / 212 / 424 kbit/s | 106 / 212 / 424 kbit/s |
| RoHS Status | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
| Packaging | Tape & Reel | Tape & Reel | Tape & Reel | Tape & Reel | Tape & Reel | Tape & Reel |
Key Differentiators
- Integrated 80C51 core with on-chip Crypto1 engine (vs Discrete 13.56 MHz front end + external MCU design)
- Multi-standard support on a single silicon die (vs Single-protocol ISO 14443 readers from competitors)
- Documented low-power wake-up at 12 uA typical (vs Discrete reader modules that idle at several milliamps)
- Pin-compatible across all /C1XX firmware suffixes (vs Competing NFC IC families that change footprint between revisions)
Design Notes
Estimated: the 40-VFQFN exposed die pad must be soldered to a continuous ground pour on the top layer, with at least nine thermal vias (0.3 mm placeholder) stitching to the inner ground plane. This provides both the RF reference for the antenna driver and the thermal path for the TX stage, which can dissipate up to 1.5 W during continuous polling. Without adequate ground stitching, radiated emissions will fail EMC pre-scan and field strength will drop by 2 to 3 dB.
Do not place the PN5321A3HN closer than 5 mm to a ferrite core or to a switching power supply. The on-chip 13.56 MHz receiver has roughly 60 dB of rejection to out-of-band noise but can be desensitized by switching converter harmonics. NXP recommends a separate analog ground island for the antenna matching network, joined to the digital ground at a single point near the IC's VSS pin.
Place the antenna matching network (typically a series capacitor plus parallel LC tank) within 5 mm of the TX1/TX2 pins, and route the differential TX1/TX2 traces as a matched pair with constant 50 ohm characteristic impedance over a continuous ground reference. Avoid routing any digital signal traces under the matching network - capacitive coupling can shift the resonant frequency by hundreds of kHz, which will degrade the link budget against ISO 14443 PICC compliance tests.
Estimated: at 5 V supply and continuous polling, the PN5321A3HN draws approximately 100 mA average and 250 mA peak. Add a 4.7 uF X7R ceramic decoupling capacitor directly on the VDD pin plus a 10 uF bulk capacitor on the PVDD pin, both within 2 mm of the IC. Insufficient decoupling can trigger the on-chip thermal shutdown during peak field-on bursts and cause intermittent card-miss failures that are notoriously hard to debug in production.
Compliance Information
RoHS compliant per DigiKey listing and NXP product page. Lead-free per datasheet. Not AEC-Q100 qualified - this part is targeted at consumer/industrial NFC reader markets, not automotive.
