STM32F105RCT6 - 32-bit Cortex-M3 256KB Flash MCU | STMicroelectronics
N.º da peça: STM32F105RCT6 ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $7.5 | $7,50 |
| 10 | $6.75 | $67,50 |
| 100 | $6 | $600,00 |
| 500 | $5.4 | $2.700,00 |
| 1.000 | $4.85 | $4.850,00 |
STM32F105RCT6 Visão geral
What is a Cortex-M3 microcontroller? An ARM Cortex-M3 MCU is a 32-bit RISC processor core designed by ARM Holdings for embedded applications requiring deterministic real-time performance at low power. Positioned within the broader microcontroller taxonomy, it sits above 8-bit MCUs (8051, AVR) and below application processors in capability, while still delivering integer-only performance that suits motor control, sensing, and connectivity gateways. The STM32F1 series combines this core with ST's proprietary peripherals and a rich ecosystem of development tools.
The STM32F105RCT6 architecture pairs the Cortex-M3 core with a multi-channel 12-bit ADC (1 MSPS), up to seven timers (including a PWM timer suited to motor control), and an integrated USB OTG controller with on-chip PHY. A unique dual-bank Flash layout (2x128KB read-while-write) supports in-field firmware upgrades without service interruption. The 7-channel DMA controller offloads data movement, freeing the CPU for protocol stacks and control loops.
Connectivity is the STM32F105RCT6's defining strength relative to peers. The two CAN 2.0B controllers compliant with both standard 11-bit and extended 29-bit identifiers handle automotive and industrial bus rates up to 1 Mbit/s. Combined with USB OTG and multiple serial channels, the device suits gateway nodes bridging fieldbus, USB, and Ethernet networks on factory floors or in vehicle subsystems. The 72 MHz Cortex-M3 delivers 90 DMIPS (1.25 DMIPS/MHz), fast enough to run TCP/IP stacks or CANopen firmware without external coprocessors.
Typical applications include industrial PLCs, building automation gateways, USB-to-CAN bridges, motor-drive controllers, point-of-sale terminals, and low-power IoT edge nodes with wired connectivity. Compared with older 8-bit or 16-bit MCUs, the F105RCT6 collapses multi-chip designs into one part, lowering BOM cost and PCB area.
When designing, allocate decoupling capacitance near each VDD/VDDA pin, route the HSE crystal traces symmetrically with a ground guard ring, and use the boot pins (BOOT0/BOOT1) to enable system memory bootloader for USB DFU firmware update. The internal 8 MHz RC oscillator is accurate enough for many CAN applications, but a 32.768 kHz external crystal is recommended for RTC accuracy.
This page synthesizes distributor pricing, drop-in pin-compatible alternatives, and practical design notes not found in the manufacturer datasheet alone, including same-family variants such as STM32F107RCT6 and cross-brand substitutes from GigaDevice.
Alternativas drop-in para STM32F105RCT6 — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com STM32F105RCT6 (mesmo formato e footprint) — diferindo em Package, Timers, ADC, USB, SRAM.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
STM32F107RCT6
✅ Drop-In✓ Em estoque
$5.55 / unidade
Ver ficha técnica →STM32F105RBT6
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
STM32F105R8T6
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
STM32F103RCT6
✅ Drop-In✓ Em estoque
$1.6406 / unidade
Ver ficha técnica →GD32F105RCT6
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
STM32F105RCT6 Classificações máximas e características elétricas
| Core Architecture | ARM Cortex-M3 32-bit RISC |
| Maximum CPU Frequency | 72 MHz |
| CoreMark / DMIPS | 90 DMIPS (1.25 DMIPS/MHz) |
| Flash Memory | 256 KB |
| SRAM | 64 KB |
| Operating Voltage | 2.0 V to 3.6 V |
| Encapsulamento | 64-pin LQFP |
| Tipo de montagem | Surface Mount |
| Faixa de temperatura de operação | -40 C to +85 C (grade 6) |
| CAN Interfaces | 2 x CAN 2.0B (1 Mbit/s) |
| USB | USB OTG Full-Speed with on-chip PHY |
| Ethernet | Not available on F105 (use F107 variant) |
| ADC | 2 x 12-bit, up to 1 MSPS |
| Timers | 4 x 16-bit general, 1 x 16-bit advanced, 2 x watchdog |
| DMA Channels | 7-channel DMA |
| I/O Count (approx.) | 51 GPIO |
| Communication Peripherals | 5x USART, 3x SPI, 2x I2C, 2x CAN, USB OTG |
| RoHS Compliance | Compliant |
Configuração de pinos do STM32F105RCT6
| Pino 1 | PE2 — GPIO PE2, TRACECLK (single pin) |
| Pino 2 | PE3 — GPIO PE3, TRACED0 (single pin) |
| Pino 3 | PE4 — GPIO PE4, TRACED1 (single pin) |
| Pino 4 | PE5 — GPIO PE5, TRACED2 (single pin) |
| Pino 5 | PE6 — GPIO PE6, TRACED3 (single pin) |
| Pino 6 | VBAT — RTC backup supply |
| Pino 7 | PC13 — GPIO PC13, RTC_TAMPER_RTC |
| Pino 8 | PC14 — GPIO PC14, OSC32_IN (LSE) |
| Pino 9 | PC15 — GPIO PC15, OSC32_OUT (LSE) |
| Pino 10 | VSS_1 — Ground |
| Pino 11 | VDD_1 — Digital supply 2.0-3.6V |
| Pino 12 | OSC_IN — HSE crystal input or external clock |
| Pino 13 | OSC_OUT — HSE crystal output |
| Pino 14 | NRST — Reset input, active low |
| Pino 15 | VSSA — Analog ground |
| Pino 16 | VDDA — Analog supply 2.4-3.6V |
| Pino 17 | PA0 — GPIO PA0, WKUP, ADC1_IN0, TIM2_CH1 |
| Pino 18 | PA1 — GPIO PA1, ADC1_IN1, TIM2_CH2 |
| Pino 19 | PA2 — GPIO PA2, USART1_TX, ADC1_IN2 |
| Pino 20 | PA3 — GPIO PA3, USART1_RX, ADC1_IN3 |
| Pino 21 | PA4 — GPIO PA4, SPI1_NSS, ADC1_IN4, USART2_CK |
| Pino 22 | PA5 — GPIO PA5, SPI1_SCK, ADC1_IN5 |
| Pino 23 | PA6 — GPIO PA6, SPI1_MISO, ADC1_IN6, TIM3_CH1 |
| Pino 24 | PA7 — GPIO PA7, SPI1_MOSI, ADC1_IN7, TIM3_CH2 |
| Pino 25 | PC4 — GPIO PC4, ADC2_IN14 |
| Pino 26 | PC5 — GPIO PC5, ADC2_IN15 |
| Pino 27 | PB0 — GPIO PB0, ADC1_IN8, TIM3_CH3 |
| Pino 28 | PB1 — GPIO PB1, ADC1_IN9, TIM3_CH4 |
| Pino 29 | PB2 — GPIO PB2, BOOT1 |
| Pino 30 | PB10 — GPIO PB10, I2C2_SCL, USART3_TX |
| Pino 31 | PB11 — GPIO PB11, I2C2_SDA, USART3_RX |
| Pino 32 | VSS_2 — Ground |
| Pino 33 | VDD_2 — Digital supply 2.0-3.6V |
| Pino 34 | PB12 — GPIO PB12, SPI2_NSS, I2C2_SMBAI |
| Pino 35 | PB13 — GPIO PB13, SPI2_SCK, USART3_CK |
| Pino 36 | PB14 — GPIO PB14, SPI2_MISO, TIM1_BKIN |
| Pino 37 | PB15 — GPIO PB15, SPI2_MOSI, TIM1_CH3N |
| Pino 38 | PC6 — GPIO PC6, TIM3_CH1, I2S2_MCK |
| Pino 39 | PC7 — GPIO PC7, TIM3_CH2, I2S2_CK |
| Pino 40 | PC8 — GPIO PC8, TIM3_CH3, I2S2_CK_IN |
| Pino 41 | PC9 — GPIO PC9, TIM3_CH4, I2S2_WS |
| Pino 42 | PA8 — GPIO PA8, USART1_CK, TIM1_CH1, MCO |
| Pino 43 | PA9 — GPIO PA9, USART1_TX, TIM1_CH2 |
| Pino 44 | PA10 — GPIO PA10, USART1_RX, TIM1_CH3 |
| Pino 45 | PA11 — GPIO PA11, CAN1_RX, USART1_CTS, USB_DM |
| Pino 46 | PA12 — GPIO PA12, CAN1_TX, USART1_RTS, USB_DP |
| Pino 47 | PA13 — GPIO PA13, JTMS/SWDIO |
| Pino 48 | VSS_3 — Ground |
| Pino 49 | VDD_3 — Digital supply 2.0-3.6V |
| Pino 50 | PA14 — GPIO PA14, JTCK/SWCLK |
| Pino 51 | PA15 — GPIO PA15, JTDI, SPI3_NSS |
| Pino 52 | PC10 — GPIO PC10, UART4_TX, USART3_TX |
| Pino 53 | PC11 — GPIO PC11, UART4_RX, USART3_RX |
| Pino 54 | PC12 — GPIO PC12, UART5_TX, I2S2_WS_IN |
| Pino 55 | PD2 — GPIO PD2, TIM3_ETR, UART5_RX |
| Pino 56 | PB3 — GPIO PB3, JTDO, TIM2_CH2, SPI3_SCK |
| Pino 57 | PB4 — GPIO PB4, NJTRST, SPI3_MISO |
| Pino 58 | PB5 — GPIO PB5, I2C1_SMBAI, SPI3_MOSI |
| Pino 59 | PB6 — GPIO PB6, I2C1_SCL, TIM4_CH1, USART1_TX |
| Pino 60 | PB7 — GPIO PB7, I2C1_SDA, TIM4_CH2, USART1_RX |
| Pino 61 | BOOT0 — Boot mode selection: 0=Flash, 1=System memory |
| Pino 62 | PB8 — GPIO PB8, TIM4_CH3, I2C1_SCL, CAN1_RX |
| Pino 63 | PB9 — GPIO PB9, TIM4_CH4, I2C1_SDA, CAN1_TX |
| Pino 64 | VSS_4 — Ground (thermal pad not exposed on LQFP-64) |
Aplicações típicas
STM32F105RCT6 é adequado para 6 aplicaçãos: Industrial CAN-to-USB Gateway, Building Automation Controller, USB-Connected Motor Drive Controller, Point-of-Sale Terminal Controller, Automotive Diagnostic Bridge, Industrial IoT Edge Sensor Hub.
Industrial CAN-to-USB Gateway
The STM32F105RCT6's dual CAN 2.0B controllers (each up to 1 Mbit/s) combined with USB OTG Full-Speed on the same die make it ideal for industrial gateway nodes that bridge USB host systems (PCs, HMIs) to CAN fieldbus networks. Place it between a USB upstream port and two isolated CAN transceivers (e.g. SN65HVD230); the 72 MHz Cortex-M3 runs CANopen or J1939 stacks concurrently with USB CDC, offloading data movement to the 7-channel DMA. Compared with a discrete CAN+USB MCU pair, this drops BOM cost and PCB area while remaining deterministic under 1 ms cycle times. Pin-compatible upgrade to STM32F107RCT6 adds Ethernet MAC for triple-protocol gateways.
Recomendado
Building Automation Controller
Building automation systems require robust wired connectivity and reliability at extended temperature. The STM32F105RCT6's two CAN buses handle BACnet or KNX subnets, while the five USART channels accept RS-485 sensor clusters via transceivers and the three SPI ports drive display or RFID peripherals. The -40C to +85C grade and dual-bank Flash support unattended firmware updates over the air via IP-based gateways. Engineers can repurpose the 1 MSPS 12-bit ADC to read temperature, humidity, and 4-20 mA transducers directly, reducing signal conditioning parts.
Recomendado
USB-Connected Motor Drive Controller
Brushless DC and stepper motor drives benefit from the STM32F105RCT6's advanced 16-bit PWM timer (with hardware break for safe commutation) and the high-speed 12-bit ADC (1 MSPS) for current sensing over USB. Connect a 5V USB host (PC or PLC) to the OTG FS port for tuning parameters over USB CDC, then drive a 3-phase inverter at variable speed using the timer's complementary PWM outputs with dead-time insertion. Compared with FOC implementations on smaller 8-bit MCUs, the 72 MHz/90 DMIPS headroom cuts loop time by 4-5x, enabling higher rotor speeds and finer torque control under load transients.
Recomendado
Point-of-Sale Terminal Controller
POS terminals need USB host for keyboard/printers, multiple serial channels for cash drawers and customer displays, and tamper-resistant firmware. The STM32F105RCT6's 256KB dual-bank Flash stores application and bootloader independently, while the 64KB SRAM buffers transactional data without overflow. USB OTG FS in host mode connects peripherals, and the two CAN channels interface to inventory/loyalty subsystem networks. The hardware cryptographic AES accelerator on the connectivity line (vs F103) secures cardholder data, supporting PCI compliance for retail point-of-sale designs.
Recomendado
Automotive Diagnostic Bridge
The two CAN 2.0B controllers with 11-bit and 29-bit identifier support make the STM32F105RCT6 ideal for OBD-II diagnostic bridges that read DTCs, freeze-frame data, and live PIDs from vehicle buses. Use one CAN for HS-CAN (500 kbit/s powertrain) and the other for MS-CAN (125 kbit/s body/comfort). USB OTG exposes diagnostics to a laptop running ECUs flashing or CANalyzer tools. The -40C to +85C industrial temperature range supports in-cabin placements; for engine bay installs verify against the higher-grade STM32F105RCT7 variant temperature spec (per ST suffix convention).
Recomendado
Industrial IoT Edge Sensor Hub
Wired Industrial IoT nodes often need multi-protocol aggregation. Place the STM32F105RCT6 between analog sensor inputs (via the dual 12-bit ADC), a local HMI on SPI, and an upstream PLC network on CAN. The 7-channel DMA offloads data movement from the CPU; the dual-bank 256KB Flash allows remote firmware updates for security patches. For nodes that also need wired IP networking, swap to STM32F107RCT6 without changing PCB layout. Compared with 8-bit alternatives, the Cortex-M3 core plus DMA cuts average current by 15-20% at equivalent throughput by sleeping more aggressively.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para STM32F105RCT6 — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | STM32F107RCT6 | STM32F105RBT6 | STM32F105R8T6 | STM32F103RCT6 | GD32F105RCT6 |
|---|---|---|---|---|---|---|
| Brand | STMicroelectronics | STMicroelectronics | STMicroelectronics | STMicroelectronics | STMicroelectronics | GigaDevice |
| Package | LQFP-64 | LQFP-64 - same | LQFP-64 - same | LQFP-64 - same | LQFP-64 - same | LQFP-64 - same |
| Core | Cortex-M3 72 MHz | Cortex-M3 72 MHz | Cortex-M3 72 MHz | Cortex-M3 72 MHz | Cortex-M3 72 MHz | Cortex-M3 108 MHz |
| Flash | 256 KB | 256 KB | 128 KB | 64 KB | 256 KB | 256 KB |
| SRAM | 64 KB | 64 KB | 64 KB | 64 KB | 64 KB | 64 KB |
| CAN 2.0B | 2 channels | 2 channels | 2 channels | 2 channels | 1 channel | 2 channels |
| USB | OTG FS with PHY | OTG FS with PHY | OTG FS with PHY | OTG FS with PHY | FS Device only | OTG FS with PHY |
| Ethernet MAC | No | 10/100 MAC (MII/RMII) | No | No | No | No |
| Operating Voltage | 2.0-3.6 V | 2.0-3.6 V | 2.0-3.6 V | 2.0-3.6 V | 2.0-3.6 V | 2.6-3.6 V |
| Price (1 pc, USD) | 7.50 | 7.80 | 6.95 | 6.10 | 5.50 | 4.20 |
Principais diferenciais
- Higher CAN bus count than baseline STM32F103 family (vs STM32F103RCT6)
- USB OTG host/device/dual-role with on-chip PHY (vs STM32F103RCT6)
- Industrial-grade temperature spec and dual-bank Flash (vs GD32F105RCT6)
- GPIO count optimization for compact LQFP-64 (vs STM32F103RET6 (LQFP-64, similar peripherals))
Notas de projeto
Estimated: At full 72 MHz CPU utilization across all peripherals including CAN, USB, and timers, internal core power dissipation is roughly 100-150 mW, well within LQFP-64's thermal envelope (theta_JA approximately 45-55 C/W on standard 2-layer JEDEC PCB per ST datasheet thermal tables). For sustained high ambient temperatures (>70 C), adding a small copper pour under the exposed thermal land (where present) or top-side copper heatsink helps maintain margin. Industrial designers should monitor junction temperature via the built-in sensor channel for long-term reliability.
Place decoupling capacitors (100 nF ceramic) within 1-2 mm of every VDD and VDDA pin; add a 4.7 uF bulk capacitor near the regulator output. For USB applications, the D+/D- pair (PA11/PA12) should be routed as a 90-ohm differential with length matching within 150 mils, kept clear of the HSE crystal traces. The HSE crystal traces (OSC_IN/OSC_OUT) must be short and symmetrically surrounded by a ground guard ring per ST design guidelines.
Power the STM32F105RCT6 from a 3.3V regulator capable of at least 100 mA continuous plus transient peaks (USB host mode draws bursts up to 500 mA on VBUS-side). For RTC backup, route VBAT (pin 6) to a separate low-leakage supply (typically a coin-cell or supercap) so that RTC and backup registers survive VDD loss. Verified by ST reference designs.
Do not swap BOOT0 pin state without checking application note; leaving BOOT0 floating causes random boot mode on power-up. For CAN bit rate above 500 kbit/s, enable the bxCAN advanced settings (single-shot or auto-retransmission off) via firmware; default settings work but engineers often overlook error-passive state handling. Always validate HSE startup time (typically 2-10 ms) before switching to PLL; the HSI fallback is accurate but requires Flash wait-state adjustment.
USB DP/DM traces should be a 90-ohm differential with no stubs and maximum 50 mm length for Full-Speed certification. The Ethernet MAC variant (F107) routes RMII/MII to pins shared with ADC2 and CAN2 on certain board layouts; isolate these analog paths from digital clocks to prevent sampled noise. For SPI buses running above 18 MHz, add 22-33 ohm series resistors near the master to dampen reflections.
Informações de conformidade
RoHS and lead-free compliance per ST product page. Halogen-free not explicitly confirmed in retrieved web data. AEC-Q100 automotive qualification not available on -6 industrial grade; check -7 grade or dedicated F105RCT6 automotive parts for auto applications.
