TDA38826XUMA1 - 20A Synchronous Buck Regulator, 2.7-16V | Infineon
N.º da peça: TDA38826XUMA1 ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $3.85 | $3,85 |
| 10 | $3.47 | $34,70 |
| 100 | $3.09 | $309,00 |
| 500 | $2.71 | $1.355,00 |
| 1.000 | $2.4 | $2.400,00 |
TDA38826XUMA1 Visão geral
A buck regulator (step-down switching converter) is a type of switched-mode power supply (SMPS) that uses an inductor and synchronous FET switches to convert a higher DC input voltage to a lower DC output voltage at high efficiency. Within the power management hierarchy, the buck converter sits between the linear regulator (low noise but inefficient at high step-down ratios) and the isolated converter (used for offline or safety-isolated rails). COT (Constant On-Time) control is a variant of hysteretic control in which the high-side switch is turned on for a fixed time each switching cycle, with the off-time determined by the output voltage crossing a feedback threshold; this yields fast transient response without requiring complex Type-II/III compensation networks.
Key differentiating features of the TDA38826 include integrated MOSFETs (eliminating external switch selection), COT control (removing compensation engineering effort), 20 A continuous output current, adjustable output from 0.9 V, and a wide 2.7 V to 16 V input range with external bias. Infineon's IPOL (Integrated Point-of-Load) family targets server, telecom, and graphics-rack power rails where density and design simplicity outweigh the need for ultra-low-noise linear regulation.
The COT control loop uses the output ripple to trigger switching events, achieving fast load-step response without external compensation components. This architecture is robust to ceramic output capacitor ESR variation and supports pre-biased startup, a useful feature when powering FPGAs or ASICs that already have residual charge on their rails at hot-plug events.
Typical applications include 12 V-to-POL conversion for server core rails, ASIC/FPGA core and memory supplies, datacom and telecom cards, and graphics-card voltage rails. The wide input range also accepts 5 V or 3.3 V intermediate bus voltages in distributed power architectures.
When designing with this regulator, place input capacitors as close as possible to the VIN and PGND pins to minimize switching-node parasitic inductance. A 2 x 22 µF ceramic input capacitor bank is typical for 20 A operation, and the output filter inductor should be sized to keep peak-to-peak ripple current below 30% of the load for best transient behavior.
This page synthesizes Infineon datasheet specifications, distributor pricing, and drop-in alternative guidance for engineers evaluating the TDA38826XUMA1 against competing IPOL and DC-DC point-of-load parts.
Alternativas drop-in para TDA38826XUMA1 — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com TDA38826XUMA1 (mesmo formato e footprint) — diferindo em Package, Topology, Number of Outputs, Output Voltage Range, Product Family.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
TDA38825XUMA1
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
TDA38826XUMA1
✅ Drop-In✓ Em estoque
$2.4 / unidade
Ver ficha técnica →TDA38827XUMA1
✅ Drop-In ⚠️ Especificações não verificadas📋 Alternativa de referência (fora do catálogo)
TDA38826XUMA1 Classificações máximas e características elétricas
| Topologia | Synchronous Buck (Step-Down) |
| Faixa de tensão de entrada | 2.7 V to 16 V |
| Faixa de tensão de saída | 0.9 V to 5.5 V (Adjustable) |
| Continuous Output Current | 20 A |
| Control Scheme | Constant On-Time (COT) |
| Feedback Reference Voltage | 0.9 V |
| Integrated MOSFETs | Yes (high-side and low-side) |
| Faixa de temperatura de operação | -40 C to +125 C (junction) |
| Encapsulamento | 21-Pin PowerUFQFN (QFN-21) |
| Package Type | QFN-21 Tape and Reel |
| Standard Pack Quantity | 3000 |
| Tipo de montagem | Surface Mount |
| Status RoHS | Compliant |
| Lead-Free | Yes |
| Family | IFX POL (Integrated Point-of-Load) |
Configuração de pinos do TDA38826XUMA1
| Pino 1 | VIN — Input voltage supply |
| Pino 2 | VIN — Input voltage supply |
| Pino 3 | PGND — Power ground |
| Pino 4 | PGND — Power ground |
| Pino 5 | VOUT — Switching node / output voltage sense |
| Pino 6 | VOUT — Switching node / output voltage sense |
| Pino 7 | FB — Feedback voltage input |
| Pino 8 | VDRV — Driver bias supply |
| Pino 9 | EN — Enable input |
| Pino 10 | PGOOD — Power-good indicator |
| Pino 11 | SS/TRK — Soft-start / tracking |
| Pino 12 | RT/FSET — Frequency-setting resistor |
| Pino 13 | AGND — Analog ground |
| Pino 14 | BST — Bootstrap for high-side gate drive |
| Pino 15 | NC — Not connected (per datasheet) |
| Pino 16 | NC — Not connected (per datasheet) |
| Pino 17 | NC — Not connected (per datasheet) |
| Pino 18 | PVIN — Power VIN for internal FETs |
| Pino 19 | PVIN — Power VIN for internal FETs |
| Pino 20 | LX — Switching node |
| Pino 21 | EP — Exposed thermal pad (connect to PGND) |
Aplicações típicas
TDA38826XUMA1 é adequado para 7 aplicaçãos: Server Core-Rail Point-of-Load Conversion, FPGA / ASIC Core and Memory Rails, Telecom and Datacom Card Power, Graphics Card and GPU VR, Industrial 24V-Bus POL Conversion, Storage Controller Board Power, Test and Measurement Equipment Power Rails.
Server Core-Rail Point-of-Load Conversion
The TDA38826XUMA1's 20 A continuous output rating and 2.7 V to 16 V input range make it a direct match for converting a 12 V intermediate bus to sub-1 V processor core rails in hyperscale server motherboards. With COT control and integrated high-side and low-side MOSFETs, the part eliminates external compensation parts and shrinks the POL footprint versus a controller-plus-FET design. A typical server-core implementation drops 12 V to 0.9 V at 20 A using a 2 x 22 uF ceramic input bank and a single inductor sized for ~30% ripple; the wide input range also accepts 5 V or 3.3 V buses in distributed power architectures. Pre-biased startup prevents inrush into FPGAs/ASICs that already carry residual rail voltage during hot-plug events.
Recomendado
FPGA / ASIC Core and Memory Rails
Modern FPGAs and ASICs demand tight voltage regulation with sub-microsecond load-step response as processing blocks switch in and out - exactly the use case the TDA38826XUMA1 targets. The 20 A output current and 0.9 V to 5.5 V adjustable output cover typical FPGA core (0.85-1.0 V), memory (1.2-1.8 V), and transceiver (1.0-1.2 V) rails from a single POL design. COT control reacts to load steps without waiting for an external error-amplifier compensation network, which matters when the FPGA's instantaneous current demand can swing 50% in nanoseconds. Pre-biased output startup is a critical feature for hot-swappable FPGA mezzanine cards where the rail must not sink current into a pre-charged output cap bank.
Recomendado
Telecom and Datacom Card Power
PCIe add-in cards, ATCA blades, and network processor modules all run from -48 V-to-board intermediate bus converters followed by 12 V POL stages - and the TDA38826XUMA1 is designed for that final 12 V-to-rail conversion. The 16 V maximum input comfortably accepts nominal 12 V with transients from upstream holdup capacitors, while the 20 A continuous current supports processors, network ASICs, and DDR memory banks simultaneously. The QFN-21 PowerUFQFN package fits the dense card layouts common in PCIe form factors, and the integrated MOSFETs reduce BOM count - critical for production cost-sensitive telecom hardware. COT control's tolerance of ceramic output capacitors simplifies the output filter design across card revisions.
Recomendado
Graphics Card and GPU VR
Graphics processing units pull tens of amps from sub-1V rails with millisecond-scale transients as shading workloads switch on and off - exactly what the TDA38826XUMA1's 20 A continuous current and COT control are designed to support. The QFN-21 PowerUFQFN footprint exposes a thermal pad on the underside of the package, allowing direct soldering to PCB copper pour for thermal dissipation. Designers frequently parallel multiple TDA38826 stages (dual or quad phase) to deliver 40-80 A GPU rails, with each phase sharing an external clock for interleaved ripple cancellation. The 0.9 V reference simplifies the design of stacked-rail GPU/Memory combinations common in AI accelerator cards.
Recomendado
Industrial 24V-Bus POL Conversion
Factory automation controllers, PLCs, and industrial PCs often run from a 24 V nominal bus with swings from 18 V to 32 V - too wide for many POL converters without pre-regulation. While the TDA38826XUMA1's 16 V maximum is below the upper industrial bus range, it is ideal when the bus has been pre-regulated to 12 V or when a front-end buck brings the rail down to 12 V. The wide 2.7 V to 16 V input also suits 24 V systems with a downstream intermediate 12 V rail. The part's -40 C to +125 C junction temperature rating handles the extended thermal envelope of unventilated industrial enclosures, and the integrated protection features support the long-lifecycle expectations of industrial deployments.
Recomendado
Storage Controller Board Power
NVMe SSD controllers, RAID adapter cards, and storage-class memory modules each require multiple tightly regulated rails - typically 0.9 V for the controller core, 1.2 V for the DDR PHY, and 1.8 V for NAND interface logic - all of which the TDA38826XUMA1 can supply from a single 12 V input. Storage hardware benefits from COT control's tolerance of ceramic output capacitors, which is critical when the storage device must operate reliably across temperature and aging without manual loop compensation. The small QFN-21 footprint and integrated MOSFETs reduce PCB area in space-constrained M.2 and U.2 form factors, while the 20 A current rating supports the highest-performance enterprise SSD controllers in production today.
Recomendado
Test and Measurement Equipment Power Rails
Benchtop oscilloscopes, logic analyzers, and lab power supplies use multiple isolated voltage rails to power their analog front ends, digital processing, and display subsystems. The TDA38826XUMA1's COT control delivers fast transient response to dynamic loads (like an ADC's input amplifier stage switching ranges), while its 20 A continuous current supports the bulk digital current of an FPGA-based processing pipeline. The part's small QFN-21 PowerUFQFN footprint simplifies multi-rail PCB layouts common in test equipment, where multiple isolated POL stages share a backplane. Pre-biased startup matters when hot-swapping measurement modules into a powered test chassis.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para TDA38826XUMA1 — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | TDA38825XUMA1 | TDA38826XUMA1 | TDA38827XUMA1 |
|---|---|---|---|---|
| Brand | Infineon | Infineon | Infineon | Infineon |
| Package | QFN-21 (PowerUFQFN) | QFN-21 (PowerUFQFN) - same | QFN-21 (PowerUFQFN) - same | QFN-21 (PowerUFQFN) - same |
| Output Current | 20 A | 12 A (-40%) | 20 A (identical) | 20 A (parametrically equivalent) |
| Input Voltage Range | 2.7 V to 16 V | 2.7 V to 16 V | 2.7 V to 16 V | 2.7 V to 16 V |
| Output Voltage Range | 0.9 V to 5.5 V | 0.9 V to 5.5 V | 0.9 V to 5.5 V | 0.9 V to 5.5 V |
| Control Scheme | COT | COT | COT | COT |
| Integrated MOSFETs | Yes (HS+LS) | Yes (HS+LS) | Yes (HS+LS) | Yes (HS+LS) |
| Operating Temperature | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C |
| Standard Pack Quantity | 3000 (reel) | 3000 (reel) | 3000 (reel) | 3000 (reel) |
Principais diferenciais
- Highest current rating in the TDA3882x IPOL family (vs TDA38825XUMA1)
- COT control eliminates external compensation (vs TDA38825XUMA1)
- Reel-packaged orderable part number (vs TDA38826 (no -XUMA1 suffix))
Notas de projeto
Place input capacitors as close as possible to the VIN and PGND pins to minimize the high-frequency loop area. A 2 x 22 uF ceramic input bank is typical for 20 A continuous operation. Use multiple vias for the exposed thermal pad (EP) to ensure low-impedance thermal and electrical connection to the inner PGND plane. The switching node (LX/VOUT) trace should be short and surrounded by GND to minimize radiated EMI.
Estimated: At VIN=12 V, VOUT=1.0 V, and 20 A load, power dissipation is approximately (12-1)*0.9 (assuming 90% efficiency) = 1.1 W. With the QFN-21 PowerUFQFN package on a 4-layer 1 oz copper PCB, theta_JA is typically 25-35 C/W, yielding a 28-38 C junction temperature rise above ambient. For sustained 20 A operation at high VIN-VOUT differentials, increase PCB copper area or add forced airflow to keep Tj below 125 C.
Do not exceed the absolute maximum VIN of 18 V (per datasheet - derate from 16 V recommended). Verify that the BST (bootstrap) capacitor and diode are correctly placed to ensure high-side gate drive; missing bootstrap components cause immediate regulation failure. The RT/FSET resistor sets the on-time and must not be omitted. Pre-biased startup must be considered when hot-plugging into a system with pre-charged output capacitors - the TDA38826 supports this but verify the specific load's inrush tolerance.
Keep the FB (feedback) trace away from the LX/VOUT switching node and surrounded by GND to avoid noise injection into the control loop. The PGOOD pull-up should be referenced to a clean logic supply, not the noisy VOUT rail. Single-point grounding between AGND and PGND at the IC's AGND pin prevents ground-loop noise from coupling into the feedback. Use a 4-layer PCB with a dedicated PGND plane under the switching node for best EMI performance.
Informações de conformidade
RoHS compliant per Infineon datasheet. Not AEC-Q100 qualified (commercial/industrial grade). Halogen-free status not stated in retrieved datasheet excerpts.
