10CL040YU484C6G vs 10CL055YU484C6G Сравнение
Подробное сравнение бок о бок 10CL040YU484C6G от Intel и 10CL055YU484C6G от Altera. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Сравнение характеристик
| Параметр | 10CL040YU484C6G | 10CL055YU484C6G |
|---|---|---|
| Бренд | Intel | Altera |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | Активен | Активен |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $24,10 | $24,38 |
| Series | Cyclone 10 LP | — |
| Family | Cyclone 10 LP | Cyclone 10 LP |
| Logic Elements (LE) | 39,600 | 55,856 |
| Configurable Logic Blocks (CLB) | 2,475 | — |
| Embedded Memory (bits) | 1,161,216 | — |
| Memory Blocks (M9K) | 66 | — |
| 18x18 Multipliers | 156 | — |
| PLLs | 4 | 4 |
| Maximum User I/O | 233 | — |
| I/O Banks | 8 | — |
| Корпус | 484-FBGA (UBGA-484), 1.0 mm pitch | 484-pin UBGA (19 mm x 19 mm) |
| Speed Grade | 6 (C6G) | 6 (commercial, slowest in family) |
| Рабочая температура | 0C to +85C (commercial) | 0 C to +85 C (commercial, C suffix) |
| Process Technology | 60 nm low-power CMOS | TSMC 60 nm low-power |
| Configuration Mode | JTAG (IEEE 1149.1), Active Serial (AS), Passive Serial (PS) | — |
| Supply Voltage (Core) | [DATA_NEEDED: Vcore] | — |
| Уровень MSL | 3 (168 hours) | [DATA_NEEDED: MSL level per JEDEC J-STD-020] |
| Статус RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Packaging Type | Tray | — |
| Embedded Memory Bits | — | 2,396,160 bits (approximately 2.5 Mb) |
| Maximum User I/Os | — | 321 |
| Embedded 18x18 Multipliers | — | 156 |
| Global Clocks | — | 20 |
| Core Voltage | — | 1.0 V (typical) |
| I/O Voltage Standards | — | LVDS, LVTTL, LVCMOS, SSTL, HSTL (1.2 V to 3.3 V) |
| Тип монтажа | — | Surface Mount |
| Lead-Free / Halogen-Free | — | Yes / [DATA_NEEDED: halogen-free status] |
| Configuration Modes | — | Active Serial (AS), Passive Serial (PS), JTAG |
| Transceivers | — | None (Cyclone 10 LP family does not include SERDES) |
| Hard Memory Controller | — | Yes (DDR/DDR2/DDR3/LPDDR2 via soft IP) |