10CL040YU484C6G vs 10CL055YU484C6G 对比

详细并排对比 10CL040YU484C6G 出自 Intel 和 10CL055YU484C6G 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 10CL040YU484C6G 10CL055YU484C6G
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $24.10 $24.38
Series Cyclone 10 LP —
Family Cyclone 10 LP Cyclone 10 LP
Logic Elements (LE) 39,600 55,856
Configurable Logic Blocks (CLB) 2,475 —
Embedded Memory (bits) 1,161,216 —
Memory Blocks (M9K) 66 —
18x18 Multipliers 156 —
PLLs 4 4
Maximum User I/O 233 —
I/O Banks 8 —
封装 484-FBGA (UBGA-484), 1.0 mm pitch 484-pin UBGA (19 mm x 19 mm)
Speed Grade 6 (C6G) 6 (commercial, slowest in family)
工作温度 0C to +85C (commercial) 0 C to +85 C (commercial, C suffix)
Process Technology 60 nm low-power CMOS TSMC 60 nm low-power
Configuration Mode JTAG (IEEE 1149.1), Active Serial (AS), Passive Serial (PS) —
Supply Voltage (Core) [DATA_NEEDED: Vcore] —
MSL 等级 3 (168 hours) [DATA_NEEDED: MSL level per JEDEC J-STD-020]
RoHS 状态 Compliant Compliant
Lead-Free Yes —
Packaging Type Tray —
Embedded Memory Bits — 2,396,160 bits (approximately 2.5 Mb)
Maximum User I/Os — 321
Embedded 18x18 Multipliers — 156
Global Clocks — 20
Core Voltage — 1.0 V (typical)
I/O Voltage Standards — LVDS, LVTTL, LVCMOS, SSTL, HSTL (1.2 V to 3.3 V)
安装类型 — Surface Mount
Lead-Free / Halogen-Free — Yes / [DATA_NEEDED: halogen-free status]
Configuration Modes — Active Serial (AS), Passive Serial (PS), JTAG
Transceivers — None (Cyclone 10 LP family does not include SERDES)
Hard Memory Controller — Yes (DDR/DDR2/DDR3/LPDDR2 via soft IP)

数据手册与资源

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